Commit | Line | Data |
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6c712090 MM |
1 | /* |
2 | * Device Tree Source for AMCC Redwood(460SX) | |
3 | * | |
4 | * Copyright 2008 AMCC <tmarri@amcc.com> | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public | |
7 | * License version 2. This program is licensed "as is" without | |
8 | * any warranty of any kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | /dts-v1/; | |
12 | ||
13 | / { | |
14 | #address-cells = <2>; | |
15 | #size-cells = <1>; | |
16 | model = "amcc,redwood"; | |
17 | compatible = "amcc,redwood"; | |
18 | dcr-parent = <&{/cpus/cpu@0}>; | |
19 | ||
20 | aliases { | |
21 | ethernet0 = &EMAC0; | |
22 | serial0 = &UART0; | |
23 | }; | |
24 | ||
25 | cpus { | |
26 | #address-cells = <1>; | |
27 | #size-cells = <0>; | |
28 | ||
29 | cpu@0 { | |
30 | device_type = "cpu"; | |
31 | model = "PowerPC,460SX"; | |
32 | reg = <0x00000000>; | |
33 | clock-frequency = <0>; /* Filled in by U-Boot */ | |
34 | timebase-frequency = <0>; /* Filled in by U-Boot */ | |
35 | i-cache-line-size = <32>; | |
36 | d-cache-line-size = <32>; | |
37 | i-cache-size = <32768>; | |
38 | d-cache-size = <32768>; | |
39 | dcr-controller; | |
40 | dcr-access-method = "native"; | |
41 | }; | |
42 | }; | |
43 | ||
44 | memory { | |
45 | device_type = "memory"; | |
46 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ | |
47 | }; | |
48 | ||
49 | UIC0: interrupt-controller0 { | |
50 | compatible = "ibm,uic-460sx","ibm,uic"; | |
51 | interrupt-controller; | |
52 | cell-index = <0>; | |
53 | dcr-reg = <0x0c0 0x009>; | |
54 | #address-cells = <0>; | |
55 | #size-cells = <0>; | |
56 | #interrupt-cells = <2>; | |
57 | }; | |
58 | ||
59 | UIC1: interrupt-controller1 { | |
60 | compatible = "ibm,uic-460sx","ibm,uic"; | |
61 | interrupt-controller; | |
62 | cell-index = <1>; | |
63 | dcr-reg = <0x0d0 0x009>; | |
64 | #address-cells = <0>; | |
65 | #size-cells = <0>; | |
66 | #interrupt-cells = <2>; | |
67 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ | |
68 | interrupt-parent = <&UIC0>; | |
69 | }; | |
70 | ||
71 | UIC2: interrupt-controller2 { | |
72 | compatible = "ibm,uic-460sx","ibm,uic"; | |
73 | interrupt-controller; | |
74 | cell-index = <2>; | |
75 | dcr-reg = <0x0e0 0x009>; | |
76 | #address-cells = <0>; | |
77 | #size-cells = <0>; | |
78 | #interrupt-cells = <2>; | |
79 | interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ | |
80 | interrupt-parent = <&UIC0>; | |
81 | }; | |
82 | ||
83 | UIC3: interrupt-controller3 { | |
84 | compatible = "ibm,uic-460sx","ibm,uic"; | |
85 | interrupt-controller; | |
86 | cell-index = <3>; | |
87 | dcr-reg = <0x0f0 0x009>; | |
88 | #address-cells = <0>; | |
89 | #size-cells = <0>; | |
90 | #interrupt-cells = <2>; | |
91 | interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ | |
92 | interrupt-parent = <&UIC0>; | |
93 | }; | |
94 | ||
95 | SDR0: sdr { | |
96 | compatible = "ibm,sdr-460sx"; | |
97 | dcr-reg = <0x00e 0x002>; | |
98 | }; | |
99 | ||
100 | CPR0: cpr { | |
101 | compatible = "ibm,cpr-460sx"; | |
102 | dcr-reg = <0x00c 0x002>; | |
103 | }; | |
104 | ||
105 | plb { | |
106 | compatible = "ibm,plb-460sx", "ibm,plb4"; | |
107 | #address-cells = <2>; | |
108 | #size-cells = <1>; | |
109 | ranges; | |
110 | clock-frequency = <0>; /* Filled in by U-Boot */ | |
111 | ||
112 | SDRAM0: sdram { | |
113 | compatible = "ibm,sdram-460sx", "ibm,sdram-405gp"; | |
114 | dcr-reg = <0x010 0x002>; | |
115 | }; | |
116 | ||
117 | MAL0: mcmal { | |
118 | compatible = "ibm,mcmal-460sx", "ibm,mcmal2"; | |
119 | dcr-reg = <0x180 0x62>; | |
120 | num-tx-chans = <4>; | |
121 | num-rx-chans = <32>; | |
122 | #address-cells = <1>; | |
123 | #size-cells = <1>; | |
124 | interrupt-parent = <&UIC1>; | |
125 | interrupts = < /*TXEOB*/ 0x6 0x4 | |
126 | /*RXEOB*/ 0x7 0x4 | |
127 | /*SERR*/ 0x1 0x4 | |
128 | /*TXDE*/ 0x2 0x4 | |
129 | /*RXDE*/ 0x3 0x4 | |
130 | /*COAL TX0*/ 0x18 0x2 | |
131 | /*COAL TX1*/ 0x19 0x2 | |
132 | /*COAL TX2*/ 0x1a 0x2 | |
133 | /*COAL TX3*/ 0x1b 0x2 | |
134 | /*COAL RX0*/ 0x1c 0x2 | |
135 | /*COAL RX1*/ 0x1d 0x2 | |
136 | /*COAL RX2*/ 0x1e 0x2 | |
137 | /*COAL RX3*/ 0x1f 0x2>; | |
138 | }; | |
139 | ||
140 | POB0: opb { | |
141 | compatible = "ibm,opb-460sx", "ibm,opb"; | |
142 | #address-cells = <1>; | |
143 | #size-cells = <1>; | |
144 | ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; | |
145 | clock-frequency = <0>; /* Filled in by U-Boot */ | |
146 | ||
147 | EBC0: ebc { | |
148 | compatible = "ibm,ebc-460sx", "ibm,ebc"; | |
149 | dcr-reg = <0x012 0x002>; | |
150 | #address-cells = <2>; | |
151 | #size-cells = <1>; | |
152 | clock-frequency = <0>; /* Filled in by U-Boot */ | |
153 | /* ranges property is supplied by U-Boot */ | |
154 | interrupts = <0x6 0x4>; | |
155 | interrupt-parent = <&UIC1>; | |
156 | ||
157 | nor_flash@0,0 { | |
158 | compatible = "amd,s29gl512n", "cfi-flash"; | |
159 | bank-width = <2>; | |
160 | reg = <0x0000000 0x00000000 0x04000000>; | |
161 | #address-cells = <1>; | |
162 | #size-cells = <1>; | |
163 | partition@0 { | |
164 | label = "kernel"; | |
165 | reg = <0x00000000 0x001e0000>; | |
166 | }; | |
167 | partition@1e0000 { | |
168 | label = "dtb"; | |
169 | reg = <0x001e0000 0x00020000>; | |
170 | }; | |
171 | partition@200000 { | |
172 | label = "ramdisk"; | |
173 | reg = <0x00200000 0x01400000>; | |
174 | }; | |
175 | partition@1600000 { | |
176 | label = "jffs2"; | |
177 | reg = <0x01600000 0x00400000>; | |
178 | }; | |
179 | partition@1a00000 { | |
180 | label = "user"; | |
181 | reg = <0x01a00000 0x02560000>; | |
182 | }; | |
183 | partition@3f60000 { | |
184 | label = "env"; | |
185 | reg = <0x03f60000 0x00040000>; | |
186 | }; | |
187 | partition@3fa0000 { | |
188 | label = "u-boot"; | |
189 | reg = <0x03fa0000 0x00060000>; | |
190 | }; | |
191 | }; | |
192 | }; | |
193 | ||
194 | UART0: serial@ef600200 { | |
195 | device_type = "serial"; | |
196 | compatible = "ns16550"; | |
197 | reg = <0xef600200 0x00000008>; | |
198 | virtual-reg = <0xef600200>; | |
199 | clock-frequency = <0>; /* Filled in by U-Boot */ | |
200 | current-speed = <0>; /* Filled in by U-Boot */ | |
201 | interrupt-parent = <&UIC0>; | |
202 | interrupts = <0x0 0x4>; | |
203 | }; | |
204 | ||
205 | RGMII0: emac-rgmii@ef600900 { | |
206 | compatible = "ibm,rgmii-460sx", "ibm,rgmii"; | |
207 | reg = <0xef600900 0x00000008>; | |
208 | }; | |
209 | ||
210 | EMAC0: ethernet@ef600a00 { | |
211 | device_type = "network"; | |
212 | compatible = "ibm,emac-460sx", "ibm,emac4"; | |
213 | interrupt-parent = <&EMAC0>; | |
214 | interrupts = <0x0 0x1>; | |
215 | #interrupt-cells = <1>; | |
216 | #address-cells = <0>; | |
217 | #size-cells = <0>; | |
218 | interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4 | |
219 | /*Wake*/ 0x1 &UIC2 0x1d 0x4>; | |
220 | reg = <0xef600a00 0x00000070>; | |
221 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | |
222 | mal-device = <&MAL0>; | |
223 | mal-tx-channel = <0>; | |
224 | mal-rx-channel = <0>; | |
225 | cell-index = <0>; | |
226 | max-frame-size = <9000>; | |
227 | rx-fifo-size = <4096>; | |
228 | tx-fifo-size = <2048>; | |
835ad8e7 | 229 | rx-fifo-size-gige = <16384>; |
6c712090 MM |
230 | phy-mode = "rgmii"; |
231 | phy-map = <0x00000000>; | |
232 | rgmii-device = <&RGMII0>; | |
233 | rgmii-channel = <0>; | |
234 | has-inverted-stacr-oc; | |
235 | has-new-stacr-staopc; | |
236 | }; | |
e2efc09e TM |
237 | }; |
238 | PCIE0: pciex@d00000000 { | |
239 | device_type = "pci"; | |
240 | #interrupt-cells = <1>; | |
241 | #size-cells = <2>; | |
242 | #address-cells = <3>; | |
243 | compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; | |
244 | primary; | |
245 | port = <0x0>; /* port number */ | |
246 | reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ | |
247 | 0x0000000c 0x10000000 0x00001000>; /* Registers */ | |
248 | dcr-reg = <0x100 0x020>; | |
249 | sdr-base = <0x300>; | |
250 | ||
251 | /* Outbound ranges, one memory and one IO, | |
252 | * later cannot be changed | |
253 | */ | |
254 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 | |
255 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; | |
256 | ||
257 | /* Inbound 2GB range starting at 0 */ | |
258 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; | |
6c712090 | 259 | |
e2efc09e TM |
260 | /* This drives busses 10 to 0x1f */ |
261 | bus-range = <0x10 0x1f>; | |
262 | ||
263 | /* Legacy interrupts (note the weird polarity, the bridge seems | |
264 | * to invert PCIe legacy interrupts). | |
265 | * We are de-swizzling here because the numbers are actually for | |
266 | * port of the root complex virtual P2P bridge. But I want | |
267 | * to avoid putting a node for it in the tree, so the numbers | |
268 | * below are basically de-swizzled numbers. | |
269 | * The real slot is on idsel 0, so the swizzling is 1:1 | |
270 | */ | |
271 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; | |
272 | interrupt-map = < | |
273 | 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ | |
274 | 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ | |
275 | 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ | |
276 | 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; | |
277 | }; | |
278 | ||
279 | PCIE1: pciex@d20000000 { | |
280 | device_type = "pci"; | |
281 | #interrupt-cells = <1>; | |
282 | #size-cells = <2>; | |
283 | #address-cells = <3>; | |
284 | compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; | |
285 | primary; | |
286 | port = <0x1>; /* port number */ | |
287 | reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ | |
288 | 0x0000000c 0x10001000 0x00001000>; /* Registers */ | |
289 | dcr-reg = <0x120 0x020>; | |
290 | sdr-base = <0x340>; | |
291 | ||
292 | /* Outbound ranges, one memory and one IO, | |
293 | * later cannot be changed | |
294 | */ | |
295 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 | |
296 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; | |
297 | ||
298 | /* Inbound 2GB range starting at 0 */ | |
299 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; | |
300 | ||
301 | /* This drives busses 10 to 0x1f */ | |
302 | bus-range = <0x20 0x2f>; | |
303 | ||
304 | /* Legacy interrupts (note the weird polarity, the bridge seems | |
305 | * to invert PCIe legacy interrupts). | |
306 | * We are de-swizzling here because the numbers are actually for | |
307 | * port of the root complex virtual P2P bridge. But I want | |
308 | * to avoid putting a node for it in the tree, so the numbers | |
309 | * below are basically de-swizzled numbers. | |
310 | * The real slot is on idsel 0, so the swizzling is 1:1 | |
311 | */ | |
312 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; | |
313 | interrupt-map = < | |
314 | 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ | |
315 | 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ | |
316 | 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ | |
317 | 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; | |
318 | }; | |
319 | ||
320 | PCIE2: pciex@d40000000 { | |
321 | device_type = "pci"; | |
322 | #interrupt-cells = <1>; | |
323 | #size-cells = <2>; | |
324 | #address-cells = <3>; | |
325 | compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; | |
326 | primary; | |
327 | port = <0x2>; /* port number */ | |
328 | reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */ | |
329 | 0x0000000c 0x10002000 0x00001000>; /* Registers */ | |
330 | dcr-reg = <0x140 0x020>; | |
331 | sdr-base = <0x370>; | |
332 | ||
333 | /* Outbound ranges, one memory and one IO, | |
334 | * later cannot be changed | |
335 | */ | |
336 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000 | |
337 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>; | |
338 | ||
339 | /* Inbound 2GB range starting at 0 */ | |
340 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; | |
341 | ||
342 | /* This drives busses 10 to 0x1f */ | |
343 | bus-range = <0x30 0x3f>; | |
344 | ||
345 | /* Legacy interrupts (note the weird polarity, the bridge seems | |
346 | * to invert PCIe legacy interrupts). | |
347 | * We are de-swizzling here because the numbers are actually for | |
348 | * port of the root complex virtual P2P bridge. But I want | |
349 | * to avoid putting a node for it in the tree, so the numbers | |
350 | * below are basically de-swizzled numbers. | |
351 | * The real slot is on idsel 0, so the swizzling is 1:1 | |
352 | */ | |
353 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; | |
354 | interrupt-map = < | |
355 | 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */ | |
356 | 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */ | |
357 | 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */ | |
358 | 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>; | |
6c712090 MM |
359 | }; |
360 | ||
3fb79338 RS |
361 | MSI: ppc4xx-msi@400300000 { |
362 | compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; | |
363 | reg = < 0x4 0x00300000 0x100 | |
364 | 0x4 0x00300000 0x100>; | |
365 | sdr-base = <0x3B0>; | |
366 | msi-data = <0x00000000>; | |
367 | msi-mask = <0x44440000>; | |
368 | interrupt-count = <3>; | |
369 | interrupts =<0 1 2 3>; | |
370 | interrupt-parent = <&UIC0>; | |
371 | #interrupt-cells = <1>; | |
372 | #address-cells = <0>; | |
373 | #size-cells = <0>; | |
374 | interrupt-map = <0 &UIC0 0xC 1 | |
375 | 1 &UIC0 0x0D 1 | |
376 | 2 &UIC0 0x0E 1 | |
377 | 3 &UIC0 0x0F 1>; | |
378 | }; | |
379 | ||
6c712090 | 380 | }; |
e2efc09e | 381 | |
3fb79338 | 382 | |
6c712090 MM |
383 | chosen { |
384 | linux,stdout-path = "/plb/opb/serial@ef600200"; | |
385 | }; | |
386 | ||
387 | }; |