Commit | Line | Data |
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5761bc5d LY |
1 | /* |
2 | * MPC8378E MDS Device Tree Source | |
3 | * | |
4 | * Copyright 2007 Freescale Semiconductor Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License as published by the | |
8 | * Free Software Foundation; either version 2 of the License, or (at your | |
9 | * option) any later version. | |
10 | */ | |
11 | ||
12 | /dts-v1/; | |
13 | ||
14 | / { | |
15 | model = "fsl,mpc8378emds"; | |
16 | compatible = "fsl,mpc8378emds","fsl,mpc837xmds"; | |
17 | #address-cells = <1>; | |
18 | #size-cells = <1>; | |
19 | ||
20 | aliases { | |
21 | ethernet0 = &enet0; | |
22 | ethernet1 = &enet1; | |
23 | serial0 = &serial0; | |
24 | serial1 = &serial1; | |
25 | pci0 = &pci0; | |
26 | }; | |
27 | ||
28 | cpus { | |
29 | #address-cells = <1>; | |
30 | #size-cells = <0>; | |
31 | ||
32 | PowerPC,8378@0 { | |
33 | device_type = "cpu"; | |
cda13dd1 PG |
34 | reg = <0x0>; |
35 | d-cache-line-size = <32>; | |
36 | i-cache-line-size = <32>; | |
37 | d-cache-size = <32768>; | |
38 | i-cache-size = <32768>; | |
5761bc5d LY |
39 | timebase-frequency = <0>; |
40 | bus-frequency = <0>; | |
41 | clock-frequency = <0>; | |
42 | }; | |
43 | }; | |
44 | ||
45 | memory { | |
46 | device_type = "memory"; | |
47 | reg = <0x00000000 0x20000000>; // 512MB at 0 | |
48 | }; | |
49 | ||
d7f46190 LY |
50 | localbus@e0005000 { |
51 | #address-cells = <2>; | |
52 | #size-cells = <1>; | |
53 | compatible = "fsl,mpc8378-elbc", "fsl,elbc", "simple-bus"; | |
54 | reg = <0xe0005000 0x1000>; | |
55 | interrupts = <77 0x8>; | |
56 | interrupt-parent = <&ipic>; | |
57 | ||
58 | // booting from NOR flash | |
59 | ranges = <0 0x0 0xfe000000 0x02000000 | |
60 | 1 0x0 0xf8000000 0x00008000 | |
61 | 3 0x0 0xe0600000 0x00008000>; | |
62 | ||
63 | flash@0,0 { | |
64 | #address-cells = <1>; | |
65 | #size-cells = <1>; | |
66 | compatible = "cfi-flash"; | |
67 | reg = <0 0x0 0x2000000>; | |
68 | bank-width = <2>; | |
69 | device-width = <1>; | |
70 | ||
71 | u-boot@0 { | |
72 | reg = <0x0 0x100000>; | |
73 | read-only; | |
74 | }; | |
75 | ||
76 | fs@100000 { | |
77 | reg = <0x100000 0x800000>; | |
78 | }; | |
79 | ||
80 | kernel@1d00000 { | |
81 | reg = <0x1d00000 0x200000>; | |
82 | }; | |
83 | ||
84 | dtb@1f00000 { | |
85 | reg = <0x1f00000 0x100000>; | |
86 | }; | |
87 | }; | |
88 | ||
89 | bcsr@1,0 { | |
90 | reg = <1 0x0 0x8000>; | |
91 | compatible = "fsl,mpc837xmds-bcsr"; | |
92 | }; | |
93 | ||
94 | nand@3,0 { | |
95 | #address-cells = <1>; | |
96 | #size-cells = <1>; | |
97 | compatible = "fsl,mpc8378-fcm-nand", | |
98 | "fsl,elbc-fcm-nand"; | |
99 | reg = <3 0x0 0x8000>; | |
100 | ||
101 | u-boot@0 { | |
102 | reg = <0x0 0x100000>; | |
103 | read-only; | |
104 | }; | |
105 | ||
106 | kernel@100000 { | |
107 | reg = <0x100000 0x300000>; | |
108 | }; | |
109 | ||
110 | fs@400000 { | |
111 | reg = <0x400000 0x1c00000>; | |
112 | }; | |
113 | }; | |
114 | }; | |
115 | ||
5761bc5d LY |
116 | soc@e0000000 { |
117 | #address-cells = <1>; | |
118 | #size-cells = <1>; | |
119 | device_type = "soc"; | |
cf0d19fb | 120 | compatible = "simple-bus"; |
5761bc5d LY |
121 | ranges = <0x0 0xe0000000 0x00100000>; |
122 | reg = <0xe0000000 0x00000200>; | |
123 | bus-frequency = <0>; | |
124 | ||
125 | wdt@200 { | |
126 | compatible = "mpc83xx_wdt"; | |
127 | reg = <0x200 0x100>; | |
128 | }; | |
129 | ||
130 | i2c@3000 { | |
131 | #address-cells = <1>; | |
132 | #size-cells = <0>; | |
133 | cell-index = <0>; | |
134 | compatible = "fsl-i2c"; | |
135 | reg = <0x3000 0x100>; | |
cda13dd1 PG |
136 | interrupts = <14 0x8>; |
137 | interrupt-parent = <&ipic>; | |
5761bc5d LY |
138 | dfsrr; |
139 | }; | |
140 | ||
141 | i2c@3100 { | |
142 | #address-cells = <1>; | |
143 | #size-cells = <0>; | |
144 | cell-index = <1>; | |
145 | compatible = "fsl-i2c"; | |
146 | reg = <0x3100 0x100>; | |
cda13dd1 PG |
147 | interrupts = <15 0x8>; |
148 | interrupt-parent = <&ipic>; | |
5761bc5d LY |
149 | dfsrr; |
150 | }; | |
151 | ||
152 | spi@7000 { | |
f3a2b29d AV |
153 | cell-index = <0>; |
154 | compatible = "fsl,spi"; | |
5761bc5d | 155 | reg = <0x7000 0x1000>; |
cda13dd1 PG |
156 | interrupts = <16 0x8>; |
157 | interrupt-parent = <&ipic>; | |
5761bc5d LY |
158 | mode = "cpu"; |
159 | }; | |
160 | ||
dee80553 KG |
161 | dma@82a8 { |
162 | #address-cells = <1>; | |
163 | #size-cells = <1>; | |
164 | compatible = "fsl,mpc8378-dma", "fsl,elo-dma"; | |
165 | reg = <0x82a8 4>; | |
166 | ranges = <0 0x8100 0x1a8>; | |
167 | interrupt-parent = <&ipic>; | |
168 | interrupts = <71 8>; | |
169 | cell-index = <0>; | |
170 | dma-channel@0 { | |
171 | compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | |
172 | reg = <0 0x80>; | |
aeb42762 | 173 | cell-index = <0>; |
dee80553 KG |
174 | interrupt-parent = <&ipic>; |
175 | interrupts = <71 8>; | |
176 | }; | |
177 | dma-channel@80 { | |
178 | compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | |
179 | reg = <0x80 0x80>; | |
aeb42762 | 180 | cell-index = <1>; |
dee80553 KG |
181 | interrupt-parent = <&ipic>; |
182 | interrupts = <71 8>; | |
183 | }; | |
184 | dma-channel@100 { | |
185 | compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | |
186 | reg = <0x100 0x80>; | |
aeb42762 | 187 | cell-index = <2>; |
dee80553 KG |
188 | interrupt-parent = <&ipic>; |
189 | interrupts = <71 8>; | |
190 | }; | |
191 | dma-channel@180 { | |
192 | compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | |
193 | reg = <0x180 0x28>; | |
aeb42762 | 194 | cell-index = <3>; |
dee80553 KG |
195 | interrupt-parent = <&ipic>; |
196 | interrupts = <71 8>; | |
197 | }; | |
198 | }; | |
199 | ||
5761bc5d LY |
200 | usb@23000 { |
201 | compatible = "fsl-usb2-dr"; | |
202 | reg = <0x23000 0x1000>; | |
203 | #address-cells = <1>; | |
204 | #size-cells = <0>; | |
cda13dd1 PG |
205 | interrupt-parent = <&ipic>; |
206 | interrupts = <38 0x8>; | |
28b95885 LY |
207 | dr_mode = "host"; |
208 | phy_type = "ulpi"; | |
5761bc5d LY |
209 | }; |
210 | ||
211 | mdio@24520 { | |
212 | #address-cells = <1>; | |
213 | #size-cells = <0>; | |
214 | compatible = "fsl,gianfar-mdio"; | |
215 | reg = <0x24520 0x20>; | |
216 | phy2: ethernet-phy@2 { | |
cda13dd1 PG |
217 | interrupt-parent = <&ipic>; |
218 | interrupts = <17 0x8>; | |
219 | reg = <0x2>; | |
5761bc5d LY |
220 | device_type = "ethernet-phy"; |
221 | }; | |
222 | phy3: ethernet-phy@3 { | |
cda13dd1 PG |
223 | interrupt-parent = <&ipic>; |
224 | interrupts = <18 0x8>; | |
225 | reg = <0x3>; | |
5761bc5d LY |
226 | device_type = "ethernet-phy"; |
227 | }; | |
228 | }; | |
229 | ||
230 | enet0: ethernet@24000 { | |
231 | cell-index = <0>; | |
232 | device_type = "network"; | |
233 | model = "eTSEC"; | |
234 | compatible = "gianfar"; | |
235 | reg = <0x24000 0x1000>; | |
236 | local-mac-address = [ 00 00 00 00 00 00 ]; | |
cda13dd1 | 237 | interrupts = <32 0x8 33 0x8 34 0x8>; |
5761bc5d | 238 | phy-connection-type = "mii"; |
cda13dd1 PG |
239 | interrupt-parent = <&ipic>; |
240 | phy-handle = <&phy2>; | |
5761bc5d LY |
241 | }; |
242 | ||
243 | enet1: ethernet@25000 { | |
244 | cell-index = <1>; | |
245 | device_type = "network"; | |
246 | model = "eTSEC"; | |
247 | compatible = "gianfar"; | |
248 | reg = <0x25000 0x1000>; | |
249 | local-mac-address = [ 00 00 00 00 00 00 ]; | |
cda13dd1 | 250 | interrupts = <35 0x8 36 0x8 37 0x8>; |
5761bc5d | 251 | phy-connection-type = "mii"; |
cda13dd1 PG |
252 | interrupt-parent = <&ipic>; |
253 | phy-handle = <&phy3>; | |
5761bc5d LY |
254 | }; |
255 | ||
256 | serial0: serial@4500 { | |
257 | cell-index = <0>; | |
258 | device_type = "serial"; | |
259 | compatible = "ns16550"; | |
260 | reg = <0x4500 0x100>; | |
261 | clock-frequency = <0>; | |
cda13dd1 PG |
262 | interrupts = <9 0x8>; |
263 | interrupt-parent = <&ipic>; | |
5761bc5d LY |
264 | }; |
265 | ||
266 | serial1: serial@4600 { | |
267 | cell-index = <1>; | |
268 | device_type = "serial"; | |
269 | compatible = "ns16550"; | |
270 | reg = <0x4600 0x100>; | |
271 | clock-frequency = <0>; | |
cda13dd1 PG |
272 | interrupts = <10 0x8>; |
273 | interrupt-parent = <&ipic>; | |
5761bc5d LY |
274 | }; |
275 | ||
276 | crypto@30000 { | |
3fd44736 KP |
277 | compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", |
278 | "fsl,sec2.1", "fsl,sec2.0"; | |
5761bc5d | 279 | reg = <0x30000 0x10000>; |
cda13dd1 PG |
280 | interrupts = <11 0x8>; |
281 | interrupt-parent = <&ipic>; | |
3fd44736 KP |
282 | fsl,num-channels = <4>; |
283 | fsl,channel-fifo-len = <24>; | |
284 | fsl,exec-units-mask = <0x9fe>; | |
285 | fsl,descriptor-types-mask = <0x3ab0ebf>; | |
5761bc5d LY |
286 | }; |
287 | ||
288 | sdhc@2e000 { | |
289 | model = "eSDHC"; | |
290 | compatible = "fsl,esdhc"; | |
291 | reg = <0x2e000 0x1000>; | |
cda13dd1 PG |
292 | interrupts = <42 0x8>; |
293 | interrupt-parent = <&ipic>; | |
5761bc5d LY |
294 | }; |
295 | ||
296 | /* IPIC | |
297 | * interrupts cell = <intr #, sense> | |
298 | * sense values match linux IORESOURCE_IRQ_* defines: | |
299 | * sense == 8: Level, low assertion | |
300 | * sense == 2: Edge, high-to-low change | |
301 | */ | |
302 | ipic: pic@700 { | |
303 | compatible = "fsl,ipic"; | |
304 | interrupt-controller; | |
305 | #address-cells = <0>; | |
306 | #interrupt-cells = <2>; | |
307 | reg = <0x700 0x100>; | |
308 | }; | |
309 | }; | |
310 | ||
311 | pci0: pci@e0008500 { | |
312 | cell-index = <0>; | |
313 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | |
314 | interrupt-map = < | |
315 | ||
316 | /* IDSEL 0x11 */ | |
cda13dd1 PG |
317 | 0x8800 0x0 0x0 0x1 &ipic 20 0x8 |
318 | 0x8800 0x0 0x0 0x2 &ipic 21 0x8 | |
319 | 0x8800 0x0 0x0 0x3 &ipic 22 0x8 | |
320 | 0x8800 0x0 0x0 0x4 &ipic 23 0x8 | |
5761bc5d LY |
321 | |
322 | /* IDSEL 0x12 */ | |
cda13dd1 PG |
323 | 0x9000 0x0 0x0 0x1 &ipic 22 0x8 |
324 | 0x9000 0x0 0x0 0x2 &ipic 23 0x8 | |
325 | 0x9000 0x0 0x0 0x3 &ipic 20 0x8 | |
326 | 0x9000 0x0 0x0 0x4 &ipic 21 0x8 | |
5761bc5d LY |
327 | |
328 | /* IDSEL 0x13 */ | |
cda13dd1 PG |
329 | 0x9800 0x0 0x0 0x1 &ipic 23 0x8 |
330 | 0x9800 0x0 0x0 0x2 &ipic 20 0x8 | |
331 | 0x9800 0x0 0x0 0x3 &ipic 21 0x8 | |
332 | 0x9800 0x0 0x0 0x4 &ipic 22 0x8 | |
5761bc5d LY |
333 | |
334 | /* IDSEL 0x15 */ | |
cda13dd1 PG |
335 | 0xa800 0x0 0x0 0x1 &ipic 20 0x8 |
336 | 0xa800 0x0 0x0 0x2 &ipic 21 0x8 | |
337 | 0xa800 0x0 0x0 0x3 &ipic 22 0x8 | |
338 | 0xa800 0x0 0x0 0x4 &ipic 23 0x8 | |
5761bc5d LY |
339 | |
340 | /* IDSEL 0x16 */ | |
cda13dd1 PG |
341 | 0xb000 0x0 0x0 0x1 &ipic 23 0x8 |
342 | 0xb000 0x0 0x0 0x2 &ipic 20 0x8 | |
343 | 0xb000 0x0 0x0 0x3 &ipic 21 0x8 | |
344 | 0xb000 0x0 0x0 0x4 &ipic 22 0x8 | |
5761bc5d LY |
345 | |
346 | /* IDSEL 0x17 */ | |
cda13dd1 PG |
347 | 0xb800 0x0 0x0 0x1 &ipic 22 0x8 |
348 | 0xb800 0x0 0x0 0x2 &ipic 23 0x8 | |
349 | 0xb800 0x0 0x0 0x3 &ipic 20 0x8 | |
350 | 0xb800 0x0 0x0 0x4 &ipic 21 0x8 | |
5761bc5d LY |
351 | |
352 | /* IDSEL 0x18 */ | |
cda13dd1 PG |
353 | 0xc000 0x0 0x0 0x1 &ipic 21 0x8 |
354 | 0xc000 0x0 0x0 0x2 &ipic 22 0x8 | |
355 | 0xc000 0x0 0x0 0x3 &ipic 23 0x8 | |
356 | 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; | |
357 | interrupt-parent = <&ipic>; | |
358 | interrupts = <66 0x8>; | |
359 | bus-range = <0x0 0x0>; | |
5761bc5d LY |
360 | ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 |
361 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 | |
362 | 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; | |
363 | clock-frequency = <0>; | |
364 | #interrupt-cells = <1>; | |
365 | #size-cells = <2>; | |
366 | #address-cells = <3>; | |
367 | reg = <0xe0008500 0x100>; | |
368 | compatible = "fsl,mpc8349-pci"; | |
369 | device_type = "pci"; | |
370 | }; | |
371 | }; |