[linux-2.6-block.git] / arch / powerpc / boot / dts / mpc8349emitx.dts

/*
 * MPC8349E-mITX Device Tree Source
 *
 * Copyright 2006 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 */

/dts-v1/;

/ {
	model = "MPC8349EMITX";
	compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &enet0;
		ethernet1 = &enet1;
		serial0 = &serial0;
		serial1 = &serial1;
		pci0 = &pci0;
		pci1 = &pci1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,8349@0 {
			device_type = "cpu";
			reg = <0x0>;
			d-cache-line-size = <32>;
			i-cache-line-size = <32>;
			d-cache-size = <32768>;
			i-cache-size = <32768>;
			timebase-frequency = <0>;	// from bootloader
			bus-frequency = <0>;		// from bootloader
			clock-frequency = <0>;		// from bootloader
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x10000000>;
	};

	soc8349@e0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		compatible = "simple-bus";
		ranges = <0x0 0xe0000000 0x00100000>;
		reg = <0xe0000000 0x00000200>;
		bus-frequency = <0>;                    // from bootloader

		wdt@200 {
			device_type = "watchdog";
			compatible = "mpc83xx_wdt";
			reg = <0x200 0x100>;
		};

		i2c@3000 {
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <0>;
			compatible = "fsl-i2c";
			reg = <0x3000 0x100>;
			interrupts = <14 0x8>;
			interrupt-parent = <&ipic>;
			dfsrr;
		};

		i2c@3100 {
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <1>;
			compatible = "fsl-i2c";
			reg = <0x3100 0x100>;
			interrupts = <15 0x8>;
			interrupt-parent = <&ipic>;
			dfsrr;
		};

		spi@7000 {
			cell-index = <0>;
			compatible = "fsl,spi";
			reg = <0x7000 0x1000>;
			interrupts = <16 0x8>;
			interrupt-parent = <&ipic>;
			mode = "cpu";
		};

		dma@82a8 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
			reg = <0x82a8 4>;
			ranges = <0 0x8100 0x1a8>;
			interrupt-parent = <&ipic>;
			interrupts = <71 8>;
			cell-index = <0>;
			dma-channel@0 {
				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
				reg = <0 0x80>;
				cell-index = <0>;
				interrupt-parent = <&ipic>;
				interrupts = <71 8>;
			};
			dma-channel@80 {
				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
				reg = <0x80 0x80>;
				cell-index = <1>;
				interrupt-parent = <&ipic>;
				interrupts = <71 8>;
			};
			dma-channel@100 {
				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
				reg = <0x100 0x80>;
				cell-index = <2>;
				interrupt-parent = <&ipic>;
				interrupts = <71 8>;
			};
			dma-channel@180 {
				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
				reg = <0x180 0x28>;
				cell-index = <3>;
				interrupt-parent = <&ipic>;
				interrupts = <71 8>;
			};

			mcu_pio: mcu@a {
				#gpio-cells = <2>;
				compatible = "fsl,mc9s08qg8-mpc8349emitx",
					     "fsl,mcu-mpc8349emitx";
				reg = <0x0a>;
				gpio-controller;
			};
		};

		usb@22000 {
			compatible = "fsl-usb2-mph";
			reg = <0x22000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupt-parent = <&ipic>;
			interrupts = <39 0x8>;
			phy_type = "ulpi";
			port1;
		};

		usb@23000 {
			compatible = "fsl-usb2-dr";
			reg = <0x23000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupt-parent = <&ipic>;
			interrupts = <38 0x8>;
			dr_mode = "peripheral";
			phy_type = "ulpi";
		};

		mdio@24520 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "fsl,gianfar-mdio";
			reg = <0x24520 0x20>;

			/* Vitesse 8201 */
			phy1c: ethernet-phy@1c {
				interrupt-parent = <&ipic>;
				interrupts = <18 0x8>;
				reg = <0x1c>;
				device_type = "ethernet-phy";
			};
		};

		enet0: ethernet@24000 {
			cell-index = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x24000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <32 0x8 33 0x8 34 0x8>;
			interrupt-parent = <&ipic>;
			phy-handle = <&phy1c>;
			linux,network-index = <0>;
		};

		enet1: ethernet@25000 {
			cell-index = <1>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x25000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <35 0x8 36 0x8 37 0x8>;
			interrupt-parent = <&ipic>;
			/* Vitesse 7385 isn't on the MDIO bus */
			fixed-link = <1 1 1000 0 0>;
			linux,network-index = <1>;
		};

		serial0: serial@4500 {
			cell-index = <0>;
			device_type = "serial";
			compatible = "ns16550";
			reg = <0x4500 0x100>;
			clock-frequency = <0>;		// from bootloader
			interrupts = <9 0x8>;
			interrupt-parent = <&ipic>;
		};

		serial1: serial@4600 {
			cell-index = <1>;
			device_type = "serial";
			compatible = "ns16550";
			reg = <0x4600 0x100>;
			clock-frequency = <0>;		// from bootloader
			interrupts = <10 0x8>;
			interrupt-parent = <&ipic>;
		};

		crypto@30000 {
			compatible = "fsl,sec2.0";
			reg = <0x30000 0x10000>;
			interrupts = <11 0x8>;
			interrupt-parent = <&ipic>;
			fsl,num-channels = <4>;
			fsl,channel-fifo-len = <24>;
			fsl,exec-units-mask = <0x7e>;
			fsl,descriptor-types-mask = <0x01010ebf>;
		};

		ipic: pic@700 {
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <0x700 0x100>;
			device_type = "ipic";
		};
	};

	pci0: pci@e0008500 {
		cell-index = <1>;
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <
				/* IDSEL 0x10 - SATA */
				0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
				>;
		interrupt-parent = <&ipic>;
		interrupts = <66 0x8>;
		bus-range = <0x0 0x0>;
		ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
			  0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
			  0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
		clock-frequency = <66666666>;
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		reg = <0xe0008500 0x100		/* internal registers */
		       0xe0008300 0x8>;		/* config space access registers */
		compatible = "fsl,mpc8349-pci";
		device_type = "pci";
	};

	pci1: pci@e0008600 {
		cell-index = <2>;
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <
				/* IDSEL 0x0E - MiniPCI Slot */
				0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */

				/* IDSEL 0x0F - PCI Slot */
				0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
				0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
				>;
		interrupt-parent = <&ipic>;
		interrupts = <67 0x8>;
		bus-range = <0x0 0x0>;
		ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
			  0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
			  0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
		clock-frequency = <66666666>;
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		reg = <0xe0008600 0x100		/* internal registers */
		       0xe0008380 0x8>;		/* config space access registers */
		compatible = "fsl,mpc8349-pci";
		device_type = "pci";
	};

	localbus@e0005000 {
		#address-cells = <2>;
		#size-cells = <1>;
		compatible = "fsl,mpc8349e-localbus",
			     "fsl,pq2pro-localbus";
		reg = <0xe0005000 0xd8>;
		ranges = <0x3 0x0 0xf0000000 0x210>;

		pata@3,0 {
			compatible = "fsl,mpc8349emitx-pata", "ata-generic";
			reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
			reg-shift = <1>;
			pio-mode = <6>;
			interrupts = <23 0x8>;
			interrupt-parent = <&ipic>;
		};
	};
};
Commit	Line	Data
74c37e8c TT	1	/*
	2	* MPC8349E-mITX Device Tree Source
	3	*
	4	* Copyright 2006 Freescale Semiconductor Inc.
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License as published by the
	8	* Free Software Foundation; either version 2 of the License, or (at your
	9	* option) any later version.
	10	*/
cda13dd1 PG	11
	12	/dts-v1/;
	13
74c37e8c TT	14	/ {
74c37e8c TT	15	model = "MPC8349EMITX";
d71a1dc6	16	compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
74c37e8c TT	17	#address-cells = <1>;
	18	#size-cells = <1>;
	19
ea082fa9 KG	20	aliases {
	21	ethernet0 = &enet0;
	22	ethernet1 = &enet1;
	23	serial0 = &serial0;
	24	serial1 = &serial1;
	25	pci0 = &pci0;
	26	pci1 = &pci1;
	27	};
	28
74c37e8c	29	cpus {
74c37e8c TT	30	#address-cells = <1>;
	31	#size-cells = <0>;
	32
	33	PowerPC,8349@0 {
	34	device_type = "cpu";
cda13dd1 PG	35	reg = <0x0>;
	36	d-cache-line-size = <32>;
	37	i-cache-line-size = <32>;
	38	d-cache-size = <32768>;
	39	i-cache-size = <32768>;
74c37e8c TT	40	timebase-frequency = <0>; // from bootloader
	41	bus-frequency = <0>; // from bootloader
	42	clock-frequency = <0>; // from bootloader
74c37e8c TT	43	};
	44	};
	45
	46	memory {
	47	device_type = "memory";
cda13dd1	48	reg = <0x00000000 0x10000000>;
74c37e8c TT	49	};
	50
	51	soc8349@e0000000 {
	52	#address-cells = <1>;
	53	#size-cells = <1>;
74c37e8c	54	device_type = "soc";
cf0d19fb	55	compatible = "simple-bus";
cda13dd1 PG	56	ranges = <0x0 0xe0000000 0x00100000>;
cda13dd1 PG	57	reg = <0xe0000000 0x00000200>;
74c37e8c TT	58	bus-frequency = <0>; // from bootloader
	59
	60	wdt@200 {
	61	device_type = "watchdog";
	62	compatible = "mpc83xx_wdt";
cda13dd1	63	reg = <0x200 0x100>;
74c37e8c TT	64	};
	65
	66	i2c@3000 {
ec9686c4 KG	67	#address-cells = <1>;
	68	#size-cells = <0>;
	69	cell-index = <0>;
74c37e8c	70	compatible = "fsl-i2c";
cda13dd1 PG	71	reg = <0x3000 0x100>;
	72	interrupts = <14 0x8>;
	73	interrupt-parent = <&ipic>;
74c37e8c TT	74	dfsrr;
	75	};
	76
	77	i2c@3100 {
ec9686c4 KG	78	#address-cells = <1>;
	79	#size-cells = <0>;
	80	cell-index = <1>;
74c37e8c	81	compatible = "fsl-i2c";
cda13dd1 PG	82	reg = <0x3100 0x100>;
	83	interrupts = <15 0x8>;
	84	interrupt-parent = <&ipic>;
74c37e8c TT	85	dfsrr;
	86	};
	87
	88	spi@7000 {
f3a2b29d AV	89	cell-index = <0>;
f3a2b29d AV	90	compatible = "fsl,spi";
cda13dd1 PG	91	reg = <0x7000 0x1000>;
	92	interrupts = <16 0x8>;
	93	interrupt-parent = <&ipic>;
33799e33	94	mode = "cpu";
74c37e8c TT	95	};
74c37e8c TT	96
dee80553 KG	97	dma@82a8 {
	98	#address-cells = <1>;
	99	#size-cells = <1>;
	100	compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
	101	reg = <0x82a8 4>;
	102	ranges = <0 0x8100 0x1a8>;
	103	interrupt-parent = <&ipic>;
	104	interrupts = <71 8>;
	105	cell-index = <0>;
	106	dma-channel@0 {
	107	compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
	108	reg = <0 0x80>;
aeb42762	109	cell-index = <0>;
dee80553 KG	110	interrupt-parent = <&ipic>;
	111	interrupts = <71 8>;
	112	};
	113	dma-channel@80 {
	114	compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
	115	reg = <0x80 0x80>;
aeb42762	116	cell-index = <1>;
dee80553 KG	117	interrupt-parent = <&ipic>;
	118	interrupts = <71 8>;
	119	};
	120	dma-channel@100 {
	121	compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
	122	reg = <0x100 0x80>;
aeb42762	123	cell-index = <2>;
dee80553 KG	124	interrupt-parent = <&ipic>;
	125	interrupts = <71 8>;
	126	};
	127	dma-channel@180 {
	128	compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
	129	reg = <0x180 0x28>;
aeb42762	130	cell-index = <3>;
dee80553 KG	131	interrupt-parent = <&ipic>;
	132	interrupts = <71 8>;
	133	};
44274698 AV	134
	135	mcu_pio: mcu@a {
	136	#gpio-cells = <2>;
	137	compatible = "fsl,mc9s08qg8-mpc8349emitx",
	138	"fsl,mcu-mpc8349emitx";
	139	reg = <0x0a>;
	140	gpio-controller;
	141	};
dee80553 KG	142	};
dee80553 KG	143
74c37e8c	144	usb@22000 {
74c37e8c	145	compatible = "fsl-usb2-mph";
cda13dd1	146	reg = <0x22000 0x1000>;
74c37e8c TT	147	#address-cells = <1>;
74c37e8c TT	148	#size-cells = <0>;
cda13dd1 PG	149	interrupt-parent = <&ipic>;
cda13dd1 PG	150	interrupts = <39 0x8>;
74c37e8c TT	151	phy_type = "ulpi";
	152	port1;
	153	};
	154
	155	usb@23000 {
74c37e8c	156	compatible = "fsl-usb2-dr";
cda13dd1	157	reg = <0x23000 0x1000>;
74c37e8c TT	158	#address-cells = <1>;
74c37e8c TT	159	#size-cells = <0>;
cda13dd1 PG	160	interrupt-parent = <&ipic>;
cda13dd1 PG	161	interrupts = <38 0x8>;
f93c7c5a	162	dr_mode = "peripheral";
74c37e8c TT	163	phy_type = "ulpi";
	164	};
	165
	166	mdio@24520 {
74c37e8c TT	167	#address-cells = <1>;
74c37e8c TT	168	#size-cells = <0>;
e77b28eb	169	compatible = "fsl,gianfar-mdio";
cda13dd1	170	reg = <0x24520 0x20>;
74c37e8c TT	171
74c37e8c TT	172	/* Vitesse 8201 */
d71a1dc6	173	phy1c: ethernet-phy@1c {
cda13dd1 PG	174	interrupt-parent = <&ipic>;
	175	interrupts = <18 0x8>;
	176	reg = <0x1c>;
74c37e8c TT	177	device_type = "ethernet-phy";
74c37e8c TT	178	};
74c37e8c TT	179	};
74c37e8c TT	180
e77b28eb KG	181	enet0: ethernet@24000 {
e77b28eb KG	182	cell-index = <0>;
74c37e8c TT	183	device_type = "network";
	184	model = "TSEC";
	185	compatible = "gianfar";
cda13dd1	186	reg = <0x24000 0x1000>;
74c37e8c	187	local-mac-address = [ 00 00 00 00 00 00 ];
cda13dd1 PG	188	interrupts = <32 0x8 33 0x8 34 0x8>;
	189	interrupt-parent = <&ipic>;
	190	phy-handle = <&phy1c>;
ad25a4cc	191	linux,network-index = <0>;
74c37e8c TT	192	};
74c37e8c TT	193
e77b28eb KG	194	enet1: ethernet@25000 {
e77b28eb KG	195	cell-index = <1>;
74c37e8c TT	196	device_type = "network";
	197	model = "TSEC";
	198	compatible = "gianfar";
cda13dd1	199	reg = <0x25000 0x1000>;
74c37e8c	200	local-mac-address = [ 00 00 00 00 00 00 ];
cda13dd1 PG	201	interrupts = <35 0x8 36 0x8 37 0x8>;
cda13dd1 PG	202	interrupt-parent = <&ipic>;
e3000765	203	/* Vitesse 7385 isn't on the MDIO bus */
cda13dd1	204	fixed-link = <1 1 1000 0 0>;
ad25a4cc	205	linux,network-index = <1>;
74c37e8c TT	206	};
74c37e8c TT	207
ea082fa9 KG	208	serial0: serial@4500 {
ea082fa9 KG	209	cell-index = <0>;
74c37e8c TT	210	device_type = "serial";
74c37e8c TT	211	compatible = "ns16550";
cda13dd1	212	reg = <0x4500 0x100>;
74c37e8c	213	clock-frequency = <0>; // from bootloader
cda13dd1 PG	214	interrupts = <9 0x8>;
cda13dd1 PG	215	interrupt-parent = <&ipic>;
74c37e8c TT	216	};
74c37e8c TT	217
ea082fa9 KG	218	serial1: serial@4600 {
ea082fa9 KG	219	cell-index = <1>;
74c37e8c TT	220	device_type = "serial";
74c37e8c TT	221	compatible = "ns16550";
cda13dd1	222	reg = <0x4600 0x100>;
74c37e8c	223	clock-frequency = <0>; // from bootloader
cda13dd1 PG	224	interrupts = <10 0x8>;
cda13dd1 PG	225	interrupt-parent = <&ipic>;
74c37e8c TT	226	};
74c37e8c TT	227
74c37e8c	228	crypto@30000 {
3fd44736	229	compatible = "fsl,sec2.0";
cda13dd1 PG	230	reg = <0x30000 0x10000>;
	231	interrupts = <11 0x8>;
	232	interrupt-parent = <&ipic>;
3fd44736 KP	233	fsl,num-channels = <4>;
	234	fsl,channel-fifo-len = <24>;
	235	fsl,exec-units-mask = <0x7e>;
	236	fsl,descriptor-types-mask = <0x01010ebf>;
74c37e8c TT	237	};
74c37e8c TT	238
d71a1dc6	239	ipic: pic@700 {
74c37e8c TT	240	interrupt-controller;
	241	#address-cells = <0>;
	242	#interrupt-cells = <2>;
cda13dd1	243	reg = <0x700 0x100>;
74c37e8c TT	244	device_type = "ipic";
	245	};
	246	};
1b3c5cda	247
ea082fa9 KG	248	pci0: pci@e0008500 {
ea082fa9 KG	249	cell-index = <1>;
cda13dd1	250	interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
1b3c5cda KG	251	interrupt-map = <
1b3c5cda KG	252	/* IDSEL 0x10 - SATA */
cda13dd1	253	0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
1b3c5cda	254	>;
cda13dd1 PG	255	interrupt-parent = <&ipic>;
	256	interrupts = <66 0x8>;
	257	bus-range = <0x0 0x0>;
	258	ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
	259	0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
	260	0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
	261	clock-frequency = <66666666>;
1b3c5cda KG	262	#interrupt-cells = <1>;
	263	#size-cells = <2>;
	264	#address-cells = <3>;
5b70a097 JR	265	reg = <0xe0008500 0x100 /* internal registers */
5b70a097 JR	266	0xe0008300 0x8>; /* config space access registers */
1b3c5cda KG	267	compatible = "fsl,mpc8349-pci";
	268	device_type = "pci";
	269	};
	270
ea082fa9 KG	271	pci1: pci@e0008600 {
ea082fa9 KG	272	cell-index = <2>;
cda13dd1	273	interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
1b3c5cda KG	274	interrupt-map = <
1b3c5cda KG	275	/* IDSEL 0x0E - MiniPCI Slot */
cda13dd1	276	0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
1b3c5cda KG	277
1b3c5cda KG	278	/* IDSEL 0x0F - PCI Slot */
cda13dd1 PG	279	0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
	280	0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
	281	>;
	282	interrupt-parent = <&ipic>;
	283	interrupts = <67 0x8>;
	284	bus-range = <0x0 0x0>;
	285	ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
	286	0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
	287	0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
	288	clock-frequency = <66666666>;
1b3c5cda KG	289	#interrupt-cells = <1>;
	290	#size-cells = <2>;
	291	#address-cells = <3>;
5b70a097 JR	292	reg = <0xe0008600 0x100 /* internal registers */
5b70a097 JR	293	0xe0008380 0x8>; /* config space access registers */
1b3c5cda KG	294	compatible = "fsl,mpc8349-pci";
	295	device_type = "pci";
	296	};
	297
9b6d19dd AV	298	localbus@e0005000 {
	299	#address-cells = <2>;
	300	#size-cells = <1>;
	301	compatible = "fsl,mpc8349e-localbus",
	302	"fsl,pq2pro-localbus";
cda13dd1 PG	303	reg = <0xe0005000 0xd8>;
cda13dd1 PG	304	ranges = <0x3 0x0 0xf0000000 0x210>;
1b3c5cda	305
9b6d19dd AV	306	pata@3,0 {
9b6d19dd AV	307	compatible = "fsl,mpc8349emitx-pata", "ata-generic";
cda13dd1	308	reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
9b6d19dd AV	309	reg-shift = <1>;
9b6d19dd AV	310	pio-mode = <6>;
cda13dd1	311	interrupts = <23 0x8>;
9b6d19dd AV	312	interrupt-parent = <&ipic>;
	313	};
	314	};
74c37e8c	315	};