[linux-2.6-block.git] / arch / powerpc / boot / dts / mpc8349emitx.dts

/*
 * MPC8349E-mITX Device Tree Source
 *
 * Copyright 2006 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 */

/dts-v1/;

/ {
	model = "MPC8349EMITX";
	compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &enet0;
		ethernet1 = &enet1;
		serial0 = &serial0;
		serial1 = &serial1;
		pci0 = &pci0;
		pci1 = &pci1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,8349@0 {
			device_type = "cpu";
			reg = <0x0>;
			d-cache-line-size = <32>;
			i-cache-line-size = <32>;
			d-cache-size = <32768>;
			i-cache-size = <32768>;
			timebase-frequency = <0>;	// from bootloader
			bus-frequency = <0>;		// from bootloader
			clock-frequency = <0>;		// from bootloader
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x10000000>;
	};

	soc8349@e0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		compatible = "simple-bus";
		ranges = <0x0 0xe0000000 0x00100000>;
		reg = <0xe0000000 0x00000200>;
		bus-frequency = <0>;                    // from bootloader

		wdt@200 {
			device_type = "watchdog";
			compatible = "mpc83xx_wdt";
			reg = <0x200 0x100>;
		};

		gpio1: gpio-controller@c00 {
			#gpio-cells = <2>;
			compatible = "fsl,mpc8349-gpio";
			reg = <0xc00 0x100>;
			interrupts = <74 0x8>;
			interrupt-parent = <&ipic>;
			gpio-controller;
		};

		gpio2: gpio-controller@d00 {
			#gpio-cells = <2>;
			compatible = "fsl,mpc8349-gpio";
			reg = <0xd00 0x100>;
			interrupts = <75 0x8>;
			interrupt-parent = <&ipic>;
			gpio-controller;
		};

		i2c@3000 {
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <0>;
			compatible = "fsl-i2c";
			reg = <0x3000 0x100>;
			interrupts = <14 0x8>;
			interrupt-parent = <&ipic>;
			dfsrr;

			eeprom: at24@50 {
				compatible = "st-micro,24c256";
				reg = <0x50>;
			};

		};

		i2c@3100 {
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <1>;
			compatible = "fsl-i2c";
			reg = <0x3100 0x100>;
			interrupts = <15 0x8>;
			interrupt-parent = <&ipic>;
			dfsrr;

			rtc@68 {
				compatible = "dallas,ds1339";
				reg = <0x68>;
				interrupts = <18 0x8>;
				interrupt-parent = <&ipic>;
			};

			pcf1: iexp@38 {
				#gpio-cells = <2>;
				compatible = "ti,pcf8574a";
				reg = <0x38>;
				gpio-controller;
			};

			pcf2: iexp@39 {
				#gpio-cells = <2>;
				compatible = "ti,pcf8574a";
				reg = <0x39>;
				gpio-controller;
			};

			spd: at24@51 {
				compatible = "at24,spd";
				reg = <0x51>;
			};

			mcu_pio: mcu@a {
				#gpio-cells = <2>;
				compatible = "fsl,mc9s08qg8-mpc8349emitx",
					     "fsl,mcu-mpc8349emitx";
				reg = <0x0a>;
				gpio-controller;
			};
		};

		spi@7000 {
			cell-index = <0>;
			compatible = "fsl,spi";
			reg = <0x7000 0x1000>;
			interrupts = <16 0x8>;
			interrupt-parent = <&ipic>;
			mode = "cpu";
		};

		dma@82a8 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
			reg = <0x82a8 4>;
			ranges = <0 0x8100 0x1a8>;
			interrupt-parent = <&ipic>;
			interrupts = <71 8>;
			cell-index = <0>;
			dma-channel@0 {
				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
				reg = <0 0x80>;
				cell-index = <0>;
				interrupt-parent = <&ipic>;
				interrupts = <71 8>;
			};
			dma-channel@80 {
				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
				reg = <0x80 0x80>;
				cell-index = <1>;
				interrupt-parent = <&ipic>;
				interrupts = <71 8>;
			};
			dma-channel@100 {
				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
				reg = <0x100 0x80>;
				cell-index = <2>;
				interrupt-parent = <&ipic>;
				interrupts = <71 8>;
			};
			dma-channel@180 {
				compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
				reg = <0x180 0x28>;
				cell-index = <3>;
				interrupt-parent = <&ipic>;
				interrupts = <71 8>;
			};
		};

		usb@22000 {
			compatible = "fsl-usb2-mph";
			reg = <0x22000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupt-parent = <&ipic>;
			interrupts = <39 0x8>;
			phy_type = "ulpi";
			port0;
		};

		usb@23000 {
			compatible = "fsl-usb2-dr";
			reg = <0x23000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupt-parent = <&ipic>;
			interrupts = <38 0x8>;
			dr_mode = "peripheral";
			phy_type = "ulpi";
		};

		enet0: ethernet@24000 {
			#address-cells = <1>;
			#size-cells = <1>;
			cell-index = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x24000 0x1000>;
			ranges = <0x0 0x24000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <32 0x8 33 0x8 34 0x8>;
			interrupt-parent = <&ipic>;
			tbi-handle = <&tbi0>;
			phy-handle = <&phy1c>;
			linux,network-index = <0>;

			mdio@520 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,gianfar-mdio";
				reg = <0x520 0x20>;

				/* Vitesse 8201 */
				phy1c: ethernet-phy@1c {
					interrupt-parent = <&ipic>;
					interrupts = <18 0x8>;
					reg = <0x1c>;
				};

				tbi0: tbi-phy@11 {
					reg = <0x11>;
					device_type = "tbi-phy";
				};
			};
		};

		enet1: ethernet@25000 {
			#address-cells = <1>;
			#size-cells = <1>;
			cell-index = <1>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x25000 0x1000>;
			ranges = <0x0 0x25000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <35 0x8 36 0x8 37 0x8>;
			interrupt-parent = <&ipic>;
			/* Vitesse 7385 isn't on the MDIO bus */
			fixed-link = <1 1 1000 0 0>;
			linux,network-index = <1>;
			tbi-handle = <&tbi1>;

			mdio@520 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,gianfar-tbi";
				reg = <0x520 0x20>;

				tbi1: tbi-phy@11 {
					reg = <0x11>;
					device_type = "tbi-phy";
				};
			};
		};

		serial0: serial@4500 {
			cell-index = <0>;
			device_type = "serial";
			compatible = "fsl,ns16550", "ns16550";
			reg = <0x4500 0x100>;
			clock-frequency = <0>;		// from bootloader
			interrupts = <9 0x8>;
			interrupt-parent = <&ipic>;
		};

		serial1: serial@4600 {
			cell-index = <1>;
			device_type = "serial";
			compatible = "fsl,ns16550", "ns16550";
			reg = <0x4600 0x100>;
			clock-frequency = <0>;		// from bootloader
			interrupts = <10 0x8>;
			interrupt-parent = <&ipic>;
		};

		crypto@30000 {
			compatible = "fsl,sec2.0";
			reg = <0x30000 0x10000>;
			interrupts = <11 0x8>;
			interrupt-parent = <&ipic>;
			fsl,num-channels = <4>;
			fsl,channel-fifo-len = <24>;
			fsl,exec-units-mask = <0x7e>;
			fsl,descriptor-types-mask = <0x01010ebf>;
		};

		ipic: pic@700 {
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <0x700 0x100>;
			device_type = "ipic";
		};

		gpio-leds {
			compatible = "gpio-leds";

			green {
				label = "Green";
				gpios = <&pcf1 0 1>;
				linux,default-trigger = "heartbeat";
			};

			yellow {
				label = "Yellow";
				gpios = <&pcf1 1 1>;
				/* linux,default-trigger = "heartbeat"; */
				default-state = "on";
			};
		};

	};

	pci0: pci@e0008500 {
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <
				/* IDSEL 0x10 - SATA */
				0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
				>;
		interrupt-parent = <&ipic>;
		interrupts = <66 0x8>;
		bus-range = <0x0 0x0>;
		ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
			  0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
			  0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
		clock-frequency = <66666666>;
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		reg = <0xe0008500 0x100		/* internal registers */
		       0xe0008300 0x8>;		/* config space access registers */
		compatible = "fsl,mpc8349-pci";
		device_type = "pci";
	};

	pci1: pci@e0008600 {
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <
				/* IDSEL 0x0E - MiniPCI Slot */
				0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */

				/* IDSEL 0x0F - PCI Slot */
				0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
				0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
				>;
		interrupt-parent = <&ipic>;
		interrupts = <67 0x8>;
		bus-range = <0x0 0x0>;
		ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
			  0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
			  0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
		clock-frequency = <66666666>;
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		reg = <0xe0008600 0x100		/* internal registers */
		       0xe0008380 0x8>;		/* config space access registers */
		compatible = "fsl,mpc8349-pci";
		device_type = "pci";
	};

	localbus@e0005000 {
		#address-cells = <2>;
		#size-cells = <1>;
		compatible = "fsl,mpc8349e-localbus",
			     "fsl,pq2pro-localbus",
			     "simple-bus";
		reg = <0xe0005000 0xd8>;
		ranges = <0x0 0x0 0xfe000000 0x1000000	/* flash */
			  0x1 0x0 0xf8000000 0x20000	/* VSC 7385 */
			  0x2 0x0 0xf9000000 0x200000	/* exp slot */
			  0x3 0x0 0xf0000000 0x210>;	/* CF slot */

		flash@0,0 {
			compatible = "cfi-flash";
			reg = <0x0      0x0 0x800000>;
			bank-width = <2>;
			device-width = <1>;
		};

		flash@0,800000 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "cfi-flash";
			reg = <0x0 0x800000 0x800000>;
			bank-width = <2>;
			device-width = <1>;
		};

		pata@3,0 {
			compatible = "fsl,mpc8349emitx-pata", "ata-generic";
			reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
			reg-shift = <1>;
			pio-mode = <6>;
			interrupts = <23 0x8>;
			interrupt-parent = <&ipic>;
		};
	};
};
Commit	Line	Data
74c37e8c TT	1	/*
	2	* MPC8349E-mITX Device Tree Source
	3	*
	4	* Copyright 2006 Freescale Semiconductor Inc.
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License as published by the
	8	* Free Software Foundation; either version 2 of the License, or (at your
	9	* option) any later version.
	10	*/
cda13dd1 PG	11
	12	/dts-v1/;
	13
74c37e8c TT	14	/ {
74c37e8c TT	15	model = "MPC8349EMITX";
d71a1dc6	16	compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
74c37e8c TT	17	#address-cells = <1>;
	18	#size-cells = <1>;
	19
ea082fa9 KG	20	aliases {
	21	ethernet0 = &enet0;
	22	ethernet1 = &enet1;
	23	serial0 = &serial0;
	24	serial1 = &serial1;
	25	pci0 = &pci0;
	26	pci1 = &pci1;
	27	};
	28
74c37e8c	29	cpus {
74c37e8c TT	30	#address-cells = <1>;
	31	#size-cells = <0>;
	32
	33	PowerPC,8349@0 {
	34	device_type = "cpu";
cda13dd1 PG	35	reg = <0x0>;
	36	d-cache-line-size = <32>;
	37	i-cache-line-size = <32>;
	38	d-cache-size = <32768>;
	39	i-cache-size = <32768>;
74c37e8c TT	40	timebase-frequency = <0>; // from bootloader
	41	bus-frequency = <0>; // from bootloader
	42	clock-frequency = <0>; // from bootloader
74c37e8c TT	43	};
	44	};
	45
	46	memory {
	47	device_type = "memory";
cda13dd1	48	reg = <0x00000000 0x10000000>;
74c37e8c TT	49	};
	50
	51	soc8349@e0000000 {
	52	#address-cells = <1>;
	53	#size-cells = <1>;
74c37e8c	54	device_type = "soc";
cf0d19fb	55	compatible = "simple-bus";
cda13dd1 PG	56	ranges = <0x0 0xe0000000 0x00100000>;
cda13dd1 PG	57	reg = <0xe0000000 0x00000200>;
74c37e8c TT	58	bus-frequency = <0>; // from bootloader
	59
	60	wdt@200 {
	61	device_type = "watchdog";
	62	compatible = "mpc83xx_wdt";
cda13dd1	63	reg = <0x200 0x100>;
74c37e8c TT	64	};
74c37e8c TT	65
9174e498 DES	66	gpio1: gpio-controller@c00 {
	67	#gpio-cells = <2>;
	68	compatible = "fsl,mpc8349-gpio";
	69	reg = <0xc00 0x100>;
	70	interrupts = <74 0x8>;
	71	interrupt-parent = <&ipic>;
	72	gpio-controller;
	73	};
	74
	75	gpio2: gpio-controller@d00 {
	76	#gpio-cells = <2>;
	77	compatible = "fsl,mpc8349-gpio";
	78	reg = <0xd00 0x100>;
	79	interrupts = <75 0x8>;
	80	interrupt-parent = <&ipic>;
	81	gpio-controller;
	82	};
	83
74c37e8c	84	i2c@3000 {
ec9686c4 KG	85	#address-cells = <1>;
	86	#size-cells = <0>;
	87	cell-index = <0>;
74c37e8c	88	compatible = "fsl-i2c";
cda13dd1 PG	89	reg = <0x3000 0x100>;
	90	interrupts = <14 0x8>;
	91	interrupt-parent = <&ipic>;
74c37e8c	92	dfsrr;
3320cf84 DES	93
	94	eeprom: at24@50 {
	95	compatible = "st-micro,24c256";
	96	reg = <0x50>;
	97	};
	98
74c37e8c TT	99	};
	100
	101	i2c@3100 {
ec9686c4 KG	102	#address-cells = <1>;
	103	#size-cells = <0>;
	104	cell-index = <1>;
74c37e8c	105	compatible = "fsl-i2c";
cda13dd1 PG	106	reg = <0x3100 0x100>;
	107	interrupts = <15 0x8>;
	108	interrupt-parent = <&ipic>;
74c37e8c	109	dfsrr;
672e806e AV	110
672e806e AV	111	rtc@68 {
672e806e AV	112	compatible = "dallas,ds1339";
	113	reg = <0x68>;
	114	interrupts = <18 0x8>;
	115	interrupt-parent = <&ipic>;
	116	};
dafdb613	117
3320cf84 DES	118	pcf1: iexp@38 {
	119	#gpio-cells = <2>;
	120	compatible = "ti,pcf8574a";
	121	reg = <0x38>;
	122	gpio-controller;
	123	};
	124
	125	pcf2: iexp@39 {
	126	#gpio-cells = <2>;
	127	compatible = "ti,pcf8574a";
	128	reg = <0x39>;
	129	gpio-controller;
	130	};
	131
	132	spd: at24@51 {
	133	compatible = "at24,spd";
	134	reg = <0x51>;
	135	};
	136
dafdb613 AV	137	mcu_pio: mcu@a {
	138	#gpio-cells = <2>;
	139	compatible = "fsl,mc9s08qg8-mpc8349emitx",
	140	"fsl,mcu-mpc8349emitx";
	141	reg = <0x0a>;
	142	gpio-controller;
	143	};
74c37e8c TT	144	};
	145
	146	spi@7000 {
f3a2b29d AV	147	cell-index = <0>;
f3a2b29d AV	148	compatible = "fsl,spi";
cda13dd1 PG	149	reg = <0x7000 0x1000>;
	150	interrupts = <16 0x8>;
	151	interrupt-parent = <&ipic>;
33799e33	152	mode = "cpu";
74c37e8c TT	153	};
74c37e8c TT	154
dee80553 KG	155	dma@82a8 {
	156	#address-cells = <1>;
	157	#size-cells = <1>;
	158	compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
	159	reg = <0x82a8 4>;
	160	ranges = <0 0x8100 0x1a8>;
	161	interrupt-parent = <&ipic>;
	162	interrupts = <71 8>;
	163	cell-index = <0>;
	164	dma-channel@0 {
	165	compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
	166	reg = <0 0x80>;
aeb42762	167	cell-index = <0>;
dee80553 KG	168	interrupt-parent = <&ipic>;
	169	interrupts = <71 8>;
	170	};
	171	dma-channel@80 {
	172	compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
	173	reg = <0x80 0x80>;
aeb42762	174	cell-index = <1>;
dee80553 KG	175	interrupt-parent = <&ipic>;
	176	interrupts = <71 8>;
	177	};
	178	dma-channel@100 {
	179	compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
	180	reg = <0x100 0x80>;
aeb42762	181	cell-index = <2>;
dee80553 KG	182	interrupt-parent = <&ipic>;
	183	interrupts = <71 8>;
	184	};
	185	dma-channel@180 {
	186	compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
	187	reg = <0x180 0x28>;
aeb42762	188	cell-index = <3>;
dee80553 KG	189	interrupt-parent = <&ipic>;
	190	interrupts = <71 8>;
	191	};
	192	};
	193
74c37e8c	194	usb@22000 {
74c37e8c	195	compatible = "fsl-usb2-mph";
cda13dd1	196	reg = <0x22000 0x1000>;
74c37e8c TT	197	#address-cells = <1>;
74c37e8c TT	198	#size-cells = <0>;
cda13dd1 PG	199	interrupt-parent = <&ipic>;
cda13dd1 PG	200	interrupts = <39 0x8>;
74c37e8c	201	phy_type = "ulpi";
b7d66c88	202	port0;
74c37e8c TT	203	};
	204
	205	usb@23000 {
74c37e8c	206	compatible = "fsl-usb2-dr";
cda13dd1	207	reg = <0x23000 0x1000>;
74c37e8c TT	208	#address-cells = <1>;
74c37e8c TT	209	#size-cells = <0>;
cda13dd1 PG	210	interrupt-parent = <&ipic>;
cda13dd1 PG	211	interrupts = <38 0x8>;
f93c7c5a	212	dr_mode = "peripheral";
74c37e8c TT	213	phy_type = "ulpi";
	214	};
	215
e77b28eb	216	enet0: ethernet@24000 {
70b3adbb AV	217	#address-cells = <1>;
70b3adbb AV	218	#size-cells = <1>;
e77b28eb	219	cell-index = <0>;
74c37e8c TT	220	device_type = "network";
	221	model = "TSEC";
	222	compatible = "gianfar";
cda13dd1	223	reg = <0x24000 0x1000>;
70b3adbb	224	ranges = <0x0 0x24000 0x1000>;
74c37e8c	225	local-mac-address = [ 00 00 00 00 00 00 ];
cda13dd1 PG	226	interrupts = <32 0x8 33 0x8 34 0x8>;
cda13dd1 PG	227	interrupt-parent = <&ipic>;
b31a1d8b	228	tbi-handle = <&tbi0>;
cda13dd1	229	phy-handle = <&phy1c>;
ad25a4cc	230	linux,network-index = <0>;
70b3adbb AV	231
	232	mdio@520 {
	233	#address-cells = <1>;
	234	#size-cells = <0>;
	235	compatible = "fsl,gianfar-mdio";
	236	reg = <0x520 0x20>;
	237
	238	/* Vitesse 8201 */
	239	phy1c: ethernet-phy@1c {
	240	interrupt-parent = <&ipic>;
	241	interrupts = <18 0x8>;
	242	reg = <0x1c>;
70b3adbb AV	243	};
	244
	245	tbi0: tbi-phy@11 {
	246	reg = <0x11>;
	247	device_type = "tbi-phy";
	248	};
	249	};
74c37e8c TT	250	};
74c37e8c TT	251
e77b28eb	252	enet1: ethernet@25000 {
70b3adbb AV	253	#address-cells = <1>;
70b3adbb AV	254	#size-cells = <1>;
e77b28eb	255	cell-index = <1>;
74c37e8c TT	256	device_type = "network";
	257	model = "TSEC";
	258	compatible = "gianfar";
cda13dd1	259	reg = <0x25000 0x1000>;
70b3adbb	260	ranges = <0x0 0x25000 0x1000>;
74c37e8c	261	local-mac-address = [ 00 00 00 00 00 00 ];
cda13dd1 PG	262	interrupts = <35 0x8 36 0x8 37 0x8>;
cda13dd1 PG	263	interrupt-parent = <&ipic>;
e3000765	264	/* Vitesse 7385 isn't on the MDIO bus */
cda13dd1	265	fixed-link = <1 1 1000 0 0>;
ad25a4cc	266	linux,network-index = <1>;
b31a1d8b	267	tbi-handle = <&tbi1>;
70b3adbb AV	268
	269	mdio@520 {
	270	#address-cells = <1>;
	271	#size-cells = <0>;
	272	compatible = "fsl,gianfar-tbi";
	273	reg = <0x520 0x20>;
	274
	275	tbi1: tbi-phy@11 {
	276	reg = <0x11>;
	277	device_type = "tbi-phy";
	278	};
	279	};
74c37e8c TT	280	};
74c37e8c TT	281
ea082fa9 KG	282	serial0: serial@4500 {
ea082fa9 KG	283	cell-index = <0>;
74c37e8c	284	device_type = "serial";
f706bed1	285	compatible = "fsl,ns16550", "ns16550";
cda13dd1	286	reg = <0x4500 0x100>;
74c37e8c	287	clock-frequency = <0>; // from bootloader
cda13dd1 PG	288	interrupts = <9 0x8>;
cda13dd1 PG	289	interrupt-parent = <&ipic>;
74c37e8c TT	290	};
74c37e8c TT	291
ea082fa9 KG	292	serial1: serial@4600 {
ea082fa9 KG	293	cell-index = <1>;
74c37e8c	294	device_type = "serial";
f706bed1	295	compatible = "fsl,ns16550", "ns16550";
cda13dd1	296	reg = <0x4600 0x100>;
74c37e8c	297	clock-frequency = <0>; // from bootloader
cda13dd1 PG	298	interrupts = <10 0x8>;
cda13dd1 PG	299	interrupt-parent = <&ipic>;
74c37e8c TT	300	};
74c37e8c TT	301
74c37e8c	302	crypto@30000 {
3fd44736	303	compatible = "fsl,sec2.0";
cda13dd1 PG	304	reg = <0x30000 0x10000>;
	305	interrupts = <11 0x8>;
	306	interrupt-parent = <&ipic>;
3fd44736 KP	307	fsl,num-channels = <4>;
	308	fsl,channel-fifo-len = <24>;
	309	fsl,exec-units-mask = <0x7e>;
	310	fsl,descriptor-types-mask = <0x01010ebf>;
74c37e8c TT	311	};
74c37e8c TT	312
d71a1dc6	313	ipic: pic@700 {
74c37e8c TT	314	interrupt-controller;
	315	#address-cells = <0>;
	316	#interrupt-cells = <2>;
cda13dd1	317	reg = <0x700 0x100>;
74c37e8c TT	318	device_type = "ipic";
74c37e8c TT	319	};
b387dfe9 DES	320
	321	gpio-leds {
	322	compatible = "gpio-leds";
	323
	324	green {
	325	label = "Green";
	326	gpios = <&pcf1 0 1>;
	327	linux,default-trigger = "heartbeat";
	328	};
	329
	330	yellow {
	331	label = "Yellow";
	332	gpios = <&pcf1 1 1>;
	333	/* linux,default-trigger = "heartbeat"; */
	334	default-state = "on";
	335	};
	336	};
	337
74c37e8c	338	};
1b3c5cda	339
ea082fa9	340	pci0: pci@e0008500 {
cda13dd1	341	interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
1b3c5cda KG	342	interrupt-map = <
1b3c5cda KG	343	/* IDSEL 0x10 - SATA */
cda13dd1	344	0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
1b3c5cda	345	>;
cda13dd1 PG	346	interrupt-parent = <&ipic>;
	347	interrupts = <66 0x8>;
	348	bus-range = <0x0 0x0>;
	349	ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
	350	0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
	351	0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
	352	clock-frequency = <66666666>;
1b3c5cda KG	353	#interrupt-cells = <1>;
	354	#size-cells = <2>;
	355	#address-cells = <3>;
5b70a097 JR	356	reg = <0xe0008500 0x100 /* internal registers */
5b70a097 JR	357	0xe0008300 0x8>; /* config space access registers */
1b3c5cda KG	358	compatible = "fsl,mpc8349-pci";
	359	device_type = "pci";
	360	};
	361
ea082fa9	362	pci1: pci@e0008600 {
cda13dd1	363	interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
1b3c5cda KG	364	interrupt-map = <
1b3c5cda KG	365	/* IDSEL 0x0E - MiniPCI Slot */
cda13dd1	366	0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
1b3c5cda KG	367
1b3c5cda KG	368	/* IDSEL 0x0F - PCI Slot */
cda13dd1 PG	369	0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
	370	0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
	371	>;
	372	interrupt-parent = <&ipic>;
	373	interrupts = <67 0x8>;
	374	bus-range = <0x0 0x0>;
	375	ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
	376	0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
	377	0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
	378	clock-frequency = <66666666>;
1b3c5cda KG	379	#interrupt-cells = <1>;
	380	#size-cells = <2>;
	381	#address-cells = <3>;
5b70a097 JR	382	reg = <0xe0008600 0x100 /* internal registers */
5b70a097 JR	383	0xe0008380 0x8>; /* config space access registers */
1b3c5cda KG	384	compatible = "fsl,mpc8349-pci";
	385	device_type = "pci";
	386	};
	387
9b6d19dd AV	388	localbus@e0005000 {
	389	#address-cells = <2>;
	390	#size-cells = <1>;
	391	compatible = "fsl,mpc8349e-localbus",
66b77a75 DES	392	"fsl,pq2pro-localbus",
66b77a75 DES	393	"simple-bus";
cda13dd1	394	reg = <0xe0005000 0xd8>;
1d88fd11 DES	395	ranges = <0x0 0x0 0xfe000000 0x1000000 /* flash */
	396	0x1 0x0 0xf8000000 0x20000 /* VSC 7385 */
	397	0x2 0x0 0xf9000000 0x200000 /* exp slot */
	398	0x3 0x0 0xf0000000 0x210>; /* CF slot */
	399
	400	flash@0,0 {
	401	compatible = "cfi-flash";
	402	reg = <0x0 0x0 0x800000>;
	403	bank-width = <2>;
	404	device-width = <1>;
	405	};
	406
	407	flash@0,800000 {
	408	#address-cells = <1>;
	409	#size-cells = <1>;
	410	compatible = "cfi-flash";
	411	reg = <0x0 0x800000 0x800000>;
	412	bank-width = <2>;
	413	device-width = <1>;
	414	};
1b3c5cda	415
9b6d19dd AV	416	pata@3,0 {
9b6d19dd AV	417	compatible = "fsl,mpc8349emitx-pata", "ata-generic";
cda13dd1	418	reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
9b6d19dd AV	419	reg-shift = <1>;
9b6d19dd AV	420	pio-mode = <6>;
cda13dd1	421	interrupts = <23 0x8>;
9b6d19dd AV	422	interrupt-parent = <&ipic>;
	423	};
	424	};
74c37e8c	425	};