[linux-2.6-block.git] / arch / powerpc / boot / dts / makalu.dts

/*
 * Device Tree Source for AMCC Makalu (405EX)
 *
 * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without
 * any warranty of any kind, whether express or implied.
 */

/dts-v1/;

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	model = "amcc,makalu";
	compatible = "amcc,makalu";
	dcr-parent = <&{/cpus/cpu@0}>;

	aliases {
		ethernet0 = &EMAC0;
		ethernet1 = &EMAC1;
		serial0 = &UART0;
		serial1 = &UART1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			model = "PowerPC,405EX";
			reg = <0x00000000>;
			clock-frequency = <0>; /* Filled in by U-Boot */
			timebase-frequency = <0>; /* Filled in by U-Boot */
			i-cache-line-size = <32>;
			d-cache-line-size = <32>;
			i-cache-size = <16384>; /* 16 kB */
			d-cache-size = <16384>; /* 16 kB */
			dcr-controller;
			dcr-access-method = "native";
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
	};

	UIC0: interrupt-controller {
		compatible = "ibm,uic-405ex", "ibm,uic";
		interrupt-controller;
		cell-index = <0>;
		dcr-reg = <0x0c0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
	};

	UIC1: interrupt-controller1 {
		compatible = "ibm,uic-405ex","ibm,uic";
		interrupt-controller;
		cell-index = <1>;
		dcr-reg = <0x0d0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	UIC2: interrupt-controller2 {
		compatible = "ibm,uic-405ex","ibm,uic";
		interrupt-controller;
		cell-index = <2>;
		dcr-reg = <0x0e0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	plb {
		compatible = "ibm,plb-405ex", "ibm,plb4";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		clock-frequency = <0>; /* Filled in by U-Boot */

		SDRAM0: memory-controller {
			compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
			dcr-reg = <0x010 0x002>;
			interrupt-parent = <&UIC2>;
			interrupts = <0x5 0x4 /* ECC DED Error */
			              0x6 0x4 /* ECC SEC Error */ >;
		};

		MAL0: mcmal {
			compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
			dcr-reg = <0x180 0x062>;
			num-tx-chans = <2>;
			num-rx-chans = <2>;
			interrupt-parent = <&MAL0>;
			interrupts = <0x0 0x1 0x2 0x3 0x4>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
					/*RXEOB*/ 0x1 &UIC0 0xb 0x4
					/*SERR*/  0x2 &UIC1 0x0 0x4
					/*TXDE*/  0x3 &UIC1 0x1 0x4
					/*RXDE*/  0x4 &UIC1 0x2 0x4>;
			interrupt-map-mask = <0xffffffff>;
		};

		POB0: opb {
			compatible = "ibm,opb-405ex", "ibm,opb";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x80000000 0x80000000 0x10000000
				  0xef600000 0xef600000 0x00a00000
				  0xf0000000 0xf0000000 0x10000000>;
			dcr-reg = <0x0a0 0x005>;
			clock-frequency = <0>; /* Filled in by U-Boot */

			EBC0: ebc {
				compatible = "ibm,ebc-405ex", "ibm,ebc";
				dcr-reg = <0x012 0x002>;
				#address-cells = <2>;
				#size-cells = <1>;
				clock-frequency = <0>; /* Filled in by U-Boot */
				/* ranges property is supplied by U-Boot */
				interrupts = <0x5 0x1>;
				interrupt-parent = <&UIC1>;

				nor_flash@0,0 {
					compatible = "amd,s29gl512n", "cfi-flash";
					bank-width = <2>;
					reg = <0x00000000 0x00000000 0x04000000>;
					#address-cells = <1>;
					#size-cells = <1>;
					partition@0 {
						label = "kernel";
						reg = <0x00000000 0x00200000>;
					};
					partition@200000 {
						label = "root";
						reg = <0x00200000 0x00200000>;
					};
					partition@400000 {
						label = "user";
						reg = <0x00400000 0x03b60000>;
					};
					partition@3f60000 {
						label = "env";
						reg = <0x03f60000 0x00040000>;
					};
					partition@3fa0000 {
						label = "u-boot";
						reg = <0x03fa0000 0x00060000>;
					};
				};
			};

			UART0: serial@ef600200 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <0xef600200 0x00000008>;
				virtual-reg = <0xef600200>;
				clock-frequency = <0>; /* Filled in by U-Boot */
				current-speed = <0>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x1a 0x4>;
			};

			UART1: serial@ef600300 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <0xef600300 0x00000008>;
				virtual-reg = <0xef600300>;
				clock-frequency = <0>; /* Filled in by U-Boot */
				current-speed = <0>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x1 0x4>;
			};

			IIC0: i2c@ef600400 {
				compatible = "ibm,iic-405ex", "ibm,iic";
				reg = <0xef600400 0x00000014>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x2 0x4>;
			};

			IIC1: i2c@ef600500 {
				compatible = "ibm,iic-405ex", "ibm,iic";
				reg = <0xef600500 0x00000014>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x7 0x4>;
			};


			RGMII0: emac-rgmii@ef600b00 {
				compatible = "ibm,rgmii-405ex", "ibm,rgmii";
				reg = <0xef600b00 0x00000104>;
				has-mdio;
			};

			EMAC0: ethernet@ef600900 {
				linux,network-index = <0x0>;
				device_type = "network";
				compatible = "ibm,emac-405ex", "ibm,emac4sync";
				interrupt-parent = <&EMAC0>;
				interrupts = <0x0 0x1>;
				#interrupt-cells = <1>;
				#address-cells = <0>;
				#size-cells = <0>;
				interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
						/*Wake*/  0x1 &UIC1 0x1d 0x4>;
				reg = <0xef600900 0x000000c4>;
				local-mac-address = [000000000000]; /* Filled in by U-Boot */
				mal-device = <&MAL0>;
				mal-tx-channel = <0>;
				mal-rx-channel = <0>;
				cell-index = <0>;
				max-frame-size = <9000>;
				rx-fifo-size = <4096>;
				tx-fifo-size = <2048>;
				rx-fifo-size-gige = <16384>;
				tx-fifo-size-gige = <16384>;
				phy-mode = "rgmii";
				phy-map = <0x0000003f>;	/* Start at 6 */
				rgmii-device = <&RGMII0>;
				rgmii-channel = <0>;
				has-inverted-stacr-oc;
				has-new-stacr-staopc;
			};

			EMAC1: ethernet@ef600a00 {
				linux,network-index = <0x1>;
				device_type = "network";
				compatible = "ibm,emac-405ex", "ibm,emac4sync";
				interrupt-parent = <&EMAC1>;
				interrupts = <0x0 0x1>;
				#interrupt-cells = <1>;
				#address-cells = <0>;
				#size-cells = <0>;
				interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
						/*Wake*/  0x1 &UIC1 0x1f 0x4>;
				reg = <0xef600a00 0x000000c4>;
				local-mac-address = [000000000000]; /* Filled in by U-Boot */
				mal-device = <&MAL0>;
				mal-tx-channel = <1>;
				mal-rx-channel = <1>;
				cell-index = <1>;
				max-frame-size = <9000>;
				rx-fifo-size = <4096>;
				tx-fifo-size = <2048>;
                                rx-fifo-size-gige = <16384>;
                                tx-fifo-size-gige = <16384>;
				phy-mode = "rgmii";
				phy-map = <0x00000000>;
				rgmii-device = <&RGMII0>;
				rgmii-channel = <1>;
				has-inverted-stacr-oc;
				has-new-stacr-staopc;
			};
		};

		PCIE0: pciex@0a0000000 {
			device_type = "pci";
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
			primary;
			port = <0x0>; /* port number */
			reg = <0xa0000000 0x20000000	/* Config space access */
			       0xef000000 0x00001000>;	/* Registers */
			dcr-reg = <0x040 0x020>;
			sdr-base = <0x400>;

			/* Outbound ranges, one memory and one IO,
			 * later cannot be changed
			 */
			ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
				  0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;

			/* Inbound 2GB range starting at 0 */
			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;

			/* This drives busses 0x00 to 0x3f */
			bus-range = <0x0 0x3f>;

			/* Legacy interrupts (note the weird polarity, the bridge seems
			 * to invert PCIe legacy interrupts).
			 * We are de-swizzling here because the numbers are actually for
			 * port of the root complex virtual P2P bridge. But I want
			 * to avoid putting a node for it in the tree, so the numbers
			 * below are basically de-swizzled numbers.
			 * The real slot is on idsel 0, so the swizzling is 1:1
			 */
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			interrupt-map = <
				0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
				0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
				0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
				0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
		};

		PCIE1: pciex@0c0000000 {
			device_type = "pci";
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
			primary;
			port = <0x1>; /* port number */
			reg = <0xc0000000 0x20000000	/* Config space access */
			       0xef001000 0x00001000>;	/* Registers */
			dcr-reg = <0x060 0x020>;
			sdr-base = <0x440>;

			/* Outbound ranges, one memory and one IO,
			 * later cannot be changed
			 */
			ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000
				  0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>;

			/* Inbound 2GB range starting at 0 */
			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;

			/* This drives busses 0x40 to 0x7f */
			bus-range = <0x40 0x7f>;

			/* Legacy interrupts (note the weird polarity, the bridge seems
			 * to invert PCIe legacy interrupts).
			 * We are de-swizzling here because the numbers are actually for
			 * port of the root complex virtual P2P bridge. But I want
			 * to avoid putting a node for it in the tree, so the numbers
			 * below are basically de-swizzled numbers.
			 * The real slot is on idsel 0, so the swizzling is 1:1
			 */
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			interrupt-map = <
				0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */
				0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */
				0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
				0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
		};
	};
};
Commit	Line	Data
1b55883a SR	1	/*
	2	* Device Tree Source for AMCC Makalu (405EX)
	3	*
	4	* Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
	5	*
	6	* This file is licensed under the terms of the GNU General Public
	7	* License version 2. This program is licensed "as is" without
	8	* any warranty of any kind, whether express or implied.
	9	*/
	10
71f34979 DG	11	/dts-v1/;
71f34979 DG	12
1b55883a SR	13	/ {
	14	#address-cells = <1>;
	15	#size-cells = <1>;
	16	model = "amcc,makalu";
	17	compatible = "amcc,makalu";
71f34979	18	dcr-parent = <&{/cpus/cpu@0}>;
1b55883a SR	19
	20	aliases {
	21	ethernet0 = &EMAC0;
	22	ethernet1 = &EMAC1;
	23	serial0 = &UART0;
	24	serial1 = &UART1;
	25	};
	26
	27	cpus {
	28	#address-cells = <1>;
	29	#size-cells = <0>;
	30
	31	cpu@0 {
	32	device_type = "cpu";
	33	model = "PowerPC,405EX";
71f34979	34	reg = <0x00000000>;
1b55883a SR	35	clock-frequency = <0>; /* Filled in by U-Boot */
1b55883a SR	36	timebase-frequency = <0>; /* Filled in by U-Boot */
71f34979 DG	37	i-cache-line-size = <32>;
	38	d-cache-line-size = <32>;
	39	i-cache-size = <16384>; /* 16 kB */
	40	d-cache-size = <16384>; /* 16 kB */
1b55883a SR	41	dcr-controller;
	42	dcr-access-method = "native";
	43	};
	44	};
	45
	46	memory {
	47	device_type = "memory";
71f34979	48	reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
1b55883a SR	49	};
	50
	51	UIC0: interrupt-controller {
	52	compatible = "ibm,uic-405ex", "ibm,uic";
	53	interrupt-controller;
	54	cell-index = <0>;
71f34979	55	dcr-reg = <0x0c0 0x009>;
1b55883a SR	56	#address-cells = <0>;
	57	#size-cells = <0>;
	58	#interrupt-cells = <2>;
	59	};
	60
	61	UIC1: interrupt-controller1 {
	62	compatible = "ibm,uic-405ex","ibm,uic";
	63	interrupt-controller;
	64	cell-index = <1>;
71f34979	65	dcr-reg = <0x0d0 0x009>;
1b55883a SR	66	#address-cells = <0>;
	67	#size-cells = <0>;
	68	#interrupt-cells = <2>;
71f34979	69	interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
1b55883a SR	70	interrupt-parent = <&UIC0>;
	71	};
	72
	73	UIC2: interrupt-controller2 {
	74	compatible = "ibm,uic-405ex","ibm,uic";
	75	interrupt-controller;
	76	cell-index = <2>;
71f34979	77	dcr-reg = <0x0e0 0x009>;
1b55883a SR	78	#address-cells = <0>;
	79	#size-cells = <0>;
	80	#interrupt-cells = <2>;
71f34979	81	interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
1b55883a SR	82	interrupt-parent = <&UIC0>;
	83	};
	84
	85	plb {
	86	compatible = "ibm,plb-405ex", "ibm,plb4";
	87	#address-cells = <1>;
	88	#size-cells = <1>;
	89	ranges;
	90	clock-frequency = <0>; /* Filled in by U-Boot */
	91
	92	SDRAM0: memory-controller {
94ce1c58	93	compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
71f34979	94	dcr-reg = <0x010 0x002>;
94ce1c58 GE	95	interrupt-parent = <&UIC2>;
	96	interrupts = <0x5 0x4 /* ECC DED Error */
	97	0x6 0x4 /* ECC SEC Error */ >;
1b55883a SR	98	};
	99
	100	MAL0: mcmal {
	101	compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
71f34979	102	dcr-reg = <0x180 0x062>;
1b55883a SR	103	num-tx-chans = <2>;
	104	num-rx-chans = <2>;
	105	interrupt-parent = <&MAL0>;
71f34979	106	interrupts = <0x0 0x1 0x2 0x3 0x4>;
1b55883a SR	107	#interrupt-cells = <1>;
	108	#address-cells = <0>;
	109	#size-cells = <0>;
71f34979 DG	110	interrupt-map = </TXEOB/ 0x0 &UIC0 0xa 0x4
	111	/RXEOB/ 0x1 &UIC0 0xb 0x4
	112	/SERR/ 0x2 &UIC1 0x0 0x4
	113	/TXDE/ 0x3 &UIC1 0x1 0x4
	114	/RXDE/ 0x4 &UIC1 0x2 0x4>;
	115	interrupt-map-mask = <0xffffffff>;
1b55883a SR	116	};
	117
	118	POB0: opb {
	119	compatible = "ibm,opb-405ex", "ibm,opb";
	120	#address-cells = <1>;
	121	#size-cells = <1>;
71f34979 DG	122	ranges = <0x80000000 0x80000000 0x10000000
	123	0xef600000 0xef600000 0x00a00000
	124	0xf0000000 0xf0000000 0x10000000>;
	125	dcr-reg = <0x0a0 0x005>;
1b55883a SR	126	clock-frequency = <0>; /* Filled in by U-Boot */
	127
	128	EBC0: ebc {
	129	compatible = "ibm,ebc-405ex", "ibm,ebc";
71f34979	130	dcr-reg = <0x012 0x002>;
1b55883a SR	131	#address-cells = <2>;
	132	#size-cells = <1>;
	133	clock-frequency = <0>; /* Filled in by U-Boot */
	134	/* ranges property is supplied by U-Boot */
71f34979	135	interrupts = <0x5 0x1>;
1b55883a SR	136	interrupt-parent = <&UIC1>;
	137
	138	nor_flash@0,0 {
	139	compatible = "amd,s29gl512n", "cfi-flash";
	140	bank-width = <2>;
71f34979	141	reg = <0x00000000 0x00000000 0x04000000>;
1b55883a SR	142	#address-cells = <1>;
	143	#size-cells = <1>;
	144	partition@0 {
	145	label = "kernel";
71f34979	146	reg = <0x00000000 0x00200000>;
1b55883a SR	147	};
	148	partition@200000 {
	149	label = "root";
71f34979	150	reg = <0x00200000 0x00200000>;
1b55883a SR	151	};
	152	partition@400000 {
	153	label = "user";
71f34979	154	reg = <0x00400000 0x03b60000>;
1b55883a SR	155	};
	156	partition@3f60000 {
	157	label = "env";
71f34979	158	reg = <0x03f60000 0x00040000>;
1b55883a SR	159	};
	160	partition@3fa0000 {
	161	label = "u-boot";
71f34979	162	reg = <0x03fa0000 0x00060000>;
1b55883a SR	163	};
	164	};
	165	};
	166
	167	UART0: serial@ef600200 {
	168	device_type = "serial";
	169	compatible = "ns16550";
71f34979 DG	170	reg = <0xef600200 0x00000008>;
71f34979 DG	171	virtual-reg = <0xef600200>;
1b55883a SR	172	clock-frequency = <0>; /* Filled in by U-Boot */
	173	current-speed = <0>;
	174	interrupt-parent = <&UIC0>;
71f34979	175	interrupts = <0x1a 0x4>;
1b55883a SR	176	};
	177
	178	UART1: serial@ef600300 {
	179	device_type = "serial";
	180	compatible = "ns16550";
71f34979 DG	181	reg = <0xef600300 0x00000008>;
71f34979 DG	182	virtual-reg = <0xef600300>;
1b55883a SR	183	clock-frequency = <0>; /* Filled in by U-Boot */
	184	current-speed = <0>;
	185	interrupt-parent = <&UIC0>;
71f34979	186	interrupts = <0x1 0x4>;
1b55883a SR	187	};
	188
	189	IIC0: i2c@ef600400 {
1b55883a	190	compatible = "ibm,iic-405ex", "ibm,iic";
71f34979	191	reg = <0xef600400 0x00000014>;
1b55883a	192	interrupt-parent = <&UIC0>;
71f34979	193	interrupts = <0x2 0x4>;
1b55883a SR	194	};
	195
	196	IIC1: i2c@ef600500 {
1b55883a	197	compatible = "ibm,iic-405ex", "ibm,iic";
71f34979	198	reg = <0xef600500 0x00000014>;
1b55883a	199	interrupt-parent = <&UIC0>;
71f34979	200	interrupts = <0x7 0x4>;
1b55883a SR	201	};
	202
	203
	204	RGMII0: emac-rgmii@ef600b00 {
1b55883a	205	compatible = "ibm,rgmii-405ex", "ibm,rgmii";
71f34979	206	reg = <0xef600b00 0x00000104>;
1b55883a SR	207	has-mdio;
	208	};
	209
	210	EMAC0: ethernet@ef600900 {
71f34979	211	linux,network-index = <0x0>;
1b55883a	212	device_type = "network";
05781ccd	213	compatible = "ibm,emac-405ex", "ibm,emac4sync";
1b55883a	214	interrupt-parent = <&EMAC0>;
71f34979	215	interrupts = <0x0 0x1>;
1b55883a SR	216	#interrupt-cells = <1>;
	217	#address-cells = <0>;
	218	#size-cells = <0>;
71f34979 DG	219	interrupt-map = </Status/ 0x0 &UIC0 0x18 0x4
71f34979 DG	220	/Wake/ 0x1 &UIC1 0x1d 0x4>;
05781ccd	221	reg = <0xef600900 0x000000c4>;
1b55883a SR	222	local-mac-address = [000000000000]; /* Filled in by U-Boot */
	223	mal-device = <&MAL0>;
	224	mal-tx-channel = <0>;
	225	mal-rx-channel = <0>;
	226	cell-index = <0>;
71f34979 DG	227	max-frame-size = <9000>;
	228	rx-fifo-size = <4096>;
	229	tx-fifo-size = <2048>;
835ad8e7 DM	230	rx-fifo-size-gige = <16384>;
835ad8e7 DM	231	tx-fifo-size-gige = <16384>;
1b55883a	232	phy-mode = "rgmii";
71f34979	233	phy-map = <0x0000003f>; /* Start at 6 */
1b55883a SR	234	rgmii-device = <&RGMII0>;
	235	rgmii-channel = <0>;
	236	has-inverted-stacr-oc;
	237	has-new-stacr-staopc;
	238	};
	239
	240	EMAC1: ethernet@ef600a00 {
71f34979	241	linux,network-index = <0x1>;
1b55883a	242	device_type = "network";
05781ccd	243	compatible = "ibm,emac-405ex", "ibm,emac4sync";
1b55883a	244	interrupt-parent = <&EMAC1>;
71f34979	245	interrupts = <0x0 0x1>;
1b55883a SR	246	#interrupt-cells = <1>;
	247	#address-cells = <0>;
	248	#size-cells = <0>;
71f34979 DG	249	interrupt-map = </Status/ 0x0 &UIC0 0x19 0x4
71f34979 DG	250	/Wake/ 0x1 &UIC1 0x1f 0x4>;
05781ccd	251	reg = <0xef600a00 0x000000c4>;
1b55883a SR	252	local-mac-address = [000000000000]; /* Filled in by U-Boot */
	253	mal-device = <&MAL0>;
	254	mal-tx-channel = <1>;
	255	mal-rx-channel = <1>;
	256	cell-index = <1>;
71f34979 DG	257	max-frame-size = <9000>;
	258	rx-fifo-size = <4096>;
	259	tx-fifo-size = <2048>;
835ad8e7 DM	260	rx-fifo-size-gige = <16384>;
835ad8e7 DM	261	tx-fifo-size-gige = <16384>;
1b55883a	262	phy-mode = "rgmii";
71f34979	263	phy-map = <0x00000000>;
1b55883a SR	264	rgmii-device = <&RGMII0>;
	265	rgmii-channel = <1>;
	266	has-inverted-stacr-oc;
	267	has-new-stacr-staopc;
	268	};
	269	};
	270
	271	PCIE0: pciex@0a0000000 {
	272	device_type = "pci";
	273	#interrupt-cells = <1>;
	274	#size-cells = <2>;
	275	#address-cells = <3>;
	276	compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
	277	primary;
71f34979 DG	278	port = <0x0>; /* port number */
	279	reg = <0xa0000000 0x20000000 /* Config space access */
	280	0xef000000 0x00001000>; /* Registers */
	281	dcr-reg = <0x040 0x020>;
	282	sdr-base = <0x400>;
1b55883a SR	283
	284	/* Outbound ranges, one memory and one IO,
	285	* later cannot be changed
	286	*/
71f34979 DG	287	ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
71f34979 DG	288	0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
1b55883a SR	289
1b55883a SR	290	/* Inbound 2GB range starting at 0 */
71f34979	291	dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
1b55883a SR	292
1b55883a SR	293	/* This drives busses 0x00 to 0x3f */
71f34979	294	bus-range = <0x0 0x3f>;
1b55883a SR	295
	296	/* Legacy interrupts (note the weird polarity, the bridge seems
	297	* to invert PCIe legacy interrupts).
	298	* We are de-swizzling here because the numbers are actually for
	299	* port of the root complex virtual P2P bridge. But I want
	300	* to avoid putting a node for it in the tree, so the numbers
	301	* below are basically de-swizzled numbers.
	302	* The real slot is on idsel 0, so the swizzling is 1:1
	303	*/
71f34979	304	interrupt-map-mask = <0x0 0x0 0x0 0x7>;
1b55883a	305	interrupt-map = <
71f34979 DG	306	0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
	307	0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
	308	0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
	309	0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
1b55883a SR	310	};
	311
	312	PCIE1: pciex@0c0000000 {
	313	device_type = "pci";
	314	#interrupt-cells = <1>;
	315	#size-cells = <2>;
	316	#address-cells = <3>;
	317	compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
	318	primary;
71f34979 DG	319	port = <0x1>; /* port number */
	320	reg = <0xc0000000 0x20000000 /* Config space access */
	321	0xef001000 0x00001000>; /* Registers */
	322	dcr-reg = <0x060 0x020>;
	323	sdr-base = <0x440>;
1b55883a SR	324
	325	/* Outbound ranges, one memory and one IO,
	326	* later cannot be changed
	327	*/
71f34979 DG	328	ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000
71f34979 DG	329	0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>;
1b55883a SR	330
1b55883a SR	331	/* Inbound 2GB range starting at 0 */
71f34979	332	dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
1b55883a SR	333
1b55883a SR	334	/* This drives busses 0x40 to 0x7f */
71f34979	335	bus-range = <0x40 0x7f>;
1b55883a SR	336
	337	/* Legacy interrupts (note the weird polarity, the bridge seems
	338	* to invert PCIe legacy interrupts).
	339	* We are de-swizzling here because the numbers are actually for
	340	* port of the root complex virtual P2P bridge. But I want
	341	* to avoid putting a node for it in the tree, so the numbers
	342	* below are basically de-swizzled numbers.
	343	* The real slot is on idsel 0, so the swizzling is 1:1
	344	*/
71f34979	345	interrupt-map-mask = <0x0 0x0 0x0 0x7>;
1b55883a	346	interrupt-map = <
71f34979 DG	347	0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */
	348	0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */
	349	0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
	350	0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
1b55883a SR	351	};
	352	};
	353	};