[linux-2.6-block.git] / arch / powerpc / boot / dts / makalu.dts

/*
 * Device Tree Source for AMCC Makalu (405EX)
 *
 * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without
 * any warranty of any kind, whether express or implied.
 */

/dts-v1/;

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	model = "amcc,makalu";
	compatible = "amcc,makalu";
	dcr-parent = <&{/cpus/cpu@0}>;

	aliases {
		ethernet0 = &EMAC0;
		ethernet1 = &EMAC1;
		serial0 = &UART0;
		serial1 = &UART1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			model = "PowerPC,405EX";
			reg = <0x00000000>;
			clock-frequency = <0>; /* Filled in by U-Boot */
			timebase-frequency = <0>; /* Filled in by U-Boot */
			i-cache-line-size = <32>;
			d-cache-line-size = <32>;
			i-cache-size = <16384>; /* 16 kB */
			d-cache-size = <16384>; /* 16 kB */
			dcr-controller;
			dcr-access-method = "native";
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
	};

	UIC0: interrupt-controller {
		compatible = "ibm,uic-405ex", "ibm,uic";
		interrupt-controller;
		cell-index = <0>;
		dcr-reg = <0x0c0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
	};

	UIC1: interrupt-controller1 {
		compatible = "ibm,uic-405ex","ibm,uic";
		interrupt-controller;
		cell-index = <1>;
		dcr-reg = <0x0d0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	UIC2: interrupt-controller2 {
		compatible = "ibm,uic-405ex","ibm,uic";
		interrupt-controller;
		cell-index = <2>;
		dcr-reg = <0x0e0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	plb {
		compatible = "ibm,plb-405ex", "ibm,plb4";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		clock-frequency = <0>; /* Filled in by U-Boot */

		SDRAM0: memory-controller {
			compatible = "ibm,sdram-405ex";
			dcr-reg = <0x010 0x002>;
		};

		MAL0: mcmal {
			compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
			dcr-reg = <0x180 0x062>;
			num-tx-chans = <2>;
			num-rx-chans = <2>;
			interrupt-parent = <&MAL0>;
			interrupts = <0x0 0x1 0x2 0x3 0x4>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
					/*RXEOB*/ 0x1 &UIC0 0xb 0x4
					/*SERR*/  0x2 &UIC1 0x0 0x4
					/*TXDE*/  0x3 &UIC1 0x1 0x4
					/*RXDE*/  0x4 &UIC1 0x2 0x4>;
			interrupt-map-mask = <0xffffffff>;
		};

		POB0: opb {
			compatible = "ibm,opb-405ex", "ibm,opb";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x80000000 0x80000000 0x10000000
				  0xef600000 0xef600000 0x00a00000
				  0xf0000000 0xf0000000 0x10000000>;
			dcr-reg = <0x0a0 0x005>;
			clock-frequency = <0>; /* Filled in by U-Boot */

			EBC0: ebc {
				compatible = "ibm,ebc-405ex", "ibm,ebc";
				dcr-reg = <0x012 0x002>;
				#address-cells = <2>;
				#size-cells = <1>;
				clock-frequency = <0>; /* Filled in by U-Boot */
				/* ranges property is supplied by U-Boot */
				interrupts = <0x5 0x1>;
				interrupt-parent = <&UIC1>;

				nor_flash@0,0 {
					compatible = "amd,s29gl512n", "cfi-flash";
					bank-width = <2>;
					reg = <0x00000000 0x00000000 0x04000000>;
					#address-cells = <1>;
					#size-cells = <1>;
					partition@0 {
						label = "kernel";
						reg = <0x00000000 0x00200000>;
					};
					partition@200000 {
						label = "root";
						reg = <0x00200000 0x00200000>;
					};
					partition@400000 {
						label = "user";
						reg = <0x00400000 0x03b60000>;
					};
					partition@3f60000 {
						label = "env";
						reg = <0x03f60000 0x00040000>;
					};
					partition@3fa0000 {
						label = "u-boot";
						reg = <0x03fa0000 0x00060000>;
					};
				};
			};

			UART0: serial@ef600200 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <0xef600200 0x00000008>;
				virtual-reg = <0xef600200>;
				clock-frequency = <0>; /* Filled in by U-Boot */
				current-speed = <0>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x1a 0x4>;
			};

			UART1: serial@ef600300 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <0xef600300 0x00000008>;
				virtual-reg = <0xef600300>;
				clock-frequency = <0>; /* Filled in by U-Boot */
				current-speed = <0>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x1 0x4>;
			};

			IIC0: i2c@ef600400 {
				compatible = "ibm,iic-405ex", "ibm,iic";
				reg = <0xef600400 0x00000014>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x2 0x4>;
			};

			IIC1: i2c@ef600500 {
				compatible = "ibm,iic-405ex", "ibm,iic";
				reg = <0xef600500 0x00000014>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x7 0x4>;
			};


			RGMII0: emac-rgmii@ef600b00 {
				compatible = "ibm,rgmii-405ex", "ibm,rgmii";
				reg = <0xef600b00 0x00000104>;
				has-mdio;
			};

			EMAC0: ethernet@ef600900 {
				linux,network-index = <0x0>;
				device_type = "network";
				compatible = "ibm,emac-405ex", "ibm,emac4sync";
				interrupt-parent = <&EMAC0>;
				interrupts = <0x0 0x1>;
				#interrupt-cells = <1>;
				#address-cells = <0>;
				#size-cells = <0>;
				interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
						/*Wake*/  0x1 &UIC1 0x1d 0x4>;
				reg = <0xef600900 0x000000c4>;
				local-mac-address = [000000000000]; /* Filled in by U-Boot */
				mal-device = <&MAL0>;
				mal-tx-channel = <0>;
				mal-rx-channel = <0>;
				cell-index = <0>;
				max-frame-size = <9000>;
				rx-fifo-size = <4096>;
				tx-fifo-size = <2048>;
				phy-mode = "rgmii";
				phy-map = <0x0000003f>;	/* Start at 6 */
				rgmii-device = <&RGMII0>;
				rgmii-channel = <0>;
				has-inverted-stacr-oc;
				has-new-stacr-staopc;
			};

			EMAC1: ethernet@ef600a00 {
				linux,network-index = <0x1>;
				device_type = "network";
				compatible = "ibm,emac-405ex", "ibm,emac4sync";
				interrupt-parent = <&EMAC1>;
				interrupts = <0x0 0x1>;
				#interrupt-cells = <1>;
				#address-cells = <0>;
				#size-cells = <0>;
				interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
						/*Wake*/  0x1 &UIC1 0x1f 0x4>;
				reg = <0xef600a00 0x000000c4>;
				local-mac-address = [000000000000]; /* Filled in by U-Boot */
				mal-device = <&MAL0>;
				mal-tx-channel = <1>;
				mal-rx-channel = <1>;
				cell-index = <1>;
				max-frame-size = <9000>;
				rx-fifo-size = <4096>;
				tx-fifo-size = <2048>;
				phy-mode = "rgmii";
				phy-map = <0x00000000>;
				rgmii-device = <&RGMII0>;
				rgmii-channel = <1>;
				has-inverted-stacr-oc;
				has-new-stacr-staopc;
			};
		};

		PCIE0: pciex@0a0000000 {
			device_type = "pci";
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
			primary;
			port = <0x0>; /* port number */
			reg = <0xa0000000 0x20000000	/* Config space access */
			       0xef000000 0x00001000>;	/* Registers */
			dcr-reg = <0x040 0x020>;
			sdr-base = <0x400>;

			/* Outbound ranges, one memory and one IO,
			 * later cannot be changed
			 */
			ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
				  0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;

			/* Inbound 2GB range starting at 0 */
			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;

			/* This drives busses 0x00 to 0x3f */
			bus-range = <0x0 0x3f>;

			/* Legacy interrupts (note the weird polarity, the bridge seems
			 * to invert PCIe legacy interrupts).
			 * We are de-swizzling here because the numbers are actually for
			 * port of the root complex virtual P2P bridge. But I want
			 * to avoid putting a node for it in the tree, so the numbers
			 * below are basically de-swizzled numbers.
			 * The real slot is on idsel 0, so the swizzling is 1:1
			 */
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			interrupt-map = <
				0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
				0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
				0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
				0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
		};

		PCIE1: pciex@0c0000000 {
			device_type = "pci";
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
			primary;
			port = <0x1>; /* port number */
			reg = <0xc0000000 0x20000000	/* Config space access */
			       0xef001000 0x00001000>;	/* Registers */
			dcr-reg = <0x060 0x020>;
			sdr-base = <0x440>;

			/* Outbound ranges, one memory and one IO,
			 * later cannot be changed
			 */
			ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000
				  0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>;

			/* Inbound 2GB range starting at 0 */
			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;

			/* This drives busses 0x40 to 0x7f */
			bus-range = <0x40 0x7f>;

			/* Legacy interrupts (note the weird polarity, the bridge seems
			 * to invert PCIe legacy interrupts).
			 * We are de-swizzling here because the numbers are actually for
			 * port of the root complex virtual P2P bridge. But I want
			 * to avoid putting a node for it in the tree, so the numbers
			 * below are basically de-swizzled numbers.
			 * The real slot is on idsel 0, so the swizzling is 1:1
			 */
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			interrupt-map = <
				0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */
				0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */
				0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
				0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
		};
	};
};
Commit	Line	Data
1b55883a SR	1	/*
	2	* Device Tree Source for AMCC Makalu (405EX)
	3	*
	4	* Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
	5	*
	6	* This file is licensed under the terms of the GNU General Public
	7	* License version 2. This program is licensed "as is" without
	8	* any warranty of any kind, whether express or implied.
	9	*/
	10
71f34979 DG	11	/dts-v1/;
71f34979 DG	12
1b55883a SR	13	/ {
	14	#address-cells = <1>;
	15	#size-cells = <1>;
	16	model = "amcc,makalu";
	17	compatible = "amcc,makalu";
71f34979	18	dcr-parent = <&{/cpus/cpu@0}>;
1b55883a SR	19
	20	aliases {
	21	ethernet0 = &EMAC0;
	22	ethernet1 = &EMAC1;
	23	serial0 = &UART0;
	24	serial1 = &UART1;
	25	};
	26
	27	cpus {
	28	#address-cells = <1>;
	29	#size-cells = <0>;
	30
	31	cpu@0 {
	32	device_type = "cpu";
	33	model = "PowerPC,405EX";
71f34979	34	reg = <0x00000000>;
1b55883a SR	35	clock-frequency = <0>; /* Filled in by U-Boot */
1b55883a SR	36	timebase-frequency = <0>; /* Filled in by U-Boot */
71f34979 DG	37	i-cache-line-size = <32>;
	38	d-cache-line-size = <32>;
	39	i-cache-size = <16384>; /* 16 kB */
	40	d-cache-size = <16384>; /* 16 kB */
1b55883a SR	41	dcr-controller;
	42	dcr-access-method = "native";
	43	};
	44	};
	45
	46	memory {
	47	device_type = "memory";
71f34979	48	reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
1b55883a SR	49	};
	50
	51	UIC0: interrupt-controller {
	52	compatible = "ibm,uic-405ex", "ibm,uic";
	53	interrupt-controller;
	54	cell-index = <0>;
71f34979	55	dcr-reg = <0x0c0 0x009>;
1b55883a SR	56	#address-cells = <0>;
	57	#size-cells = <0>;
	58	#interrupt-cells = <2>;
	59	};
	60
	61	UIC1: interrupt-controller1 {
	62	compatible = "ibm,uic-405ex","ibm,uic";
	63	interrupt-controller;
	64	cell-index = <1>;
71f34979	65	dcr-reg = <0x0d0 0x009>;
1b55883a SR	66	#address-cells = <0>;
	67	#size-cells = <0>;
	68	#interrupt-cells = <2>;
71f34979	69	interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
1b55883a SR	70	interrupt-parent = <&UIC0>;
	71	};
	72
	73	UIC2: interrupt-controller2 {
	74	compatible = "ibm,uic-405ex","ibm,uic";
	75	interrupt-controller;
	76	cell-index = <2>;
71f34979	77	dcr-reg = <0x0e0 0x009>;
1b55883a SR	78	#address-cells = <0>;
	79	#size-cells = <0>;
	80	#interrupt-cells = <2>;
71f34979	81	interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
1b55883a SR	82	interrupt-parent = <&UIC0>;
	83	};
	84
	85	plb {
	86	compatible = "ibm,plb-405ex", "ibm,plb4";
	87	#address-cells = <1>;
	88	#size-cells = <1>;
	89	ranges;
	90	clock-frequency = <0>; /* Filled in by U-Boot */
	91
	92	SDRAM0: memory-controller {
	93	compatible = "ibm,sdram-405ex";
71f34979	94	dcr-reg = <0x010 0x002>;
1b55883a SR	95	};
	96
	97	MAL0: mcmal {
	98	compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
71f34979	99	dcr-reg = <0x180 0x062>;
1b55883a SR	100	num-tx-chans = <2>;
	101	num-rx-chans = <2>;
	102	interrupt-parent = <&MAL0>;
71f34979	103	interrupts = <0x0 0x1 0x2 0x3 0x4>;
1b55883a SR	104	#interrupt-cells = <1>;
	105	#address-cells = <0>;
	106	#size-cells = <0>;
71f34979 DG	107	interrupt-map = </TXEOB/ 0x0 &UIC0 0xa 0x4
	108	/RXEOB/ 0x1 &UIC0 0xb 0x4
	109	/SERR/ 0x2 &UIC1 0x0 0x4
	110	/TXDE/ 0x3 &UIC1 0x1 0x4
	111	/RXDE/ 0x4 &UIC1 0x2 0x4>;
	112	interrupt-map-mask = <0xffffffff>;
1b55883a SR	113	};
	114
	115	POB0: opb {
	116	compatible = "ibm,opb-405ex", "ibm,opb";
	117	#address-cells = <1>;
	118	#size-cells = <1>;
71f34979 DG	119	ranges = <0x80000000 0x80000000 0x10000000
	120	0xef600000 0xef600000 0x00a00000
	121	0xf0000000 0xf0000000 0x10000000>;
	122	dcr-reg = <0x0a0 0x005>;
1b55883a SR	123	clock-frequency = <0>; /* Filled in by U-Boot */
	124
	125	EBC0: ebc {
	126	compatible = "ibm,ebc-405ex", "ibm,ebc";
71f34979	127	dcr-reg = <0x012 0x002>;
1b55883a SR	128	#address-cells = <2>;
	129	#size-cells = <1>;
	130	clock-frequency = <0>; /* Filled in by U-Boot */
	131	/* ranges property is supplied by U-Boot */
71f34979	132	interrupts = <0x5 0x1>;
1b55883a SR	133	interrupt-parent = <&UIC1>;
	134
	135	nor_flash@0,0 {
	136	compatible = "amd,s29gl512n", "cfi-flash";
	137	bank-width = <2>;
71f34979	138	reg = <0x00000000 0x00000000 0x04000000>;
1b55883a SR	139	#address-cells = <1>;
	140	#size-cells = <1>;
	141	partition@0 {
	142	label = "kernel";
71f34979	143	reg = <0x00000000 0x00200000>;
1b55883a SR	144	};
	145	partition@200000 {
	146	label = "root";
71f34979	147	reg = <0x00200000 0x00200000>;
1b55883a SR	148	};
	149	partition@400000 {
	150	label = "user";
71f34979	151	reg = <0x00400000 0x03b60000>;
1b55883a SR	152	};
	153	partition@3f60000 {
	154	label = "env";
71f34979	155	reg = <0x03f60000 0x00040000>;
1b55883a SR	156	};
	157	partition@3fa0000 {
	158	label = "u-boot";
71f34979	159	reg = <0x03fa0000 0x00060000>;
1b55883a SR	160	};
	161	};
	162	};
	163
	164	UART0: serial@ef600200 {
	165	device_type = "serial";
	166	compatible = "ns16550";
71f34979 DG	167	reg = <0xef600200 0x00000008>;
71f34979 DG	168	virtual-reg = <0xef600200>;
1b55883a SR	169	clock-frequency = <0>; /* Filled in by U-Boot */
	170	current-speed = <0>;
	171	interrupt-parent = <&UIC0>;
71f34979	172	interrupts = <0x1a 0x4>;
1b55883a SR	173	};
	174
	175	UART1: serial@ef600300 {
	176	device_type = "serial";
	177	compatible = "ns16550";
71f34979 DG	178	reg = <0xef600300 0x00000008>;
71f34979 DG	179	virtual-reg = <0xef600300>;
1b55883a SR	180	clock-frequency = <0>; /* Filled in by U-Boot */
	181	current-speed = <0>;
	182	interrupt-parent = <&UIC0>;
71f34979	183	interrupts = <0x1 0x4>;
1b55883a SR	184	};
	185
	186	IIC0: i2c@ef600400 {
1b55883a	187	compatible = "ibm,iic-405ex", "ibm,iic";
71f34979	188	reg = <0xef600400 0x00000014>;
1b55883a	189	interrupt-parent = <&UIC0>;
71f34979	190	interrupts = <0x2 0x4>;
1b55883a SR	191	};
	192
	193	IIC1: i2c@ef600500 {
1b55883a	194	compatible = "ibm,iic-405ex", "ibm,iic";
71f34979	195	reg = <0xef600500 0x00000014>;
1b55883a	196	interrupt-parent = <&UIC0>;
71f34979	197	interrupts = <0x7 0x4>;
1b55883a SR	198	};
	199
	200
	201	RGMII0: emac-rgmii@ef600b00 {
1b55883a	202	compatible = "ibm,rgmii-405ex", "ibm,rgmii";
71f34979	203	reg = <0xef600b00 0x00000104>;
1b55883a SR	204	has-mdio;
	205	};
	206
	207	EMAC0: ethernet@ef600900 {
71f34979	208	linux,network-index = <0x0>;
1b55883a	209	device_type = "network";
05781ccd	210	compatible = "ibm,emac-405ex", "ibm,emac4sync";
1b55883a	211	interrupt-parent = <&EMAC0>;
71f34979	212	interrupts = <0x0 0x1>;
1b55883a SR	213	#interrupt-cells = <1>;
	214	#address-cells = <0>;
	215	#size-cells = <0>;
71f34979 DG	216	interrupt-map = </Status/ 0x0 &UIC0 0x18 0x4
71f34979 DG	217	/Wake/ 0x1 &UIC1 0x1d 0x4>;
05781ccd	218	reg = <0xef600900 0x000000c4>;
1b55883a SR	219	local-mac-address = [000000000000]; /* Filled in by U-Boot */
	220	mal-device = <&MAL0>;
	221	mal-tx-channel = <0>;
	222	mal-rx-channel = <0>;
	223	cell-index = <0>;
71f34979 DG	224	max-frame-size = <9000>;
	225	rx-fifo-size = <4096>;
	226	tx-fifo-size = <2048>;
1b55883a	227	phy-mode = "rgmii";
71f34979	228	phy-map = <0x0000003f>; /* Start at 6 */
1b55883a SR	229	rgmii-device = <&RGMII0>;
	230	rgmii-channel = <0>;
	231	has-inverted-stacr-oc;
	232	has-new-stacr-staopc;
	233	};
	234
	235	EMAC1: ethernet@ef600a00 {
71f34979	236	linux,network-index = <0x1>;
1b55883a	237	device_type = "network";
05781ccd	238	compatible = "ibm,emac-405ex", "ibm,emac4sync";
1b55883a	239	interrupt-parent = <&EMAC1>;
71f34979	240	interrupts = <0x0 0x1>;
1b55883a SR	241	#interrupt-cells = <1>;
	242	#address-cells = <0>;
	243	#size-cells = <0>;
71f34979 DG	244	interrupt-map = </Status/ 0x0 &UIC0 0x19 0x4
71f34979 DG	245	/Wake/ 0x1 &UIC1 0x1f 0x4>;
05781ccd	246	reg = <0xef600a00 0x000000c4>;
1b55883a SR	247	local-mac-address = [000000000000]; /* Filled in by U-Boot */
	248	mal-device = <&MAL0>;
	249	mal-tx-channel = <1>;
	250	mal-rx-channel = <1>;
	251	cell-index = <1>;
71f34979 DG	252	max-frame-size = <9000>;
	253	rx-fifo-size = <4096>;
	254	tx-fifo-size = <2048>;
1b55883a	255	phy-mode = "rgmii";
71f34979	256	phy-map = <0x00000000>;
1b55883a SR	257	rgmii-device = <&RGMII0>;
	258	rgmii-channel = <1>;
	259	has-inverted-stacr-oc;
	260	has-new-stacr-staopc;
	261	};
	262	};
	263
	264	PCIE0: pciex@0a0000000 {
	265	device_type = "pci";
	266	#interrupt-cells = <1>;
	267	#size-cells = <2>;
	268	#address-cells = <3>;
	269	compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
	270	primary;
71f34979 DG	271	port = <0x0>; /* port number */
	272	reg = <0xa0000000 0x20000000 /* Config space access */
	273	0xef000000 0x00001000>; /* Registers */
	274	dcr-reg = <0x040 0x020>;
	275	sdr-base = <0x400>;
1b55883a SR	276
	277	/* Outbound ranges, one memory and one IO,
	278	* later cannot be changed
	279	*/
71f34979 DG	280	ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
71f34979 DG	281	0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
1b55883a SR	282
1b55883a SR	283	/* Inbound 2GB range starting at 0 */
71f34979	284	dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
1b55883a SR	285
1b55883a SR	286	/* This drives busses 0x00 to 0x3f */
71f34979	287	bus-range = <0x0 0x3f>;
1b55883a SR	288
	289	/* Legacy interrupts (note the weird polarity, the bridge seems
	290	* to invert PCIe legacy interrupts).
	291	* We are de-swizzling here because the numbers are actually for
	292	* port of the root complex virtual P2P bridge. But I want
	293	* to avoid putting a node for it in the tree, so the numbers
	294	* below are basically de-swizzled numbers.
	295	* The real slot is on idsel 0, so the swizzling is 1:1
	296	*/
71f34979	297	interrupt-map-mask = <0x0 0x0 0x0 0x7>;
1b55883a	298	interrupt-map = <
71f34979 DG	299	0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
	300	0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
	301	0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
	302	0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
1b55883a SR	303	};
	304
	305	PCIE1: pciex@0c0000000 {
	306	device_type = "pci";
	307	#interrupt-cells = <1>;
	308	#size-cells = <2>;
	309	#address-cells = <3>;
	310	compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
	311	primary;
71f34979 DG	312	port = <0x1>; /* port number */
	313	reg = <0xc0000000 0x20000000 /* Config space access */
	314	0xef001000 0x00001000>; /* Registers */
	315	dcr-reg = <0x060 0x020>;
	316	sdr-base = <0x440>;
1b55883a SR	317
	318	/* Outbound ranges, one memory and one IO,
	319	* later cannot be changed
	320	*/
71f34979 DG	321	ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000
71f34979 DG	322	0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>;
1b55883a SR	323
1b55883a SR	324	/* Inbound 2GB range starting at 0 */
71f34979	325	dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
1b55883a SR	326
1b55883a SR	327	/* This drives busses 0x40 to 0x7f */
71f34979	328	bus-range = <0x40 0x7f>;
1b55883a SR	329
	330	/* Legacy interrupts (note the weird polarity, the bridge seems
	331	* to invert PCIe legacy interrupts).
	332	* We are de-swizzling here because the numbers are actually for
	333	* port of the root complex virtual P2P bridge. But I want
	334	* to avoid putting a node for it in the tree, so the numbers
	335	* below are basically de-swizzled numbers.
	336	* The real slot is on idsel 0, so the swizzling is 1:1
	337	*/
71f34979	338	interrupt-map-mask = <0x0 0x0 0x0 0x7>;
1b55883a	339	interrupt-map = <
71f34979 DG	340	0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */
	341	0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */
	342	0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
	343	0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
1b55883a SR	344	};
	345	};
	346	};