[linux-2.6-block.git] / arch / powerpc / boot / dts / katmai.dts

/*
 * Device Tree Source for AMCC Katmai eval board
 *
 * Copyright (c) 2006, 2007 IBM Corp.
 * Benjamin Herrenschmidt <benh@kernel.crashing.org>
 *
 * Copyright (c) 2006, 2007 IBM Corp.
 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without
 * any warranty of any kind, whether express or implied.
 */

/dts-v1/;

/ {
	#address-cells = <2>;
	#size-cells = <2>;
	model = "amcc,katmai";
	compatible = "amcc,katmai";
	dcr-parent = <&{/cpus/cpu@0}>;

	aliases {
		ethernet0 = &EMAC0;
		serial0 = &UART0;
		serial1 = &UART1;
		serial2 = &UART2;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			model = "PowerPC,440SPe";
			reg = <0x00000000>;
			clock-frequency = <0>; /* Filled in by zImage */
			timebase-frequency = <0>; /* Filled in by zImage */
			i-cache-line-size = <32>;
			d-cache-line-size = <32>;
			i-cache-size = <32768>;
			d-cache-size = <32768>;
			dcr-controller;
			dcr-access-method = "native";
		};
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x00000000 0x0 0x00000000>; /* Filled in by U-Boot */
	};

	UIC0: interrupt-controller0 {
		compatible = "ibm,uic-440spe","ibm,uic";
		interrupt-controller;
		cell-index = <0>;
		dcr-reg = <0x0c0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
	};

	UIC1: interrupt-controller1 {
		compatible = "ibm,uic-440spe","ibm,uic";
		interrupt-controller;
		cell-index = <1>;
		dcr-reg = <0x0d0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	UIC2: interrupt-controller2 {
		compatible = "ibm,uic-440spe","ibm,uic";
		interrupt-controller;
		cell-index = <2>;
		dcr-reg = <0x0e0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	UIC3: interrupt-controller3 {
		compatible = "ibm,uic-440spe","ibm,uic";
		interrupt-controller;
		cell-index = <3>;
		dcr-reg = <0x0f0 0x009>;
		#address-cells = <0>;
		#size-cells = <0>;
		#interrupt-cells = <2>;
		interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
		interrupt-parent = <&UIC0>;
	};

	SDR0: sdr {
		compatible = "ibm,sdr-440spe";
		dcr-reg = <0x00e 0x002>;
	};

	CPR0: cpr {
		compatible = "ibm,cpr-440spe";
		dcr-reg = <0x00c 0x002>;
	};

	MQ0: mq {
		compatible = "ibm,mq-440spe";
		dcr-reg = <0x040 0x020>;
	};

	plb {
		compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4";
		#address-cells = <2>;
		#size-cells = <1>;
		/*        addr-child     addr-parent    size */
		ranges = <0x4 0x00100000 0x4 0x00100000 0x00001000
			  0x4 0x00200000 0x4 0x00200000 0x00000400
			  0x4 0xe0000000 0x4 0xe0000000 0x20000000
			  0xc 0x00000000 0xc 0x00000000 0x20000000
			  0xd 0x00000000 0xd 0x00000000 0x80000000
			  0xd 0x80000000 0xd 0x80000000 0x80000000
			  0xe 0x00000000 0xe 0x00000000 0x80000000
			  0xe 0x80000000 0xe 0x80000000 0x80000000
			  0xf 0x00000000 0xf 0x00000000 0x80000000
			  0xf 0x80000000 0xf 0x80000000 0x80000000>;
		clock-frequency = <0>; /* Filled in by zImage */

		SDRAM0: sdram {
			compatible = "ibm,sdram-440spe", "ibm,sdram-405gp";
			dcr-reg = <0x010 0x002>;
		};

		MAL0: mcmal {
			compatible = "ibm,mcmal-440spe", "ibm,mcmal2";
			dcr-reg = <0x180 0x062>;
			num-tx-chans = <2>;
			num-rx-chans = <1>;
			interrupt-parent = <&MAL0>;
			interrupts = <0x0 0x1 0x2 0x3 0x4>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4
					 /*RXEOB*/ 0x1 &UIC1 0x7 0x4
					 /*SERR*/  0x2 &UIC1 0x1 0x4
					 /*TXDE*/  0x3 &UIC1 0x2 0x4
					 /*RXDE*/  0x4 &UIC1 0x3 0x4>;
		};

		POB0: opb {
			compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x00000000 0x00000004 0xe0000000 0x20000000>;
			clock-frequency = <0>; /* Filled in by zImage */

			EBC0: ebc {
				compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc";
				dcr-reg = <0x012 0x002>;
				#address-cells = <2>;
				#size-cells = <1>;
				clock-frequency = <0>; /* Filled in by zImage */
				interrupts = <0x5 0x1>;
				interrupt-parent = <&UIC1>;
			};

			UART0: serial@10000200 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <0x10000200 0x00000008>;
				virtual-reg = <0xa0000200>;
				clock-frequency = <0>; /* Filled in by zImage */
				current-speed = <115200>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x0 0x4>;
			};

			UART1: serial@10000300 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <0x10000300 0x00000008>;
				virtual-reg = <0xa0000300>;
				clock-frequency = <0>;
				current-speed = <0>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x1 0x4>;
			};


			UART2: serial@10000600 {
				device_type = "serial";
				compatible = "ns16550";
				reg = <0x10000600 0x00000008>;
				virtual-reg = <0xa0000600>;
				clock-frequency = <0>;
				current-speed = <0>;
				interrupt-parent = <&UIC1>;
				interrupts = <0x5 0x4>;
			};

			IIC0: i2c@10000400 {
				compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
				reg = <0x10000400 0x00000014>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x2 0x4>;
			};

			IIC1: i2c@10000500 {
				compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
				reg = <0x10000500 0x00000014>;
				interrupt-parent = <&UIC0>;
				interrupts = <0x3 0x4>;
			};

			EMAC0: ethernet@10000800 {
				linux,network-index = <0x0>;
				device_type = "network";
				compatible = "ibm,emac-440spe", "ibm,emac4";
				interrupt-parent = <&UIC1>;
				interrupts = <0x1c 0x4 0x1d 0x4>;
				reg = <0x10000800 0x00000074>;
				local-mac-address = [000000000000];
				mal-device = <&MAL0>;
				mal-tx-channel = <0>;
				mal-rx-channel = <0>;
				cell-index = <0>;
				max-frame-size = <9000>;
				rx-fifo-size = <4096>;
				tx-fifo-size = <2048>;
				phy-mode = "gmii";
				phy-map = <0x00000000>;
				has-inverted-stacr-oc;
				has-new-stacr-staopc;
			};
		};

		PCIX0: pci@c0ec00000 {
			device_type = "pci";
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix";
			primary;
			large-inbound-windows;
			enable-msi-hole;
			reg = <0x0000000c 0x0ec00000   0x00000008	/* Config space access */
			       0x00000000 0x00000000 0x00000000		/* no IACK cycles */
			       0x0000000c 0x0ed00000   0x00000004   /* Special cycles */
			       0x0000000c 0x0ec80000 0x00000100	/* Internal registers */
			       0x0000000c 0x0ec80100  0x000000fc>;	/* Internal messaging registers */

			/* Outbound ranges, one memory and one IO,
			 * later cannot be changed
			 */
			ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
				  0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;

			/* Inbound 4GB range starting at 0 */
			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;

			/* This drives busses 0 to 0xf */
			bus-range = <0x0 0xf>;

			/*
			 * On Katmai, the following PCI-X interrupts signals
			 * have to be enabled via jumpers (only INTA is
			 * enabled per default):
			 *
			 * INTB: J3: 1-2
			 * INTC: J2: 1-2
			 * INTD: J1: 1-2
			 */
			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
			interrupt-map = <
				/* IDSEL 1 */
				0x800 0x0 0x0 0x1 &UIC1 0x14 0x8
				0x800 0x0 0x0 0x2 &UIC1 0x13 0x8
				0x800 0x0 0x0 0x3 &UIC1 0x12 0x8
				0x800 0x0 0x0 0x4 &UIC1 0x11 0x8
			>;
		};

		PCIE0: pciex@d00000000 {
			device_type = "pci";
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
			primary;
			port = <0x0>; /* port number */
			reg = <0x0000000d 0x00000000 0x20000000	/* Config space access */
			       0x0000000c 0x10000000 0x00001000>;	/* Registers */
			dcr-reg = <0x100 0x020>;
			sdr-base = <0x300>;

			/* Outbound ranges, one memory and one IO,
			 * later cannot be changed
			 */
			ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
				  0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;

			/* Inbound 4GB range starting at 0 */
			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;

			/* This drives busses 0x10 to 0x1f */
			bus-range = <0x10 0x1f>;

			/* Legacy interrupts (note the weird polarity, the bridge seems
			 * to invert PCIe legacy interrupts).
			 * We are de-swizzling here because the numbers are actually for
			 * port of the root complex virtual P2P bridge. But I want
			 * to avoid putting a node for it in the tree, so the numbers
			 * below are basically de-swizzled numbers.
			 * The real slot is on idsel 0, so the swizzling is 1:1
			 */
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			interrupt-map = <
				0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */
				0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */
				0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */
				0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>;
		};

		PCIE1: pciex@d20000000 {
			device_type = "pci";
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
			primary;
			port = <0x1>; /* port number */
			reg = <0x0000000d 0x20000000 0x20000000	/* Config space access */
			       0x0000000c 0x10001000 0x00001000>;	/* Registers */
			dcr-reg = <0x120 0x020>;
			sdr-base = <0x340>;

			/* Outbound ranges, one memory and one IO,
			 * later cannot be changed
			 */
			ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
				  0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;

			/* Inbound 4GB range starting at 0 */
			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;

			/* This drives busses 0x20 to 0x2f */
			bus-range = <0x20 0x2f>;

			/* Legacy interrupts (note the weird polarity, the bridge seems
			 * to invert PCIe legacy interrupts).
			 * We are de-swizzling here because the numbers are actually for
			 * port of the root complex virtual P2P bridge. But I want
			 * to avoid putting a node for it in the tree, so the numbers
			 * below are basically de-swizzled numbers.
			 * The real slot is on idsel 0, so the swizzling is 1:1
			 */
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			interrupt-map = <
				0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */
				0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */
				0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */
				0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>;
		};

		PCIE2: pciex@d40000000 {
			device_type = "pci";
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
			primary;
			port = <0x2>; /* port number */
			reg = <0x0000000d 0x40000000 0x20000000	/* Config space access */
			       0x0000000c 0x10002000 0x00001000>;	/* Registers */
			dcr-reg = <0x140 0x020>;
			sdr-base = <0x370>;

			/* Outbound ranges, one memory and one IO,
			 * later cannot be changed
			 */
			ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000
				  0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>;

			/* Inbound 4GB range starting at 0 */
			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;

			/* This drives busses 0x30 to 0x3f */
			bus-range = <0x30 0x3f>;

			/* Legacy interrupts (note the weird polarity, the bridge seems
			 * to invert PCIe legacy interrupts).
			 * We are de-swizzling here because the numbers are actually for
			 * port of the root complex virtual P2P bridge. But I want
			 * to avoid putting a node for it in the tree, so the numbers
			 * below are basically de-swizzled numbers.
			 * The real slot is on idsel 0, so the swizzling is 1:1
			 */
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			interrupt-map = <
				0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */
				0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */
				0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */
				0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>;
		};

		I2O: i2o@400100000 {
			compatible = "ibm,i2o-440spe";
			reg = <0x00000004 0x00100000 0x100>;
			dcr-reg = <0x060 0x020>;
		};

		DMA0: dma0@400100100 {
			compatible = "ibm,dma-440spe";
			cell-index = <0>;
			reg = <0x00000004 0x00100100 0x100>;
			dcr-reg = <0x060 0x020>;
			interrupt-parent = <&DMA0>;
			interrupts = <0 1>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = <
				0 &UIC0 0x14 4
				1 &UIC1 0x16 4>;
		};

		DMA1: dma1@400100200 {
			compatible = "ibm,dma-440spe";
			cell-index = <1>;
			reg = <0x00000004 0x00100200 0x100>;
			dcr-reg = <0x060 0x020>;
			interrupt-parent = <&DMA1>;
			interrupts = <0 1>;
			#interrupt-cells = <1>;
			#address-cells = <0>;
			#size-cells = <0>;
			interrupt-map = <
				0 &UIC0 0x16 4
				1 &UIC1 0x16 4>;
		};

		xor-accel@400200000 {
			compatible = "amcc,xor-accelerator";
			reg = <0x00000004 0x00200000 0x400>;
			interrupt-parent = <&UIC1>;
			interrupts = <0x1f 4>;
		};
	};

	chosen {
		linux,stdout-path = "/plb/opb/serial@10000200";
	};
};
Commit	Line	Data
3de9c9cd BH	1	/*
	2	* Device Tree Source for AMCC Katmai eval board
	3	*
	4	* Copyright (c) 2006, 2007 IBM Corp.
	5	* Benjamin Herrenschmidt <benh@kernel.crashing.org>
	6	*
	7	* Copyright (c) 2006, 2007 IBM Corp.
	8	* Josh Boyer <jwboyer@linux.vnet.ibm.com>
	9	*
	10	* This file is licensed under the terms of the GNU General Public
	11	* License version 2. This program is licensed "as is" without
	12	* any warranty of any kind, whether express or implied.
	13	*/
	14
71f34979 DG	15	/dts-v1/;
71f34979 DG	16
3de9c9cd BH	17	/ {
3de9c9cd BH	18	#address-cells = <2>;
59e1d495	19	#size-cells = <2>;
3de9c9cd BH	20	model = "amcc,katmai";
3de9c9cd BH	21	compatible = "amcc,katmai";
71f34979	22	dcr-parent = <&{/cpus/cpu@0}>;
3de9c9cd	23
8aaed98c SR	24	aliases {
	25	ethernet0 = &EMAC0;
	26	serial0 = &UART0;
	27	serial1 = &UART1;
	28	serial2 = &UART2;
	29	};
	30
3de9c9cd BH	31	cpus {
	32	#address-cells = <1>;
	33	#size-cells = <0>;
	34
72fda114	35	cpu@0 {
3de9c9cd	36	device_type = "cpu";
72fda114	37	model = "PowerPC,440SPe";
71f34979	38	reg = <0x00000000>;
3de9c9cd BH	39	clock-frequency = <0>; /* Filled in by zImage */
3de9c9cd BH	40	timebase-frequency = <0>; /* Filled in by zImage */
71f34979 DG	41	i-cache-line-size = <32>;
	42	d-cache-line-size = <32>;
	43	i-cache-size = <32768>;
	44	d-cache-size = <32768>;
3de9c9cd BH	45	dcr-controller;
	46	dcr-access-method = "native";
	47	};
	48	};
	49
	50	memory {
	51	device_type = "memory";
59e1d495	52	reg = <0x0 0x00000000 0x0 0x00000000>; /* Filled in by U-Boot */
3de9c9cd BH	53	};
	54
	55	UIC0: interrupt-controller0 {
	56	compatible = "ibm,uic-440spe","ibm,uic";
	57	interrupt-controller;
	58	cell-index = <0>;
71f34979	59	dcr-reg = <0x0c0 0x009>;
3de9c9cd BH	60	#address-cells = <0>;
	61	#size-cells = <0>;
	62	#interrupt-cells = <2>;
	63	};
	64
	65	UIC1: interrupt-controller1 {
	66	compatible = "ibm,uic-440spe","ibm,uic";
	67	interrupt-controller;
	68	cell-index = <1>;
71f34979	69	dcr-reg = <0x0d0 0x009>;
3de9c9cd BH	70	#address-cells = <0>;
	71	#size-cells = <0>;
	72	#interrupt-cells = <2>;
71f34979	73	interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
3de9c9cd BH	74	interrupt-parent = <&UIC0>;
	75	};
	76
	77	UIC2: interrupt-controller2 {
	78	compatible = "ibm,uic-440spe","ibm,uic";
	79	interrupt-controller;
	80	cell-index = <2>;
71f34979	81	dcr-reg = <0x0e0 0x009>;
3de9c9cd BH	82	#address-cells = <0>;
	83	#size-cells = <0>;
	84	#interrupt-cells = <2>;
71f34979	85	interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
3de9c9cd BH	86	interrupt-parent = <&UIC0>;
	87	};
	88
	89	UIC3: interrupt-controller3 {
	90	compatible = "ibm,uic-440spe","ibm,uic";
	91	interrupt-controller;
	92	cell-index = <3>;
71f34979	93	dcr-reg = <0x0f0 0x009>;
3de9c9cd BH	94	#address-cells = <0>;
	95	#size-cells = <0>;
	96	#interrupt-cells = <2>;
71f34979	97	interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
3de9c9cd BH	98	interrupt-parent = <&UIC0>;
	99	};
	100
	101	SDR0: sdr {
	102	compatible = "ibm,sdr-440spe";
71f34979	103	dcr-reg = <0x00e 0x002>;
3de9c9cd BH	104	};
	105
	106	CPR0: cpr {
	107	compatible = "ibm,cpr-440spe";
71f34979	108	dcr-reg = <0x00c 0x002>;
3de9c9cd BH	109	};
3de9c9cd BH	110
070bae1f AG	111	MQ0: mq {
	112	compatible = "ibm,mq-440spe";
	113	dcr-reg = <0x040 0x020>;
	114	};
	115
3de9c9cd BH	116	plb {
	117	compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4";
	118	#address-cells = <2>;
	119	#size-cells = <1>;
59e1d495	120	/* addr-child addr-parent size */
070bae1f AG	121	ranges = <0x4 0x00100000 0x4 0x00100000 0x00001000
	122	0x4 0x00200000 0x4 0x00200000 0x00000400
	123	0x4 0xe0000000 0x4 0xe0000000 0x20000000
59e1d495 SR	124	0xc 0x00000000 0xc 0x00000000 0x20000000
	125	0xd 0x00000000 0xd 0x00000000 0x80000000
	126	0xd 0x80000000 0xd 0x80000000 0x80000000
	127	0xe 0x00000000 0xe 0x00000000 0x80000000
	128	0xe 0x80000000 0xe 0x80000000 0x80000000
	129	0xf 0x00000000 0xf 0x00000000 0x80000000
	130	0xf 0x80000000 0xf 0x80000000 0x80000000>;
3de9c9cd BH	131	clock-frequency = <0>; /* Filled in by zImage */
	132
	133	SDRAM0: sdram {
	134	compatible = "ibm,sdram-440spe", "ibm,sdram-405gp";
71f34979	135	dcr-reg = <0x010 0x002>;
3de9c9cd BH	136	};
	137
	138	MAL0: mcmal {
	139	compatible = "ibm,mcmal-440spe", "ibm,mcmal2";
71f34979	140	dcr-reg = <0x180 0x062>;
3de9c9cd BH	141	num-tx-chans = <2>;
	142	num-rx-chans = <1>;
	143	interrupt-parent = <&MAL0>;
71f34979	144	interrupts = <0x0 0x1 0x2 0x3 0x4>;
3de9c9cd BH	145	#interrupt-cells = <1>;
	146	#address-cells = <0>;
	147	#size-cells = <0>;
71f34979 DG	148	interrupt-map = </TXEOB/ 0x0 &UIC1 0x6 0x4
	149	/RXEOB/ 0x1 &UIC1 0x7 0x4
	150	/SERR/ 0x2 &UIC1 0x1 0x4
	151	/TXDE/ 0x3 &UIC1 0x2 0x4
	152	/RXDE/ 0x4 &UIC1 0x3 0x4>;
3de9c9cd BH	153	};
	154
	155	POB0: opb {
3db3ba03	156	compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
3de9c9cd BH	157	#address-cells = <1>;
3de9c9cd BH	158	#size-cells = <1>;
71f34979	159	ranges = <0x00000000 0x00000004 0xe0000000 0x20000000>;
3db3ba03	160	clock-frequency = <0>; /* Filled in by zImage */
3de9c9cd BH	161
	162	EBC0: ebc {
	163	compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc";
71f34979	164	dcr-reg = <0x012 0x002>;
3de9c9cd BH	165	#address-cells = <2>;
	166	#size-cells = <1>;
	167	clock-frequency = <0>; /* Filled in by zImage */
71f34979	168	interrupts = <0x5 0x1>;
3de9c9cd BH	169	interrupt-parent = <&UIC1>;
	170	};
	171
	172	UART0: serial@10000200 {
3db3ba03 SR	173	device_type = "serial";
3db3ba03 SR	174	compatible = "ns16550";
71f34979 DG	175	reg = <0x10000200 0x00000008>;
71f34979 DG	176	virtual-reg = <0xa0000200>;
3db3ba03	177	clock-frequency = <0>; /* Filled in by zImage */
71f34979	178	current-speed = <115200>;
3db3ba03	179	interrupt-parent = <&UIC0>;
71f34979	180	interrupts = <0x0 0x4>;
3db3ba03	181	};
3de9c9cd BH	182
3de9c9cd BH	183	UART1: serial@10000300 {
3db3ba03 SR	184	device_type = "serial";
3db3ba03 SR	185	compatible = "ns16550";
71f34979 DG	186	reg = <0x10000300 0x00000008>;
71f34979 DG	187	virtual-reg = <0xa0000300>;
3db3ba03 SR	188	clock-frequency = <0>;
	189	current-speed = <0>;
	190	interrupt-parent = <&UIC0>;
71f34979	191	interrupts = <0x1 0x4>;
3db3ba03	192	};
3de9c9cd BH	193
	194
	195	UART2: serial@10000600 {
3db3ba03 SR	196	device_type = "serial";
3db3ba03 SR	197	compatible = "ns16550";
71f34979 DG	198	reg = <0x10000600 0x00000008>;
71f34979 DG	199	virtual-reg = <0xa0000600>;
3db3ba03 SR	200	clock-frequency = <0>;
	201	current-speed = <0>;
	202	interrupt-parent = <&UIC1>;
71f34979	203	interrupts = <0x5 0x4>;
3db3ba03	204	};
3de9c9cd BH	205
3de9c9cd BH	206	IIC0: i2c@10000400 {
3de9c9cd	207	compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
71f34979	208	reg = <0x10000400 0x00000014>;
3de9c9cd	209	interrupt-parent = <&UIC0>;
71f34979	210	interrupts = <0x2 0x4>;
3de9c9cd BH	211	};
	212
	213	IIC1: i2c@10000500 {
3de9c9cd	214	compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
71f34979	215	reg = <0x10000500 0x00000014>;
3de9c9cd	216	interrupt-parent = <&UIC0>;
71f34979	217	interrupts = <0x3 0x4>;
3de9c9cd BH	218	};
	219
	220	EMAC0: ethernet@10000800 {
71f34979	221	linux,network-index = <0x0>;
3de9c9cd BH	222	device_type = "network";
	223	compatible = "ibm,emac-440spe", "ibm,emac4";
	224	interrupt-parent = <&UIC1>;
71f34979	225	interrupts = <0x1c 0x4 0x1d 0x4>;
05781ccd	226	reg = <0x10000800 0x00000074>;
3de9c9cd BH	227	local-mac-address = [000000000000];
	228	mal-device = <&MAL0>;
	229	mal-tx-channel = <0>;
	230	mal-rx-channel = <0>;
	231	cell-index = <0>;
71f34979 DG	232	max-frame-size = <9000>;
	233	rx-fifo-size = <4096>;
	234	tx-fifo-size = <2048>;
3de9c9cd	235	phy-mode = "gmii";
71f34979	236	phy-map = <0x00000000>;
3de9c9cd BH	237	has-inverted-stacr-oc;
	238	has-new-stacr-staopc;
	239	};
	240	};
	241
	242	PCIX0: pci@c0ec00000 {
	243	device_type = "pci";
	244	#interrupt-cells = <1>;
	245	#size-cells = <2>;
	246	#address-cells = <3>;
	247	compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix";
	248	primary;
	249	large-inbound-windows;
	250	enable-msi-hole;
71f34979 DG	251	reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */
	252	0x00000000 0x00000000 0x00000000 /* no IACK cycles */
	253	0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
	254	0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
	255	0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */
3de9c9cd BH	256
	257	/* Outbound ranges, one memory and one IO,
	258	* later cannot be changed
	259	*/
71f34979 DG	260	ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
71f34979 DG	261	0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
3de9c9cd	262
2e991cfa	263	/* Inbound 4GB range starting at 0 */
2e991cfa	264	dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
3de9c9cd BH	265
3de9c9cd BH	266	/* This drives busses 0 to 0xf */
71f34979	267	bus-range = <0x0 0xf>;
3de9c9cd BH	268
	269	/*
	270	* On Katmai, the following PCI-X interrupts signals
	271	* have to be enabled via jumpers (only INTA is
	272	* enabled per default):
	273	*
	274	* INTB: J3: 1-2
	275	* INTC: J2: 1-2
	276	* INTD: J1: 1-2
	277	*/
71f34979	278	interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
3de9c9cd BH	279	interrupt-map = <
3de9c9cd BH	280	/* IDSEL 1 */
71f34979 DG	281	0x800 0x0 0x0 0x1 &UIC1 0x14 0x8
	282	0x800 0x0 0x0 0x2 &UIC1 0x13 0x8
	283	0x800 0x0 0x0 0x3 &UIC1 0x12 0x8
	284	0x800 0x0 0x0 0x4 &UIC1 0x11 0x8
3de9c9cd BH	285	>;
	286	};
	287
	288	PCIE0: pciex@d00000000 {
	289	device_type = "pci";
	290	#interrupt-cells = <1>;
	291	#size-cells = <2>;
	292	#address-cells = <3>;
accf5ef2	293	compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
3de9c9cd	294	primary;
71f34979 DG	295	port = <0x0>; /* port number */
	296	reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
	297	0x0000000c 0x10000000 0x00001000>; /* Registers */
	298	dcr-reg = <0x100 0x020>;
	299	sdr-base = <0x300>;
3de9c9cd BH	300
	301	/* Outbound ranges, one memory and one IO,
	302	* later cannot be changed
	303	*/
71f34979 DG	304	ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
71f34979 DG	305	0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
3de9c9cd	306
2e991cfa	307	/* Inbound 4GB range starting at 0 */
2e991cfa	308	dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
3de9c9cd	309
2e991cfa	310	/* This drives busses 0x10 to 0x1f */
71f34979	311	bus-range = <0x10 0x1f>;
3de9c9cd BH	312
	313	/* Legacy interrupts (note the weird polarity, the bridge seems
	314	* to invert PCIe legacy interrupts).
	315	* We are de-swizzling here because the numbers are actually for
	316	* port of the root complex virtual P2P bridge. But I want
	317	* to avoid putting a node for it in the tree, so the numbers
	318	* below are basically de-swizzled numbers.
	319	* The real slot is on idsel 0, so the swizzling is 1:1
	320	*/
71f34979	321	interrupt-map-mask = <0x0 0x0 0x0 0x7>;
3de9c9cd	322	interrupt-map = <
71f34979 DG	323	0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */
	324	0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */
	325	0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */
	326	0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>;
3de9c9cd BH	327	};
	328
	329	PCIE1: pciex@d20000000 {
	330	device_type = "pci";
	331	#interrupt-cells = <1>;
	332	#size-cells = <2>;
	333	#address-cells = <3>;
accf5ef2	334	compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
3de9c9cd	335	primary;
71f34979 DG	336	port = <0x1>; /* port number */
	337	reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
	338	0x0000000c 0x10001000 0x00001000>; /* Registers */
	339	dcr-reg = <0x120 0x020>;
	340	sdr-base = <0x340>;
3de9c9cd BH	341
	342	/* Outbound ranges, one memory and one IO,
	343	* later cannot be changed
	344	*/
71f34979 DG	345	ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
71f34979 DG	346	0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
3de9c9cd	347
2e991cfa	348	/* Inbound 4GB range starting at 0 */
2e991cfa	349	dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
3de9c9cd	350
2e991cfa	351	/* This drives busses 0x20 to 0x2f */
71f34979	352	bus-range = <0x20 0x2f>;
3de9c9cd BH	353
	354	/* Legacy interrupts (note the weird polarity, the bridge seems
	355	* to invert PCIe legacy interrupts).
	356	* We are de-swizzling here because the numbers are actually for
	357	* port of the root complex virtual P2P bridge. But I want
	358	* to avoid putting a node for it in the tree, so the numbers
	359	* below are basically de-swizzled numbers.
	360	* The real slot is on idsel 0, so the swizzling is 1:1
	361	*/
71f34979	362	interrupt-map-mask = <0x0 0x0 0x0 0x7>;
3de9c9cd	363	interrupt-map = <
71f34979 DG	364	0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */
	365	0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */
	366	0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */
	367	0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>;
3de9c9cd BH	368	};
	369
	370	PCIE2: pciex@d40000000 {
	371	device_type = "pci";
	372	#interrupt-cells = <1>;
	373	#size-cells = <2>;
	374	#address-cells = <3>;
accf5ef2	375	compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
3de9c9cd	376	primary;
71f34979 DG	377	port = <0x2>; /* port number */
	378	reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */
	379	0x0000000c 0x10002000 0x00001000>; /* Registers */
	380	dcr-reg = <0x140 0x020>;
	381	sdr-base = <0x370>;
3de9c9cd BH	382
	383	/* Outbound ranges, one memory and one IO,
	384	* later cannot be changed
	385	*/
71f34979 DG	386	ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000
71f34979 DG	387	0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>;
3de9c9cd	388
2e991cfa	389	/* Inbound 4GB range starting at 0 */
2e991cfa	390	dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
3de9c9cd	391
2e991cfa	392	/* This drives busses 0x30 to 0x3f */
71f34979	393	bus-range = <0x30 0x3f>;
3de9c9cd BH	394
	395	/* Legacy interrupts (note the weird polarity, the bridge seems
	396	* to invert PCIe legacy interrupts).
	397	* We are de-swizzling here because the numbers are actually for
	398	* port of the root complex virtual P2P bridge. But I want
	399	* to avoid putting a node for it in the tree, so the numbers
	400	* below are basically de-swizzled numbers.
	401	* The real slot is on idsel 0, so the swizzling is 1:1
	402	*/
71f34979	403	interrupt-map-mask = <0x0 0x0 0x0 0x7>;
3de9c9cd	404	interrupt-map = <
71f34979 DG	405	0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */
	406	0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */
	407	0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */
	408	0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>;
3de9c9cd	409	};
070bae1f AG	410
	411	I2O: i2o@400100000 {
	412	compatible = "ibm,i2o-440spe";
	413	reg = <0x00000004 0x00100000 0x100>;
	414	dcr-reg = <0x060 0x020>;
	415	};
	416
	417	DMA0: dma0@400100100 {
	418	compatible = "ibm,dma-440spe";
	419	cell-index = <0>;
	420	reg = <0x00000004 0x00100100 0x100>;
	421	dcr-reg = <0x060 0x020>;
	422	interrupt-parent = <&DMA0>;
	423	interrupts = <0 1>;
	424	#interrupt-cells = <1>;
	425	#address-cells = <0>;
	426	#size-cells = <0>;
	427	interrupt-map = <
	428	0 &UIC0 0x14 4
	429	1 &UIC1 0x16 4>;
	430	};
	431
	432	DMA1: dma1@400100200 {
	433	compatible = "ibm,dma-440spe";
	434	cell-index = <1>;
	435	reg = <0x00000004 0x00100200 0x100>;
	436	dcr-reg = <0x060 0x020>;
	437	interrupt-parent = <&DMA1>;
	438	interrupts = <0 1>;
	439	#interrupt-cells = <1>;
	440	#address-cells = <0>;
	441	#size-cells = <0>;
	442	interrupt-map = <
	443	0 &UIC0 0x16 4
	444	1 &UIC1 0x16 4>;
	445	};
	446
	447	xor-accel@400200000 {
	448	compatible = "amcc,xor-accelerator";
	449	reg = <0x00000004 0x00200000 0x400>;
	450	interrupt-parent = <&UIC1>;
	451	interrupts = <0x1f 4>;
	452	};
3de9c9cd BH	453	};
	454
	455	chosen {
	456	linux,stdout-path = "/plb/opb/serial@10000200";
	457	};
	458	};