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1da177e4 LT |
1 | /* |
2 | * linux/arch/parisc/traps.c | |
3 | * | |
4 | * Copyright (C) 1991, 1992 Linus Torvalds | |
5 | * Copyright (C) 1999, 2000 Philipp Rumpf <prumpf@tux.org> | |
6 | */ | |
7 | ||
8 | /* | |
9 | * 'Traps.c' handles hardware traps and faults after we have saved some | |
10 | * state in 'asm.s'. | |
11 | */ | |
12 | ||
1da177e4 LT |
13 | #include <linux/sched.h> |
14 | #include <linux/kernel.h> | |
15 | #include <linux/string.h> | |
16 | #include <linux/errno.h> | |
17 | #include <linux/ptrace.h> | |
18 | #include <linux/timer.h> | |
22fced88 | 19 | #include <linux/delay.h> |
1da177e4 LT |
20 | #include <linux/mm.h> |
21 | #include <linux/module.h> | |
22 | #include <linux/smp.h> | |
23 | #include <linux/smp_lock.h> | |
24 | #include <linux/spinlock.h> | |
25 | #include <linux/init.h> | |
26 | #include <linux/interrupt.h> | |
27 | #include <linux/console.h> | |
28 | #include <linux/kallsyms.h> | |
29 | ||
30 | #include <asm/assembly.h> | |
31 | #include <asm/system.h> | |
32 | #include <asm/uaccess.h> | |
33 | #include <asm/io.h> | |
34 | #include <asm/irq.h> | |
35 | #include <asm/traps.h> | |
36 | #include <asm/unaligned.h> | |
37 | #include <asm/atomic.h> | |
38 | #include <asm/smp.h> | |
39 | #include <asm/pdc.h> | |
40 | #include <asm/pdc_chassis.h> | |
41 | #include <asm/unwind.h> | |
42 | ||
43 | #include "../math-emu/math-emu.h" /* for handle_fpe() */ | |
44 | ||
45 | #define PRINT_USER_FAULTS /* (turn this on if you want user faults to be */ | |
46 | /* dumped to the console via printk) */ | |
47 | ||
48 | #if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) | |
49 | DEFINE_SPINLOCK(pa_dbit_lock); | |
50 | #endif | |
51 | ||
52 | int printbinary(char *buf, unsigned long x, int nbits) | |
53 | { | |
54 | unsigned long mask = 1UL << (nbits - 1); | |
55 | while (mask != 0) { | |
56 | *buf++ = (mask & x ? '1' : '0'); | |
57 | mask >>= 1; | |
58 | } | |
59 | *buf = '\0'; | |
60 | ||
61 | return nbits; | |
62 | } | |
63 | ||
64 | #ifdef __LP64__ | |
65 | #define RFMT "%016lx" | |
66 | #else | |
67 | #define RFMT "%08lx" | |
68 | #endif | |
1c63b4b8 | 69 | #define FFMT "%016llx" /* fpregs are 64-bit always */ |
1da177e4 | 70 | |
1c63b4b8 KM |
71 | #define PRINTREGS(lvl,r,f,fmt,x) \ |
72 | printk("%s%s%02d-%02d " fmt " " fmt " " fmt " " fmt "\n", \ | |
73 | lvl, f, (x), (x+3), (r)[(x)+0], (r)[(x)+1], \ | |
74 | (r)[(x)+2], (r)[(x)+3]) | |
75 | ||
76 | static void print_gr(char *level, struct pt_regs *regs) | |
1da177e4 LT |
77 | { |
78 | int i; | |
1c63b4b8 | 79 | char buf[64]; |
1da177e4 | 80 | |
1c63b4b8 | 81 | printk("%s\n", level); |
1da177e4 LT |
82 | printk("%s YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI\n", level); |
83 | printbinary(buf, regs->gr[0], 32); | |
84 | printk("%sPSW: %s %s\n", level, buf, print_tainted()); | |
85 | ||
1c63b4b8 KM |
86 | for (i = 0; i < 32; i += 4) |
87 | PRINTREGS(level, regs->gr, "r", RFMT, i); | |
88 | } | |
1da177e4 | 89 | |
1c63b4b8 KM |
90 | static void print_fr(char *level, struct pt_regs *regs) |
91 | { | |
92 | int i; | |
93 | char buf[64]; | |
94 | struct { u32 sw[2]; } s; | |
1da177e4 | 95 | |
eba91727 TV |
96 | /* FR are 64bit everywhere. Need to use asm to get the content |
97 | * of fpsr/fper1, and we assume that we won't have a FP Identify | |
98 | * in our way, otherwise we're screwed. | |
99 | * The fldd is used to restore the T-bit if there was one, as the | |
100 | * store clears it anyway. | |
1c63b4b8 KM |
101 | * PA2.0 book says "thou shall not use fstw on FPSR/FPERs" - T-Bone */ |
102 | asm volatile ("fstd %%fr0,0(%1) \n\t" | |
103 | "fldd 0(%1),%%fr0 \n\t" | |
104 | : "=m" (s) : "r" (&s) : "r0"); | |
eba91727 TV |
105 | |
106 | printk("%s\n", level); | |
107 | printk("%s VZOUICununcqcqcqcqcqcrmunTDVZOUI\n", level); | |
108 | printbinary(buf, s.sw[0], 32); | |
109 | printk("%sFPSR: %s\n", level, buf); | |
110 | printk("%sFPER1: %08x\n", level, s.sw[1]); | |
111 | ||
112 | /* here we'll print fr0 again, tho it'll be meaningless */ | |
1c63b4b8 KM |
113 | for (i = 0; i < 32; i += 4) |
114 | PRINTREGS(level, regs->fr, "fr", FFMT, i); | |
115 | } | |
116 | ||
117 | void show_regs(struct pt_regs *regs) | |
118 | { | |
119 | int i; | |
120 | char *level; | |
121 | unsigned long cr30, cr31; | |
122 | ||
123 | level = user_mode(regs) ? KERN_DEBUG : KERN_CRIT; | |
124 | ||
125 | print_gr(level, regs); | |
126 | ||
127 | for (i = 0; i < 8; i += 4) | |
128 | PRINTREGS(level, regs->sr, "sr", RFMT, i); | |
129 | ||
130 | if (user_mode(regs)) | |
131 | print_fr(level, regs); | |
1da177e4 LT |
132 | |
133 | cr30 = mfctl(30); | |
134 | cr31 = mfctl(31); | |
135 | printk("%s\n", level); | |
136 | printk("%sIASQ: " RFMT " " RFMT " IAOQ: " RFMT " " RFMT "\n", | |
137 | level, regs->iasq[0], regs->iasq[1], regs->iaoq[0], regs->iaoq[1]); | |
138 | printk("%s IIR: %08lx ISR: " RFMT " IOR: " RFMT "\n", | |
139 | level, regs->iir, regs->isr, regs->ior); | |
140 | printk("%s CPU: %8d CR30: " RFMT " CR31: " RFMT "\n", | |
141 | level, current_thread_info()->cpu, cr30, cr31); | |
142 | printk("%s ORIG_R28: " RFMT "\n", level, regs->orig_r28); | |
143 | printk(level); | |
144 | print_symbol(" IAOQ[0]: %s\n", regs->iaoq[0]); | |
145 | printk(level); | |
146 | print_symbol(" IAOQ[1]: %s\n", regs->iaoq[1]); | |
147 | printk(level); | |
148 | print_symbol(" RP(r2): %s\n", regs->gr[2]); | |
149 | } | |
150 | ||
151 | ||
152 | void dump_stack(void) | |
153 | { | |
154 | show_stack(NULL, NULL); | |
155 | } | |
156 | ||
157 | EXPORT_SYMBOL(dump_stack); | |
158 | ||
159 | static void do_show_stack(struct unwind_frame_info *info) | |
160 | { | |
161 | int i = 1; | |
162 | ||
163 | printk("Backtrace:\n"); | |
164 | while (i <= 16) { | |
165 | if (unwind_once(info) < 0 || info->ip == 0) | |
166 | break; | |
167 | ||
168 | if (__kernel_text_address(info->ip)) { | |
169 | printk(" [<" RFMT ">] ", info->ip); | |
170 | #ifdef CONFIG_KALLSYMS | |
171 | print_symbol("%s\n", info->ip); | |
172 | #else | |
173 | if ((i & 0x03) == 0) | |
174 | printk("\n"); | |
175 | #endif | |
176 | i++; | |
177 | } | |
178 | } | |
179 | printk("\n"); | |
180 | } | |
181 | ||
182 | void show_stack(struct task_struct *task, unsigned long *s) | |
183 | { | |
184 | struct unwind_frame_info info; | |
185 | ||
186 | if (!task) { | |
187 | unsigned long sp; | |
188 | struct pt_regs *r; | |
189 | ||
190 | HERE: | |
191 | asm volatile ("copy %%r30, %0" : "=r"(sp)); | |
cb6fc18e | 192 | r = kzalloc(sizeof(struct pt_regs), GFP_KERNEL); |
1da177e4 LT |
193 | if (!r) |
194 | return; | |
1da177e4 LT |
195 | r->iaoq[0] = (unsigned long)&&HERE; |
196 | r->gr[2] = (unsigned long)__builtin_return_address(0); | |
197 | r->gr[30] = sp; | |
198 | unwind_frame_init(&info, current, r); | |
199 | kfree(r); | |
200 | } else { | |
201 | unwind_frame_init_from_blocked_task(&info, task); | |
202 | } | |
203 | ||
204 | do_show_stack(&info); | |
205 | } | |
206 | ||
207 | void die_if_kernel(char *str, struct pt_regs *regs, long err) | |
208 | { | |
209 | if (user_mode(regs)) { | |
210 | if (err == 0) | |
211 | return; /* STFU */ | |
212 | ||
213 | printk(KERN_CRIT "%s (pid %d): %s (code %ld) at " RFMT "\n", | |
214 | current->comm, current->pid, str, err, regs->iaoq[0]); | |
215 | #ifdef PRINT_USER_FAULTS | |
216 | /* XXX for debugging only */ | |
217 | show_regs(regs); | |
218 | #endif | |
219 | return; | |
220 | } | |
221 | ||
222 | oops_in_progress = 1; | |
223 | ||
224 | /* Amuse the user in a SPARC fashion */ | |
225 | printk( | |
226 | " _______________________________ \n" | |
227 | " < Your System ate a SPARC! Gah! >\n" | |
228 | " ------------------------------- \n" | |
229 | " \\ ^__^\n" | |
230 | " \\ (xx)\\_______\n" | |
231 | " (__)\\ )\\/\\\n" | |
232 | " U ||----w |\n" | |
233 | " || ||\n"); | |
234 | ||
235 | /* unlock the pdc lock if necessary */ | |
236 | pdc_emergency_unlock(); | |
237 | ||
238 | /* maybe the kernel hasn't booted very far yet and hasn't been able | |
239 | * to initialize the serial or STI console. In that case we should | |
240 | * re-enable the pdc console, so that the user will be able to | |
241 | * identify the problem. */ | |
242 | if (!console_drivers) | |
243 | pdc_console_restart(); | |
244 | ||
245 | printk(KERN_CRIT "%s (pid %d): %s (code %ld)\n", | |
246 | current->comm, current->pid, str, err); | |
247 | show_regs(regs); | |
248 | ||
22fced88 HD |
249 | if (in_interrupt()) |
250 | panic("Fatal exception in interrupt"); | |
251 | ||
252 | if (panic_on_oops) { | |
253 | printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n"); | |
254 | ssleep(5); | |
255 | panic("Fatal exception"); | |
256 | } | |
257 | ||
1da177e4 LT |
258 | /* Wot's wrong wif bein' racy? */ |
259 | if (current->thread.flags & PARISC_KERNEL_DEATH) { | |
260 | printk(KERN_CRIT "%s() recursion detected.\n", __FUNCTION__); | |
261 | local_irq_enable(); | |
262 | while (1); | |
263 | } | |
264 | ||
265 | current->thread.flags |= PARISC_KERNEL_DEATH; | |
266 | do_exit(SIGSEGV); | |
267 | } | |
268 | ||
269 | int syscall_ipi(int (*syscall) (struct pt_regs *), struct pt_regs *regs) | |
270 | { | |
271 | return syscall(regs); | |
272 | } | |
273 | ||
274 | /* gdb uses break 4,8 */ | |
275 | #define GDB_BREAK_INSN 0x10004 | |
276 | void handle_gdb_break(struct pt_regs *regs, int wot) | |
277 | { | |
278 | struct siginfo si; | |
279 | ||
280 | si.si_code = wot; | |
281 | si.si_addr = (void __user *) (regs->iaoq[0] & ~3); | |
282 | si.si_signo = SIGTRAP; | |
283 | si.si_errno = 0; | |
284 | force_sig_info(SIGTRAP, &si, current); | |
285 | } | |
286 | ||
287 | void handle_break(unsigned iir, struct pt_regs *regs) | |
288 | { | |
289 | struct siginfo si; | |
290 | ||
291 | switch(iir) { | |
292 | case 0x00: | |
293 | #ifdef PRINT_USER_FAULTS | |
294 | printk(KERN_DEBUG "break 0,0: pid=%d command='%s'\n", | |
295 | current->pid, current->comm); | |
296 | #endif | |
297 | die_if_kernel("Breakpoint", regs, 0); | |
298 | #ifdef PRINT_USER_FAULTS | |
299 | show_regs(regs); | |
300 | #endif | |
301 | si.si_code = TRAP_BRKPT; | |
302 | si.si_addr = (void __user *) (regs->iaoq[0] & ~3); | |
303 | si.si_signo = SIGTRAP; | |
304 | force_sig_info(SIGTRAP, &si, current); | |
305 | break; | |
306 | ||
307 | case GDB_BREAK_INSN: | |
308 | die_if_kernel("Breakpoint", regs, 0); | |
309 | handle_gdb_break(regs, TRAP_BRKPT); | |
310 | break; | |
311 | ||
312 | default: | |
313 | #ifdef PRINT_USER_FAULTS | |
314 | printk(KERN_DEBUG "break %#08x: pid=%d command='%s'\n", | |
315 | iir, current->pid, current->comm); | |
316 | show_regs(regs); | |
317 | #endif | |
318 | si.si_signo = SIGTRAP; | |
319 | si.si_code = TRAP_BRKPT; | |
320 | si.si_addr = (void __user *) (regs->iaoq[0] & ~3); | |
321 | force_sig_info(SIGTRAP, &si, current); | |
322 | return; | |
323 | } | |
324 | } | |
325 | ||
326 | ||
327 | int handle_toc(void) | |
328 | { | |
329 | printk(KERN_CRIT "TOC call.\n"); | |
330 | return 0; | |
331 | } | |
332 | ||
333 | static void default_trap(int code, struct pt_regs *regs) | |
334 | { | |
335 | printk(KERN_ERR "Trap %d on CPU %d\n", code, smp_processor_id()); | |
336 | show_regs(regs); | |
337 | } | |
338 | ||
339 | void (*cpu_lpmc) (int code, struct pt_regs *regs) = default_trap; | |
340 | ||
341 | ||
342 | void transfer_pim_to_trap_frame(struct pt_regs *regs) | |
343 | { | |
344 | register int i; | |
345 | extern unsigned int hpmc_pim_data[]; | |
346 | struct pdc_hpmc_pim_11 *pim_narrow; | |
347 | struct pdc_hpmc_pim_20 *pim_wide; | |
348 | ||
349 | if (boot_cpu_data.cpu_type >= pcxu) { | |
350 | ||
351 | pim_wide = (struct pdc_hpmc_pim_20 *)hpmc_pim_data; | |
352 | ||
353 | /* | |
354 | * Note: The following code will probably generate a | |
355 | * bunch of truncation error warnings from the compiler. | |
356 | * Could be handled with an ifdef, but perhaps there | |
357 | * is a better way. | |
358 | */ | |
359 | ||
360 | regs->gr[0] = pim_wide->cr[22]; | |
361 | ||
362 | for (i = 1; i < 32; i++) | |
363 | regs->gr[i] = pim_wide->gr[i]; | |
364 | ||
365 | for (i = 0; i < 32; i++) | |
366 | regs->fr[i] = pim_wide->fr[i]; | |
367 | ||
368 | for (i = 0; i < 8; i++) | |
369 | regs->sr[i] = pim_wide->sr[i]; | |
370 | ||
371 | regs->iasq[0] = pim_wide->cr[17]; | |
372 | regs->iasq[1] = pim_wide->iasq_back; | |
373 | regs->iaoq[0] = pim_wide->cr[18]; | |
374 | regs->iaoq[1] = pim_wide->iaoq_back; | |
375 | ||
376 | regs->sar = pim_wide->cr[11]; | |
377 | regs->iir = pim_wide->cr[19]; | |
378 | regs->isr = pim_wide->cr[20]; | |
379 | regs->ior = pim_wide->cr[21]; | |
380 | } | |
381 | else { | |
382 | pim_narrow = (struct pdc_hpmc_pim_11 *)hpmc_pim_data; | |
383 | ||
384 | regs->gr[0] = pim_narrow->cr[22]; | |
385 | ||
386 | for (i = 1; i < 32; i++) | |
387 | regs->gr[i] = pim_narrow->gr[i]; | |
388 | ||
389 | for (i = 0; i < 32; i++) | |
390 | regs->fr[i] = pim_narrow->fr[i]; | |
391 | ||
392 | for (i = 0; i < 8; i++) | |
393 | regs->sr[i] = pim_narrow->sr[i]; | |
394 | ||
395 | regs->iasq[0] = pim_narrow->cr[17]; | |
396 | regs->iasq[1] = pim_narrow->iasq_back; | |
397 | regs->iaoq[0] = pim_narrow->cr[18]; | |
398 | regs->iaoq[1] = pim_narrow->iaoq_back; | |
399 | ||
400 | regs->sar = pim_narrow->cr[11]; | |
401 | regs->iir = pim_narrow->cr[19]; | |
402 | regs->isr = pim_narrow->cr[20]; | |
403 | regs->ior = pim_narrow->cr[21]; | |
404 | } | |
405 | ||
406 | /* | |
407 | * The following fields only have meaning if we came through | |
408 | * another path. So just zero them here. | |
409 | */ | |
410 | ||
411 | regs->ksp = 0; | |
412 | regs->kpc = 0; | |
413 | regs->orig_r28 = 0; | |
414 | } | |
415 | ||
416 | ||
417 | /* | |
418 | * This routine is called as a last resort when everything else | |
419 | * has gone clearly wrong. We get called for faults in kernel space, | |
420 | * and HPMC's. | |
421 | */ | |
422 | void parisc_terminate(char *msg, struct pt_regs *regs, int code, unsigned long offset) | |
423 | { | |
424 | static DEFINE_SPINLOCK(terminate_lock); | |
425 | ||
426 | oops_in_progress = 1; | |
427 | ||
428 | set_eiem(0); | |
429 | local_irq_disable(); | |
430 | spin_lock(&terminate_lock); | |
431 | ||
432 | /* unlock the pdc lock if necessary */ | |
433 | pdc_emergency_unlock(); | |
434 | ||
435 | /* restart pdc console if necessary */ | |
436 | if (!console_drivers) | |
437 | pdc_console_restart(); | |
438 | ||
439 | /* Not all paths will gutter the processor... */ | |
440 | switch(code){ | |
441 | ||
442 | case 1: | |
443 | transfer_pim_to_trap_frame(regs); | |
444 | break; | |
445 | ||
446 | default: | |
447 | /* Fall through */ | |
448 | break; | |
449 | ||
450 | } | |
451 | ||
452 | { | |
453 | /* show_stack(NULL, (unsigned long *)regs->gr[30]); */ | |
454 | struct unwind_frame_info info; | |
455 | unwind_frame_init(&info, current, regs); | |
456 | do_show_stack(&info); | |
457 | } | |
458 | ||
459 | printk("\n"); | |
460 | printk(KERN_CRIT "%s: Code=%d regs=%p (Addr=" RFMT ")\n", | |
461 | msg, code, regs, offset); | |
462 | show_regs(regs); | |
463 | ||
464 | spin_unlock(&terminate_lock); | |
465 | ||
466 | /* put soft power button back under hardware control; | |
467 | * if the user had pressed it once at any time, the | |
468 | * system will shut down immediately right here. */ | |
469 | pdc_soft_power_button(0); | |
470 | ||
471 | /* Call kernel panic() so reboot timeouts work properly | |
472 | * FIXME: This function should be on the list of | |
473 | * panic notifiers, and we should call panic | |
474 | * directly from the location that we wish. | |
475 | * e.g. We should not call panic from | |
476 | * parisc_terminate, but rather the oter way around. | |
477 | * This hack works, prints the panic message twice, | |
478 | * and it enables reboot timers! | |
479 | */ | |
480 | panic(msg); | |
481 | } | |
482 | ||
483 | void handle_interruption(int code, struct pt_regs *regs) | |
484 | { | |
485 | unsigned long fault_address = 0; | |
486 | unsigned long fault_space = 0; | |
487 | struct siginfo si; | |
488 | ||
489 | if (code == 1) | |
490 | pdc_console_restart(); /* switch back to pdc if HPMC */ | |
491 | else | |
492 | local_irq_enable(); | |
493 | ||
494 | /* Security check: | |
495 | * If the priority level is still user, and the | |
496 | * faulting space is not equal to the active space | |
497 | * then the user is attempting something in a space | |
498 | * that does not belong to them. Kill the process. | |
499 | * | |
500 | * This is normally the situation when the user | |
501 | * attempts to jump into the kernel space at the | |
502 | * wrong offset, be it at the gateway page or a | |
503 | * random location. | |
504 | * | |
505 | * We cannot normally signal the process because it | |
506 | * could *be* on the gateway page, and processes | |
507 | * executing on the gateway page can't have signals | |
508 | * delivered. | |
509 | * | |
510 | * We merely readjust the address into the users | |
511 | * space, at a destination address of zero, and | |
512 | * allow processing to continue. | |
513 | */ | |
514 | if (((unsigned long)regs->iaoq[0] & 3) && | |
515 | ((unsigned long)regs->iasq[0] != (unsigned long)regs->sr[7])) { | |
516 | /* Kill the user process later */ | |
517 | regs->iaoq[0] = 0 | 3; | |
518 | regs->iaoq[1] = regs->iaoq[0] + 4; | |
519 | regs->iasq[0] = regs->iasq[0] = regs->sr[7]; | |
520 | regs->gr[0] &= ~PSW_B; | |
521 | return; | |
522 | } | |
523 | ||
524 | #if 0 | |
525 | printk(KERN_CRIT "Interruption # %d\n", code); | |
526 | #endif | |
527 | ||
528 | switch(code) { | |
529 | ||
530 | case 1: | |
531 | /* High-priority machine check (HPMC) */ | |
532 | ||
533 | /* set up a new led state on systems shipped with a LED State panel */ | |
534 | pdc_chassis_send_status(PDC_CHASSIS_DIRECT_HPMC); | |
535 | ||
536 | parisc_terminate("High Priority Machine Check (HPMC)", | |
537 | regs, code, 0); | |
538 | /* NOT REACHED */ | |
539 | ||
540 | case 2: | |
541 | /* Power failure interrupt */ | |
542 | printk(KERN_CRIT "Power failure interrupt !\n"); | |
543 | return; | |
544 | ||
545 | case 3: | |
546 | /* Recovery counter trap */ | |
547 | regs->gr[0] &= ~PSW_R; | |
548 | if (user_space(regs)) | |
549 | handle_gdb_break(regs, TRAP_TRACE); | |
550 | /* else this must be the start of a syscall - just let it run */ | |
551 | return; | |
552 | ||
553 | case 5: | |
554 | /* Low-priority machine check */ | |
555 | pdc_chassis_send_status(PDC_CHASSIS_DIRECT_LPMC); | |
556 | ||
557 | flush_all_caches(); | |
558 | cpu_lpmc(5, regs); | |
559 | return; | |
560 | ||
561 | case 6: | |
562 | /* Instruction TLB miss fault/Instruction page fault */ | |
563 | fault_address = regs->iaoq[0]; | |
564 | fault_space = regs->iasq[0]; | |
565 | break; | |
566 | ||
567 | case 8: | |
568 | /* Illegal instruction trap */ | |
569 | die_if_kernel("Illegal instruction", regs, code); | |
570 | si.si_code = ILL_ILLOPC; | |
571 | goto give_sigill; | |
572 | ||
573 | case 9: | |
574 | /* Break instruction trap */ | |
575 | handle_break(regs->iir,regs); | |
576 | return; | |
577 | ||
578 | case 10: | |
579 | /* Privileged operation trap */ | |
580 | die_if_kernel("Privileged operation", regs, code); | |
581 | si.si_code = ILL_PRVOPC; | |
582 | goto give_sigill; | |
583 | ||
584 | case 11: | |
585 | /* Privileged register trap */ | |
586 | if ((regs->iir & 0xffdfffe0) == 0x034008a0) { | |
587 | ||
588 | /* This is a MFCTL cr26/cr27 to gr instruction. | |
589 | * PCXS traps on this, so we need to emulate it. | |
590 | */ | |
591 | ||
592 | if (regs->iir & 0x00200000) | |
593 | regs->gr[regs->iir & 0x1f] = mfctl(27); | |
594 | else | |
595 | regs->gr[regs->iir & 0x1f] = mfctl(26); | |
596 | ||
597 | regs->iaoq[0] = regs->iaoq[1]; | |
598 | regs->iaoq[1] += 4; | |
599 | regs->iasq[0] = regs->iasq[1]; | |
600 | return; | |
601 | } | |
602 | ||
603 | die_if_kernel("Privileged register usage", regs, code); | |
604 | si.si_code = ILL_PRVREG; | |
605 | give_sigill: | |
606 | si.si_signo = SIGILL; | |
607 | si.si_errno = 0; | |
608 | si.si_addr = (void __user *) regs->iaoq[0]; | |
609 | force_sig_info(SIGILL, &si, current); | |
610 | return; | |
611 | ||
612 | case 12: | |
613 | /* Overflow Trap, let the userland signal handler do the cleanup */ | |
614 | si.si_signo = SIGFPE; | |
615 | si.si_code = FPE_INTOVF; | |
616 | si.si_addr = (void __user *) regs->iaoq[0]; | |
617 | force_sig_info(SIGFPE, &si, current); | |
618 | return; | |
619 | ||
620 | case 13: | |
621 | /* Conditional Trap | |
622 | The condition succees in an instruction which traps | |
623 | on condition */ | |
624 | if(user_mode(regs)){ | |
625 | si.si_signo = SIGFPE; | |
626 | /* Set to zero, and let the userspace app figure it out from | |
627 | the insn pointed to by si_addr */ | |
628 | si.si_code = 0; | |
629 | si.si_addr = (void __user *) regs->iaoq[0]; | |
630 | force_sig_info(SIGFPE, &si, current); | |
631 | return; | |
632 | } | |
633 | /* The kernel doesn't want to handle condition codes */ | |
634 | break; | |
635 | ||
636 | case 14: | |
637 | /* Assist Exception Trap, i.e. floating point exception. */ | |
638 | die_if_kernel("Floating point exception", regs, 0); /* quiet */ | |
639 | handle_fpe(regs); | |
640 | return; | |
641 | ||
642 | case 15: | |
643 | /* Data TLB miss fault/Data page fault */ | |
644 | /* Fall through */ | |
645 | case 16: | |
646 | /* Non-access instruction TLB miss fault */ | |
647 | /* The instruction TLB entry needed for the target address of the FIC | |
648 | is absent, and hardware can't find it, so we get to cleanup */ | |
649 | /* Fall through */ | |
650 | case 17: | |
651 | /* Non-access data TLB miss fault/Non-access data page fault */ | |
652 | /* FIXME: | |
653 | Still need to add slow path emulation code here! | |
654 | If the insn used a non-shadow register, then the tlb | |
655 | handlers could not have their side-effect (e.g. probe | |
656 | writing to a target register) emulated since rfir would | |
657 | erase the changes to said register. Instead we have to | |
658 | setup everything, call this function we are in, and emulate | |
659 | by hand. Technically we need to emulate: | |
660 | fdc,fdce,pdc,"fic,4f",prober,probeir,probew, probeiw | |
661 | */ | |
662 | fault_address = regs->ior; | |
663 | fault_space = regs->isr; | |
664 | break; | |
665 | ||
666 | case 18: | |
667 | /* PCXS only -- later cpu's split this into types 26,27 & 28 */ | |
668 | /* Check for unaligned access */ | |
669 | if (check_unaligned(regs)) { | |
670 | handle_unaligned(regs); | |
671 | return; | |
672 | } | |
673 | /* Fall Through */ | |
674 | case 26: | |
675 | /* PCXL: Data memory access rights trap */ | |
676 | fault_address = regs->ior; | |
677 | fault_space = regs->isr; | |
678 | break; | |
679 | ||
680 | case 19: | |
681 | /* Data memory break trap */ | |
682 | regs->gr[0] |= PSW_X; /* So we can single-step over the trap */ | |
683 | /* fall thru */ | |
684 | case 21: | |
685 | /* Page reference trap */ | |
686 | handle_gdb_break(regs, TRAP_HWBKPT); | |
687 | return; | |
688 | ||
689 | case 25: | |
690 | /* Taken branch trap */ | |
691 | regs->gr[0] &= ~PSW_T; | |
692 | if (user_space(regs)) | |
693 | handle_gdb_break(regs, TRAP_BRANCH); | |
694 | /* else this must be the start of a syscall - just let it | |
695 | * run. | |
696 | */ | |
697 | return; | |
698 | ||
699 | case 7: | |
700 | /* Instruction access rights */ | |
701 | /* PCXL: Instruction memory protection trap */ | |
702 | ||
703 | /* | |
704 | * This could be caused by either: 1) a process attempting | |
705 | * to execute within a vma that does not have execute | |
706 | * permission, or 2) an access rights violation caused by a | |
707 | * flush only translation set up by ptep_get_and_clear(). | |
708 | * So we check the vma permissions to differentiate the two. | |
709 | * If the vma indicates we have execute permission, then | |
710 | * the cause is the latter one. In this case, we need to | |
711 | * call do_page_fault() to fix the problem. | |
712 | */ | |
713 | ||
714 | if (user_mode(regs)) { | |
715 | struct vm_area_struct *vma; | |
716 | ||
717 | down_read(¤t->mm->mmap_sem); | |
718 | vma = find_vma(current->mm,regs->iaoq[0]); | |
719 | if (vma && (regs->iaoq[0] >= vma->vm_start) | |
720 | && (vma->vm_flags & VM_EXEC)) { | |
721 | ||
722 | fault_address = regs->iaoq[0]; | |
723 | fault_space = regs->iasq[0]; | |
724 | ||
725 | up_read(¤t->mm->mmap_sem); | |
726 | break; /* call do_page_fault() */ | |
727 | } | |
728 | up_read(¤t->mm->mmap_sem); | |
729 | } | |
730 | /* Fall Through */ | |
731 | case 27: | |
732 | /* Data memory protection ID trap */ | |
733 | die_if_kernel("Protection id trap", regs, code); | |
734 | si.si_code = SEGV_MAPERR; | |
735 | si.si_signo = SIGSEGV; | |
736 | si.si_errno = 0; | |
737 | if (code == 7) | |
738 | si.si_addr = (void __user *) regs->iaoq[0]; | |
739 | else | |
740 | si.si_addr = (void __user *) regs->ior; | |
741 | force_sig_info(SIGSEGV, &si, current); | |
742 | return; | |
743 | ||
744 | case 28: | |
745 | /* Unaligned data reference trap */ | |
746 | handle_unaligned(regs); | |
747 | return; | |
748 | ||
749 | default: | |
750 | if (user_mode(regs)) { | |
751 | #ifdef PRINT_USER_FAULTS | |
752 | printk(KERN_DEBUG "\nhandle_interruption() pid=%d command='%s'\n", | |
753 | current->pid, current->comm); | |
754 | show_regs(regs); | |
755 | #endif | |
756 | /* SIGBUS, for lack of a better one. */ | |
757 | si.si_signo = SIGBUS; | |
758 | si.si_code = BUS_OBJERR; | |
759 | si.si_errno = 0; | |
760 | si.si_addr = (void __user *) regs->ior; | |
761 | force_sig_info(SIGBUS, &si, current); | |
762 | return; | |
763 | } | |
764 | pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC); | |
765 | ||
766 | parisc_terminate("Unexpected interruption", regs, code, 0); | |
767 | /* NOT REACHED */ | |
768 | } | |
769 | ||
770 | if (user_mode(regs)) { | |
771 | if ((fault_space >> SPACEID_SHIFT) != (regs->sr[7] >> SPACEID_SHIFT)) { | |
772 | #ifdef PRINT_USER_FAULTS | |
773 | if (fault_space == 0) | |
774 | printk(KERN_DEBUG "User Fault on Kernel Space "); | |
775 | else | |
776 | printk(KERN_DEBUG "User Fault (long pointer) (fault %d) ", | |
777 | code); | |
778 | printk("pid=%d command='%s'\n", current->pid, current->comm); | |
779 | show_regs(regs); | |
780 | #endif | |
781 | si.si_signo = SIGSEGV; | |
782 | si.si_errno = 0; | |
783 | si.si_code = SEGV_MAPERR; | |
784 | si.si_addr = (void __user *) regs->ior; | |
785 | force_sig_info(SIGSEGV, &si, current); | |
786 | return; | |
787 | } | |
788 | } | |
789 | else { | |
790 | ||
791 | /* | |
792 | * The kernel should never fault on its own address space. | |
793 | */ | |
794 | ||
795 | if (fault_space == 0) | |
796 | { | |
797 | pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC); | |
798 | parisc_terminate("Kernel Fault", regs, code, fault_address); | |
799 | ||
800 | } | |
801 | } | |
802 | ||
803 | do_page_fault(regs, code, fault_address); | |
804 | } | |
805 | ||
806 | ||
807 | int __init check_ivt(void *iva) | |
808 | { | |
809 | int i; | |
810 | u32 check = 0; | |
811 | u32 *ivap; | |
812 | u32 *hpmcp; | |
813 | u32 length; | |
814 | extern void os_hpmc(void); | |
815 | extern void os_hpmc_end(void); | |
816 | ||
817 | if (strcmp((char *)iva, "cows can fly")) | |
818 | return -1; | |
819 | ||
820 | ivap = (u32 *)iva; | |
821 | ||
822 | for (i = 0; i < 8; i++) | |
823 | *ivap++ = 0; | |
824 | ||
825 | /* Compute Checksum for HPMC handler */ | |
826 | ||
827 | length = (u32)((unsigned long)os_hpmc_end - (unsigned long)os_hpmc); | |
828 | ivap[7] = length; | |
829 | ||
830 | hpmcp = (u32 *)os_hpmc; | |
831 | ||
832 | for (i=0; i<length/4; i++) | |
833 | check += *hpmcp++; | |
834 | ||
835 | for (i=0; i<8; i++) | |
836 | check += ivap[i]; | |
837 | ||
838 | ivap[5] = -check; | |
839 | ||
840 | return 0; | |
841 | } | |
842 | ||
843 | #ifndef __LP64__ | |
844 | extern const void fault_vector_11; | |
845 | #endif | |
846 | extern const void fault_vector_20; | |
847 | ||
848 | void __init trap_init(void) | |
849 | { | |
850 | void *iva; | |
851 | ||
852 | if (boot_cpu_data.cpu_type >= pcxu) | |
853 | iva = (void *) &fault_vector_20; | |
854 | else | |
855 | #ifdef __LP64__ | |
856 | panic("Can't boot 64-bit OS on PA1.1 processor!"); | |
857 | #else | |
858 | iva = (void *) &fault_vector_11; | |
859 | #endif | |
860 | ||
861 | if (check_ivt(iva)) | |
862 | panic("IVT invalid"); | |
863 | } |