Commit | Line | Data |
---|---|---|
2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 LT |
2 | /* |
3 | ** SMP Support | |
4 | ** | |
5 | ** Copyright (C) 1999 Walt Drummond <drummond@valinux.com> | |
6 | ** Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com> | |
7 | ** Copyright (C) 2001,2004 Grant Grundler <grundler@parisc-linux.org> | |
8 | ** | |
9 | ** Lots of stuff stolen from arch/alpha/kernel/smp.c | |
10 | ** ...and then parisc stole from arch/ia64/kernel/smp.c. Thanks David! :^) | |
11 | ** | |
7022672e | 12 | ** Thanks to John Curry and Ullas Ponnadi. I learned a lot from their work. |
1da177e4 LT |
13 | ** -grant (1/12/2001) |
14 | ** | |
1da177e4 | 15 | */ |
1da177e4 LT |
16 | #include <linux/types.h> |
17 | #include <linux/spinlock.h> | |
1da177e4 LT |
18 | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/module.h> | |
68e21be2 | 21 | #include <linux/sched/mm.h> |
1da177e4 LT |
22 | #include <linux/init.h> |
23 | #include <linux/interrupt.h> | |
24 | #include <linux/smp.h> | |
25 | #include <linux/kernel_stat.h> | |
26 | #include <linux/mm.h> | |
4e950f6f | 27 | #include <linux/err.h> |
1da177e4 LT |
28 | #include <linux/delay.h> |
29 | #include <linux/bitops.h> | |
d75f054a | 30 | #include <linux/ftrace.h> |
ec2e0f98 | 31 | #include <linux/cpu.h> |
66e29fcd | 32 | #include <linux/kgdb.h> |
88b3aac6 | 33 | #include <linux/sched/hotplug.h> |
1da177e4 | 34 | |
60063497 | 35 | #include <linux/atomic.h> |
1da177e4 LT |
36 | #include <asm/current.h> |
37 | #include <asm/delay.h> | |
1b2425e3 | 38 | #include <asm/tlbflush.h> |
1da177e4 LT |
39 | |
40 | #include <asm/io.h> | |
41 | #include <asm/irq.h> /* for CPU_IRQ_REGION and friends */ | |
42 | #include <asm/mmu_context.h> | |
43 | #include <asm/page.h> | |
1da177e4 LT |
44 | #include <asm/processor.h> |
45 | #include <asm/ptrace.h> | |
46 | #include <asm/unistd.h> | |
47 | #include <asm/cacheflush.h> | |
48 | ||
5492a0f0 KM |
49 | #undef DEBUG_SMP |
50 | #ifdef DEBUG_SMP | |
51 | static int smp_debug_lvl = 0; | |
52 | #define smp_debug(lvl, printargs...) \ | |
53 | if (lvl >= smp_debug_lvl) \ | |
54 | printk(printargs); | |
55 | #else | |
ef017beb | 56 | #define smp_debug(lvl, ...) do { } while(0) |
5492a0f0 | 57 | #endif /* DEBUG_SMP */ |
1da177e4 | 58 | |
1da177e4 LT |
59 | volatile struct task_struct *smp_init_current_idle_task; |
60 | ||
ef017beb | 61 | /* track which CPU is booting */ |
60ffef06 | 62 | static volatile int cpu_now_booting; |
1da177e4 | 63 | |
6ad6c424 | 64 | static DEFINE_PER_CPU(spinlock_t, ipi_lock); |
1da177e4 | 65 | |
1da177e4 LT |
66 | enum ipi_message_type { |
67 | IPI_NOP=0, | |
68 | IPI_RESCHEDULE=1, | |
69 | IPI_CALL_FUNC, | |
70 | IPI_CPU_START, | |
71 | IPI_CPU_STOP, | |
66e29fcd SS |
72 | IPI_CPU_TEST, |
73 | #ifdef CONFIG_KGDB | |
74 | IPI_ENTER_KGDB, | |
75 | #endif | |
1da177e4 LT |
76 | }; |
77 | ||
78 | ||
79 | /********** SMP inter processor interrupt and communication routines */ | |
80 | ||
81 | #undef PER_CPU_IRQ_REGION | |
82 | #ifdef PER_CPU_IRQ_REGION | |
83 | /* XXX REVISIT Ignore for now. | |
84 | ** *May* need this "hook" to register IPI handler | |
85 | ** once we have perCPU ExtIntr switch tables. | |
86 | */ | |
87 | static void | |
88 | ipi_init(int cpuid) | |
89 | { | |
1da177e4 LT |
90 | #error verify IRQ_OFFSET(IPI_IRQ) is ipi_interrupt() in new IRQ region |
91 | ||
92 | if(cpu_online(cpuid) ) | |
93 | { | |
94 | switch_to_idle_task(current); | |
95 | } | |
96 | ||
97 | return; | |
98 | } | |
99 | #endif | |
100 | ||
101 | ||
102 | /* | |
103 | ** Yoink this CPU from the runnable list... | |
104 | ** | |
105 | */ | |
106 | static void | |
107 | halt_processor(void) | |
108 | { | |
1da177e4 LT |
109 | /* REVISIT : redirect I/O Interrupts to another CPU? */ |
110 | /* REVISIT : does PM *know* this CPU isn't available? */ | |
9bc181d8 | 111 | set_cpu_online(smp_processor_id(), false); |
1da177e4 | 112 | local_irq_disable(); |
507efd63 | 113 | __pdc_cpu_rendezvous(); |
1da177e4 LT |
114 | for (;;) |
115 | ; | |
1da177e4 LT |
116 | } |
117 | ||
118 | ||
d75f054a | 119 | irqreturn_t __irq_entry |
c7753f18 | 120 | ipi_interrupt(int irq, void *dev_id) |
1da177e4 LT |
121 | { |
122 | int this_cpu = smp_processor_id(); | |
ef017beb | 123 | struct cpuinfo_parisc *p = &per_cpu(cpu_data, this_cpu); |
1da177e4 LT |
124 | unsigned long ops; |
125 | unsigned long flags; | |
126 | ||
1da177e4 | 127 | for (;;) { |
3c97b5e9 KM |
128 | spinlock_t *lock = &per_cpu(ipi_lock, this_cpu); |
129 | spin_lock_irqsave(lock, flags); | |
1da177e4 LT |
130 | ops = p->pending_ipi; |
131 | p->pending_ipi = 0; | |
3c97b5e9 | 132 | spin_unlock_irqrestore(lock, flags); |
1da177e4 LT |
133 | |
134 | mb(); /* Order bit clearing and data access. */ | |
135 | ||
136 | if (!ops) | |
137 | break; | |
138 | ||
139 | while (ops) { | |
140 | unsigned long which = ffz(~ops); | |
141 | ||
d911aed8 JB |
142 | ops &= ~(1 << which); |
143 | ||
1da177e4 | 144 | switch (which) { |
d911aed8 | 145 | case IPI_NOP: |
5492a0f0 | 146 | smp_debug(100, KERN_DEBUG "CPU%d IPI_NOP\n", this_cpu); |
d911aed8 JB |
147 | break; |
148 | ||
1da177e4 | 149 | case IPI_RESCHEDULE: |
5492a0f0 | 150 | smp_debug(100, KERN_DEBUG "CPU%d IPI_RESCHEDULE\n", this_cpu); |
cd85d551 | 151 | inc_irq_stat(irq_resched_count); |
184748cc | 152 | scheduler_ipi(); |
1da177e4 LT |
153 | break; |
154 | ||
155 | case IPI_CALL_FUNC: | |
5492a0f0 | 156 | smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC\n", this_cpu); |
b102f29b | 157 | inc_irq_stat(irq_call_count); |
dbcf4787 JA |
158 | generic_smp_call_function_interrupt(); |
159 | break; | |
160 | ||
1da177e4 | 161 | case IPI_CPU_START: |
5492a0f0 | 162 | smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_START\n", this_cpu); |
1da177e4 LT |
163 | break; |
164 | ||
165 | case IPI_CPU_STOP: | |
5492a0f0 | 166 | smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_STOP\n", this_cpu); |
1da177e4 | 167 | halt_processor(); |
1da177e4 LT |
168 | break; |
169 | ||
170 | case IPI_CPU_TEST: | |
5492a0f0 | 171 | smp_debug(100, KERN_DEBUG "CPU%d is alive!\n", this_cpu); |
1da177e4 | 172 | break; |
66e29fcd SS |
173 | #ifdef CONFIG_KGDB |
174 | case IPI_ENTER_KGDB: | |
175 | smp_debug(100, KERN_DEBUG "CPU%d ENTER_KGDB\n", this_cpu); | |
176 | kgdb_nmicallback(raw_smp_processor_id(), get_irq_regs()); | |
177 | break; | |
178 | #endif | |
1da177e4 LT |
179 | default: |
180 | printk(KERN_CRIT "Unknown IPI num on CPU%d: %lu\n", | |
181 | this_cpu, which); | |
1da177e4 LT |
182 | return IRQ_NONE; |
183 | } /* Switch */ | |
f4d0d40c HD |
184 | |
185 | /* before doing more, let in any pending interrupts */ | |
186 | if (ops) { | |
187 | local_irq_enable(); | |
188 | local_irq_disable(); | |
189 | } | |
1da177e4 LT |
190 | } /* while (ops) */ |
191 | } | |
192 | return IRQ_HANDLED; | |
193 | } | |
194 | ||
195 | ||
196 | static inline void | |
197 | ipi_send(int cpu, enum ipi_message_type op) | |
198 | { | |
ef017beb | 199 | struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpu); |
3c97b5e9 | 200 | spinlock_t *lock = &per_cpu(ipi_lock, cpu); |
1da177e4 LT |
201 | unsigned long flags; |
202 | ||
3c97b5e9 | 203 | spin_lock_irqsave(lock, flags); |
1da177e4 | 204 | p->pending_ipi |= 1 << op; |
ef017beb | 205 | gsc_writel(IPI_IRQ - CPU_IRQ_BASE, p->hpa); |
3c97b5e9 | 206 | spin_unlock_irqrestore(lock, flags); |
1da177e4 LT |
207 | } |
208 | ||
dbcf4787 | 209 | static void |
91887a36 | 210 | send_IPI_mask(const struct cpumask *mask, enum ipi_message_type op) |
dbcf4787 JA |
211 | { |
212 | int cpu; | |
213 | ||
91887a36 | 214 | for_each_cpu(cpu, mask) |
dbcf4787 JA |
215 | ipi_send(cpu, op); |
216 | } | |
1da177e4 LT |
217 | |
218 | static inline void | |
219 | send_IPI_single(int dest_cpu, enum ipi_message_type op) | |
220 | { | |
7f2347a4 | 221 | BUG_ON(dest_cpu == NO_PROC_ID); |
1da177e4 LT |
222 | |
223 | ipi_send(dest_cpu, op); | |
224 | } | |
225 | ||
226 | static inline void | |
227 | send_IPI_allbutself(enum ipi_message_type op) | |
228 | { | |
229 | int i; | |
1c2fb946 SS |
230 | |
231 | preempt_disable(); | |
394e3902 AM |
232 | for_each_online_cpu(i) { |
233 | if (i != smp_processor_id()) | |
1da177e4 LT |
234 | send_IPI_single(i, op); |
235 | } | |
1c2fb946 | 236 | preempt_enable(); |
1da177e4 LT |
237 | } |
238 | ||
66e29fcd SS |
239 | #ifdef CONFIG_KGDB |
240 | void kgdb_roundup_cpus(void) | |
241 | { | |
242 | send_IPI_allbutself(IPI_ENTER_KGDB); | |
243 | } | |
244 | #endif | |
1da177e4 LT |
245 | |
246 | inline void | |
247 | smp_send_stop(void) { send_IPI_allbutself(IPI_CPU_STOP); } | |
248 | ||
4c8c3c7f VS |
249 | void |
250 | arch_smp_send_reschedule(int cpu) { send_IPI_single(cpu, IPI_RESCHEDULE); } | |
1da177e4 | 251 | |
d911aed8 JB |
252 | void |
253 | smp_send_all_nop(void) | |
254 | { | |
255 | send_IPI_allbutself(IPI_NOP); | |
256 | } | |
257 | ||
91887a36 | 258 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
1da177e4 | 259 | { |
dbcf4787 | 260 | send_IPI_mask(mask, IPI_CALL_FUNC); |
1da177e4 LT |
261 | } |
262 | ||
dbcf4787 JA |
263 | void arch_send_call_function_single_ipi(int cpu) |
264 | { | |
528d8eb2 | 265 | send_IPI_single(cpu, IPI_CALL_FUNC); |
dbcf4787 | 266 | } |
1da177e4 | 267 | |
1da177e4 LT |
268 | /* |
269 | * Called by secondaries to update state and initialize CPU registers. | |
270 | */ | |
88b3aac6 | 271 | static void |
1da177e4 LT |
272 | smp_cpu_init(int cpunum) |
273 | { | |
1da177e4 | 274 | /* Set modes and Enable floating point coprocessor */ |
a7e6601f | 275 | init_per_cpu(cpunum); |
1da177e4 LT |
276 | |
277 | disable_sr_hashing(); | |
278 | ||
279 | mb(); | |
280 | ||
281 | /* Well, support 2.4 linux scheme as well. */ | |
7ec6118c | 282 | if (cpu_online(cpunum)) { |
1da177e4 LT |
283 | extern void machine_halt(void); /* arch/parisc.../process.c */ |
284 | ||
285 | printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum); | |
286 | machine_halt(); | |
ec2e0f98 SB |
287 | } |
288 | ||
289 | notify_cpu_starting(cpunum); | |
290 | ||
9bc181d8 | 291 | set_cpu_online(cpunum, true); |
1da177e4 LT |
292 | |
293 | /* Initialise the idle task for this CPU */ | |
f1f10076 | 294 | mmgrab(&init_mm); |
1da177e4 | 295 | current->active_mm = &init_mm; |
7f2347a4 | 296 | BUG_ON(current->mm); |
1da177e4 LT |
297 | enter_lazy_tlb(&init_mm, current); |
298 | ||
7022672e | 299 | init_IRQ(); /* make sure no IRQs are enabled or pending */ |
56f335c8 | 300 | start_cpu_itimer(); |
1da177e4 LT |
301 | } |
302 | ||
303 | ||
304 | /* | |
305 | * Slaves start using C here. Indirectly called from smp_slave_stext. | |
306 | * Do what start_kernel() and main() do for boot strap processor (aka monarch) | |
307 | */ | |
88b3aac6 | 308 | void smp_callin(unsigned long pdce_proc) |
1da177e4 LT |
309 | { |
310 | int slave_id = cpu_now_booting; | |
1da177e4 | 311 | |
0ed1fe4a HD |
312 | #ifdef CONFIG_64BIT |
313 | WARN_ON(((unsigned long)(PAGE0->mem_pdc_hi) << 32 | |
314 | | PAGE0->mem_pdc) != pdce_proc); | |
315 | #endif | |
316 | ||
1da177e4 LT |
317 | smp_cpu_init(slave_id); |
318 | ||
1da177e4 | 319 | flush_cache_all_local(); /* start with known state */ |
1b2425e3 | 320 | flush_tlb_all_local(NULL); |
1da177e4 LT |
321 | |
322 | local_irq_enable(); /* Interrupts have been off until now */ | |
323 | ||
fc6d73d6 | 324 | cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); |
1da177e4 LT |
325 | |
326 | /* NOTREACHED */ | |
327 | panic("smp_callin() AAAAaaaaahhhh....\n"); | |
328 | } | |
329 | ||
330 | /* | |
331 | * Bring one cpu online. | |
332 | */ | |
88b3aac6 | 333 | static int smp_boot_one_cpu(int cpuid, struct task_struct *idle) |
1da177e4 | 334 | { |
ef017beb | 335 | const struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpuid); |
1da177e4 LT |
336 | long timeout; |
337 | ||
88b3aac6 HD |
338 | #ifdef CONFIG_HOTPLUG_CPU |
339 | int i; | |
340 | ||
341 | /* reset irq statistics for this CPU */ | |
342 | memset(&per_cpu(irq_stat, cpuid), 0, sizeof(irq_cpustat_t)); | |
343 | for (i = 0; i < NR_IRQS; i++) { | |
344 | struct irq_desc *desc = irq_to_desc(i); | |
345 | ||
346 | if (desc && desc->kstat_irqs) | |
86d2a2f5 | 347 | *per_cpu_ptr(desc->kstat_irqs, cpuid) = (struct irqstat) { }; |
88b3aac6 HD |
348 | } |
349 | #endif | |
350 | ||
351 | /* wait until last booting CPU has started. */ | |
352 | while (cpu_now_booting) | |
353 | ; | |
354 | ||
1da177e4 LT |
355 | /* Let _start know what logical CPU we're booting |
356 | ** (offset into init_tasks[],cpu_data[]) | |
357 | */ | |
358 | cpu_now_booting = cpuid; | |
359 | ||
360 | /* | |
361 | ** boot strap code needs to know the task address since | |
362 | ** it also contains the process stack. | |
363 | */ | |
364 | smp_init_current_idle_task = idle ; | |
365 | mb(); | |
366 | ||
ef017beb | 367 | printk(KERN_INFO "Releasing cpu %d now, hpa=%lx\n", cpuid, p->hpa); |
1da177e4 LT |
368 | |
369 | /* | |
370 | ** This gets PDC to release the CPU from a very tight loop. | |
371 | ** | |
372 | ** From the PA-RISC 2.0 Firmware Architecture Reference Specification: | |
373 | ** "The MEM_RENDEZ vector specifies the location of OS_RENDEZ which | |
374 | ** is executed after receiving the rendezvous signal (an interrupt to | |
375 | ** EIR{0}). MEM_RENDEZ is valid only when it is nonzero and the | |
376 | ** contents of memory are valid." | |
377 | */ | |
ef017beb | 378 | gsc_writel(TIMER_IRQ - CPU_IRQ_BASE, p->hpa); |
1da177e4 LT |
379 | mb(); |
380 | ||
381 | /* | |
382 | * OK, wait a bit for that CPU to finish staggering about. | |
383 | * Slave will set a bit when it reaches smp_cpu_init(). | |
384 | * Once the "monarch CPU" sees the bit change, it can move on. | |
385 | */ | |
386 | for (timeout = 0; timeout < 10000; timeout++) { | |
387 | if(cpu_online(cpuid)) { | |
388 | /* Which implies Slave has started up */ | |
389 | cpu_now_booting = 0; | |
1da177e4 LT |
390 | goto alive ; |
391 | } | |
392 | udelay(100); | |
393 | barrier(); | |
394 | } | |
1da177e4 LT |
395 | printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid); |
396 | return -1; | |
397 | ||
398 | alive: | |
399 | /* Remember the Slave data */ | |
5492a0f0 | 400 | smp_debug(100, KERN_DEBUG "SMP: CPU:%d came alive after %ld _us\n", |
1da177e4 | 401 | cpuid, timeout * 100); |
1da177e4 LT |
402 | return 0; |
403 | } | |
404 | ||
ef017beb | 405 | void __init smp_prepare_boot_cpu(void) |
1da177e4 | 406 | { |
1c7431b3 | 407 | pr_info("SMP: bootstrap CPU ID is 0\n"); |
1da177e4 LT |
408 | } |
409 | ||
410 | ||
411 | ||
412 | /* | |
413 | ** inventory.c:do_inventory() hasn't yet been run and thus we | |
7022672e | 414 | ** don't 'discover' the additional CPUs until later. |
1da177e4 LT |
415 | */ |
416 | void __init smp_prepare_cpus(unsigned int max_cpus) | |
417 | { | |
6ad6c424 TG |
418 | int cpu; |
419 | ||
420 | for_each_possible_cpu(cpu) | |
421 | spin_lock_init(&per_cpu(ipi_lock, cpu)); | |
422 | ||
9bc181d8 | 423 | init_cpu_present(cpumask_of(0)); |
1da177e4 LT |
424 | } |
425 | ||
426 | ||
88b3aac6 | 427 | void __init smp_cpus_done(unsigned int cpu_max) |
1da177e4 | 428 | { |
1da177e4 LT |
429 | } |
430 | ||
431 | ||
60ffef06 | 432 | int __cpu_up(unsigned int cpu, struct task_struct *tidle) |
1da177e4 | 433 | { |
88b3aac6 HD |
434 | if (cpu_online(cpu)) |
435 | return 0; | |
436 | ||
d3b3c637 HD |
437 | if (num_online_cpus() < nr_cpu_ids && |
438 | num_online_cpus() < setup_max_cpus && | |
439 | smp_boot_one_cpu(cpu, tidle)) | |
88b3aac6 HD |
440 | return -EIO; |
441 | ||
442 | return cpu_online(cpu) ? 0 : -EIO; | |
443 | } | |
444 | ||
445 | /* | |
446 | * __cpu_disable runs on the processor to be shutdown. | |
447 | */ | |
448 | int __cpu_disable(void) | |
449 | { | |
450 | #ifdef CONFIG_HOTPLUG_CPU | |
451 | unsigned int cpu = smp_processor_id(); | |
452 | ||
453 | remove_cpu_topology(cpu); | |
454 | ||
455 | /* | |
456 | * Take this CPU offline. Once we clear this, we can't return, | |
457 | * and we must not schedule until we're ready to give up the cpu. | |
458 | */ | |
459 | set_cpu_online(cpu, false); | |
460 | ||
1afde47d HD |
461 | /* Find a new timesync master */ |
462 | if (cpu == time_keeper_id) { | |
463 | time_keeper_id = cpumask_first(cpu_online_mask); | |
464 | pr_info("CPU %d is now promoted to time-keeper master\n", time_keeper_id); | |
465 | } | |
466 | ||
88b3aac6 HD |
467 | disable_percpu_irq(IPI_IRQ); |
468 | ||
469 | irq_migrate_all_off_this_cpu(); | |
470 | ||
471 | flush_cache_all_local(); | |
472 | flush_tlb_all_local(NULL); | |
473 | ||
474 | /* disable all irqs, including timer irq */ | |
475 | local_irq_disable(); | |
476 | ||
477 | /* wait for next timer irq ... */ | |
478 | mdelay(1000/HZ+100); | |
479 | ||
480 | /* ... and then clear all pending external irqs */ | |
481 | set_eiem(0); | |
482 | mtctl(~0UL, CR_EIRR); | |
483 | mfctl(CR_EIRR); | |
484 | mtctl(0, CR_EIRR); | |
485 | #endif | |
486 | return 0; | |
487 | } | |
488 | ||
489 | /* | |
490 | * called on the thread which is asking for a CPU to be shutdown - | |
491 | * waits until shutdown has completed, or it is timed out. | |
492 | */ | |
493 | void __cpu_die(unsigned int cpu) | |
494 | { | |
495 | pdc_cpu_rendezvous_lock(); | |
51e0efe1 | 496 | } |
88b3aac6 | 497 | |
51e0efe1 TG |
498 | void arch_cpuhp_cleanup_dead_cpu(unsigned int cpu) |
499 | { | |
88b3aac6 HD |
500 | pr_info("CPU%u: is shutting down\n", cpu); |
501 | ||
502 | /* set task's state to interruptible sleep */ | |
503 | set_current_state(TASK_INTERRUPTIBLE); | |
504 | schedule_timeout((IS_ENABLED(CONFIG_64BIT) ? 8:2) * HZ); | |
1da177e4 | 505 | |
88b3aac6 | 506 | pdc_cpu_rendezvous_unlock(); |
1da177e4 | 507 | } |