Commit | Line | Data |
---|---|---|
2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 LT |
2 | /* |
3 | ** SMP Support | |
4 | ** | |
5 | ** Copyright (C) 1999 Walt Drummond <drummond@valinux.com> | |
6 | ** Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com> | |
7 | ** Copyright (C) 2001,2004 Grant Grundler <grundler@parisc-linux.org> | |
8 | ** | |
9 | ** Lots of stuff stolen from arch/alpha/kernel/smp.c | |
10 | ** ...and then parisc stole from arch/ia64/kernel/smp.c. Thanks David! :^) | |
11 | ** | |
7022672e | 12 | ** Thanks to John Curry and Ullas Ponnadi. I learned a lot from their work. |
1da177e4 LT |
13 | ** -grant (1/12/2001) |
14 | ** | |
1da177e4 | 15 | */ |
1da177e4 LT |
16 | #include <linux/types.h> |
17 | #include <linux/spinlock.h> | |
1da177e4 LT |
18 | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/module.h> | |
68e21be2 | 21 | #include <linux/sched/mm.h> |
1da177e4 LT |
22 | #include <linux/init.h> |
23 | #include <linux/interrupt.h> | |
24 | #include <linux/smp.h> | |
25 | #include <linux/kernel_stat.h> | |
26 | #include <linux/mm.h> | |
4e950f6f | 27 | #include <linux/err.h> |
1da177e4 LT |
28 | #include <linux/delay.h> |
29 | #include <linux/bitops.h> | |
d75f054a | 30 | #include <linux/ftrace.h> |
ec2e0f98 | 31 | #include <linux/cpu.h> |
1da177e4 | 32 | |
60063497 | 33 | #include <linux/atomic.h> |
1da177e4 LT |
34 | #include <asm/current.h> |
35 | #include <asm/delay.h> | |
1b2425e3 | 36 | #include <asm/tlbflush.h> |
1da177e4 LT |
37 | |
38 | #include <asm/io.h> | |
39 | #include <asm/irq.h> /* for CPU_IRQ_REGION and friends */ | |
40 | #include <asm/mmu_context.h> | |
41 | #include <asm/page.h> | |
42 | #include <asm/pgtable.h> | |
43 | #include <asm/pgalloc.h> | |
44 | #include <asm/processor.h> | |
45 | #include <asm/ptrace.h> | |
46 | #include <asm/unistd.h> | |
47 | #include <asm/cacheflush.h> | |
48 | ||
5492a0f0 KM |
49 | #undef DEBUG_SMP |
50 | #ifdef DEBUG_SMP | |
51 | static int smp_debug_lvl = 0; | |
52 | #define smp_debug(lvl, printargs...) \ | |
53 | if (lvl >= smp_debug_lvl) \ | |
54 | printk(printargs); | |
55 | #else | |
ef017beb | 56 | #define smp_debug(lvl, ...) do { } while(0) |
5492a0f0 | 57 | #endif /* DEBUG_SMP */ |
1da177e4 | 58 | |
1da177e4 LT |
59 | volatile struct task_struct *smp_init_current_idle_task; |
60 | ||
ef017beb | 61 | /* track which CPU is booting */ |
60ffef06 | 62 | static volatile int cpu_now_booting; |
1da177e4 | 63 | |
60ffef06 | 64 | static int parisc_max_cpus = 1; |
1da177e4 | 65 | |
6ad6c424 | 66 | static DEFINE_PER_CPU(spinlock_t, ipi_lock); |
1da177e4 | 67 | |
1da177e4 LT |
68 | enum ipi_message_type { |
69 | IPI_NOP=0, | |
70 | IPI_RESCHEDULE=1, | |
71 | IPI_CALL_FUNC, | |
72 | IPI_CPU_START, | |
73 | IPI_CPU_STOP, | |
74 | IPI_CPU_TEST | |
75 | }; | |
76 | ||
77 | ||
78 | /********** SMP inter processor interrupt and communication routines */ | |
79 | ||
80 | #undef PER_CPU_IRQ_REGION | |
81 | #ifdef PER_CPU_IRQ_REGION | |
82 | /* XXX REVISIT Ignore for now. | |
83 | ** *May* need this "hook" to register IPI handler | |
84 | ** once we have perCPU ExtIntr switch tables. | |
85 | */ | |
86 | static void | |
87 | ipi_init(int cpuid) | |
88 | { | |
1da177e4 LT |
89 | #error verify IRQ_OFFSET(IPI_IRQ) is ipi_interrupt() in new IRQ region |
90 | ||
91 | if(cpu_online(cpuid) ) | |
92 | { | |
93 | switch_to_idle_task(current); | |
94 | } | |
95 | ||
96 | return; | |
97 | } | |
98 | #endif | |
99 | ||
100 | ||
101 | /* | |
102 | ** Yoink this CPU from the runnable list... | |
103 | ** | |
104 | */ | |
105 | static void | |
106 | halt_processor(void) | |
107 | { | |
1da177e4 LT |
108 | /* REVISIT : redirect I/O Interrupts to another CPU? */ |
109 | /* REVISIT : does PM *know* this CPU isn't available? */ | |
9bc181d8 | 110 | set_cpu_online(smp_processor_id(), false); |
1da177e4 LT |
111 | local_irq_disable(); |
112 | for (;;) | |
113 | ; | |
1da177e4 LT |
114 | } |
115 | ||
116 | ||
d75f054a | 117 | irqreturn_t __irq_entry |
c7753f18 | 118 | ipi_interrupt(int irq, void *dev_id) |
1da177e4 LT |
119 | { |
120 | int this_cpu = smp_processor_id(); | |
ef017beb | 121 | struct cpuinfo_parisc *p = &per_cpu(cpu_data, this_cpu); |
1da177e4 LT |
122 | unsigned long ops; |
123 | unsigned long flags; | |
124 | ||
1da177e4 | 125 | for (;;) { |
3c97b5e9 KM |
126 | spinlock_t *lock = &per_cpu(ipi_lock, this_cpu); |
127 | spin_lock_irqsave(lock, flags); | |
1da177e4 LT |
128 | ops = p->pending_ipi; |
129 | p->pending_ipi = 0; | |
3c97b5e9 | 130 | spin_unlock_irqrestore(lock, flags); |
1da177e4 LT |
131 | |
132 | mb(); /* Order bit clearing and data access. */ | |
133 | ||
134 | if (!ops) | |
135 | break; | |
136 | ||
137 | while (ops) { | |
138 | unsigned long which = ffz(~ops); | |
139 | ||
d911aed8 JB |
140 | ops &= ~(1 << which); |
141 | ||
1da177e4 | 142 | switch (which) { |
d911aed8 | 143 | case IPI_NOP: |
5492a0f0 | 144 | smp_debug(100, KERN_DEBUG "CPU%d IPI_NOP\n", this_cpu); |
d911aed8 JB |
145 | break; |
146 | ||
1da177e4 | 147 | case IPI_RESCHEDULE: |
5492a0f0 | 148 | smp_debug(100, KERN_DEBUG "CPU%d IPI_RESCHEDULE\n", this_cpu); |
cd85d551 | 149 | inc_irq_stat(irq_resched_count); |
184748cc | 150 | scheduler_ipi(); |
1da177e4 LT |
151 | break; |
152 | ||
153 | case IPI_CALL_FUNC: | |
5492a0f0 | 154 | smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC\n", this_cpu); |
b102f29b | 155 | inc_irq_stat(irq_call_count); |
dbcf4787 JA |
156 | generic_smp_call_function_interrupt(); |
157 | break; | |
158 | ||
1da177e4 | 159 | case IPI_CPU_START: |
5492a0f0 | 160 | smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_START\n", this_cpu); |
1da177e4 LT |
161 | break; |
162 | ||
163 | case IPI_CPU_STOP: | |
5492a0f0 | 164 | smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_STOP\n", this_cpu); |
1da177e4 | 165 | halt_processor(); |
1da177e4 LT |
166 | break; |
167 | ||
168 | case IPI_CPU_TEST: | |
5492a0f0 | 169 | smp_debug(100, KERN_DEBUG "CPU%d is alive!\n", this_cpu); |
1da177e4 LT |
170 | break; |
171 | ||
172 | default: | |
173 | printk(KERN_CRIT "Unknown IPI num on CPU%d: %lu\n", | |
174 | this_cpu, which); | |
1da177e4 LT |
175 | return IRQ_NONE; |
176 | } /* Switch */ | |
7085689e JB |
177 | /* let in any pending interrupts */ |
178 | local_irq_enable(); | |
179 | local_irq_disable(); | |
1da177e4 LT |
180 | } /* while (ops) */ |
181 | } | |
182 | return IRQ_HANDLED; | |
183 | } | |
184 | ||
185 | ||
186 | static inline void | |
187 | ipi_send(int cpu, enum ipi_message_type op) | |
188 | { | |
ef017beb | 189 | struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpu); |
3c97b5e9 | 190 | spinlock_t *lock = &per_cpu(ipi_lock, cpu); |
1da177e4 LT |
191 | unsigned long flags; |
192 | ||
3c97b5e9 | 193 | spin_lock_irqsave(lock, flags); |
1da177e4 | 194 | p->pending_ipi |= 1 << op; |
ef017beb | 195 | gsc_writel(IPI_IRQ - CPU_IRQ_BASE, p->hpa); |
3c97b5e9 | 196 | spin_unlock_irqrestore(lock, flags); |
1da177e4 LT |
197 | } |
198 | ||
dbcf4787 | 199 | static void |
91887a36 | 200 | send_IPI_mask(const struct cpumask *mask, enum ipi_message_type op) |
dbcf4787 JA |
201 | { |
202 | int cpu; | |
203 | ||
91887a36 | 204 | for_each_cpu(cpu, mask) |
dbcf4787 JA |
205 | ipi_send(cpu, op); |
206 | } | |
1da177e4 LT |
207 | |
208 | static inline void | |
209 | send_IPI_single(int dest_cpu, enum ipi_message_type op) | |
210 | { | |
7f2347a4 | 211 | BUG_ON(dest_cpu == NO_PROC_ID); |
1da177e4 LT |
212 | |
213 | ipi_send(dest_cpu, op); | |
214 | } | |
215 | ||
216 | static inline void | |
217 | send_IPI_allbutself(enum ipi_message_type op) | |
218 | { | |
219 | int i; | |
220 | ||
394e3902 AM |
221 | for_each_online_cpu(i) { |
222 | if (i != smp_processor_id()) | |
1da177e4 LT |
223 | send_IPI_single(i, op); |
224 | } | |
225 | } | |
226 | ||
227 | ||
228 | inline void | |
229 | smp_send_stop(void) { send_IPI_allbutself(IPI_CPU_STOP); } | |
230 | ||
1da177e4 LT |
231 | void |
232 | smp_send_reschedule(int cpu) { send_IPI_single(cpu, IPI_RESCHEDULE); } | |
233 | ||
d911aed8 JB |
234 | void |
235 | smp_send_all_nop(void) | |
236 | { | |
237 | send_IPI_allbutself(IPI_NOP); | |
238 | } | |
239 | ||
91887a36 | 240 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
1da177e4 | 241 | { |
dbcf4787 | 242 | send_IPI_mask(mask, IPI_CALL_FUNC); |
1da177e4 LT |
243 | } |
244 | ||
dbcf4787 JA |
245 | void arch_send_call_function_single_ipi(int cpu) |
246 | { | |
528d8eb2 | 247 | send_IPI_single(cpu, IPI_CALL_FUNC); |
dbcf4787 | 248 | } |
1da177e4 | 249 | |
1da177e4 LT |
250 | /* |
251 | * Called by secondaries to update state and initialize CPU registers. | |
252 | */ | |
253 | static void __init | |
254 | smp_cpu_init(int cpunum) | |
255 | { | |
1da177e4 | 256 | extern void init_IRQ(void); /* arch/parisc/kernel/irq.c */ |
56f335c8 | 257 | extern void start_cpu_itimer(void); /* arch/parisc/kernel/time.c */ |
1da177e4 LT |
258 | |
259 | /* Set modes and Enable floating point coprocessor */ | |
a7e6601f | 260 | init_per_cpu(cpunum); |
1da177e4 LT |
261 | |
262 | disable_sr_hashing(); | |
263 | ||
264 | mb(); | |
265 | ||
266 | /* Well, support 2.4 linux scheme as well. */ | |
7ec6118c | 267 | if (cpu_online(cpunum)) { |
1da177e4 LT |
268 | extern void machine_halt(void); /* arch/parisc.../process.c */ |
269 | ||
270 | printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum); | |
271 | machine_halt(); | |
ec2e0f98 SB |
272 | } |
273 | ||
274 | notify_cpu_starting(cpunum); | |
275 | ||
9bc181d8 | 276 | set_cpu_online(cpunum, true); |
1da177e4 LT |
277 | |
278 | /* Initialise the idle task for this CPU */ | |
f1f10076 | 279 | mmgrab(&init_mm); |
1da177e4 | 280 | current->active_mm = &init_mm; |
7f2347a4 | 281 | BUG_ON(current->mm); |
1da177e4 LT |
282 | enter_lazy_tlb(&init_mm, current); |
283 | ||
7022672e | 284 | init_IRQ(); /* make sure no IRQs are enabled or pending */ |
56f335c8 | 285 | start_cpu_itimer(); |
1da177e4 LT |
286 | } |
287 | ||
288 | ||
289 | /* | |
290 | * Slaves start using C here. Indirectly called from smp_slave_stext. | |
291 | * Do what start_kernel() and main() do for boot strap processor (aka monarch) | |
292 | */ | |
0ed1fe4a | 293 | void __init smp_callin(unsigned long pdce_proc) |
1da177e4 LT |
294 | { |
295 | int slave_id = cpu_now_booting; | |
1da177e4 | 296 | |
0ed1fe4a HD |
297 | #ifdef CONFIG_64BIT |
298 | WARN_ON(((unsigned long)(PAGE0->mem_pdc_hi) << 32 | |
299 | | PAGE0->mem_pdc) != pdce_proc); | |
300 | #endif | |
301 | ||
1da177e4 | 302 | smp_cpu_init(slave_id); |
5bfb5d69 | 303 | preempt_disable(); |
1da177e4 | 304 | |
1da177e4 | 305 | flush_cache_all_local(); /* start with known state */ |
1b2425e3 | 306 | flush_tlb_all_local(NULL); |
1da177e4 LT |
307 | |
308 | local_irq_enable(); /* Interrupts have been off until now */ | |
309 | ||
fc6d73d6 | 310 | cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); |
1da177e4 LT |
311 | |
312 | /* NOTREACHED */ | |
313 | panic("smp_callin() AAAAaaaaahhhh....\n"); | |
314 | } | |
315 | ||
316 | /* | |
317 | * Bring one cpu online. | |
318 | */ | |
60ffef06 | 319 | int smp_boot_one_cpu(int cpuid, struct task_struct *idle) |
1da177e4 | 320 | { |
ef017beb | 321 | const struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpuid); |
1da177e4 LT |
322 | long timeout; |
323 | ||
40f1f0de | 324 | task_thread_info(idle)->cpu = cpuid; |
1da177e4 LT |
325 | |
326 | /* Let _start know what logical CPU we're booting | |
327 | ** (offset into init_tasks[],cpu_data[]) | |
328 | */ | |
329 | cpu_now_booting = cpuid; | |
330 | ||
331 | /* | |
332 | ** boot strap code needs to know the task address since | |
333 | ** it also contains the process stack. | |
334 | */ | |
335 | smp_init_current_idle_task = idle ; | |
336 | mb(); | |
337 | ||
ef017beb | 338 | printk(KERN_INFO "Releasing cpu %d now, hpa=%lx\n", cpuid, p->hpa); |
1da177e4 LT |
339 | |
340 | /* | |
341 | ** This gets PDC to release the CPU from a very tight loop. | |
342 | ** | |
343 | ** From the PA-RISC 2.0 Firmware Architecture Reference Specification: | |
344 | ** "The MEM_RENDEZ vector specifies the location of OS_RENDEZ which | |
345 | ** is executed after receiving the rendezvous signal (an interrupt to | |
346 | ** EIR{0}). MEM_RENDEZ is valid only when it is nonzero and the | |
347 | ** contents of memory are valid." | |
348 | */ | |
ef017beb | 349 | gsc_writel(TIMER_IRQ - CPU_IRQ_BASE, p->hpa); |
1da177e4 LT |
350 | mb(); |
351 | ||
352 | /* | |
353 | * OK, wait a bit for that CPU to finish staggering about. | |
354 | * Slave will set a bit when it reaches smp_cpu_init(). | |
355 | * Once the "monarch CPU" sees the bit change, it can move on. | |
356 | */ | |
357 | for (timeout = 0; timeout < 10000; timeout++) { | |
358 | if(cpu_online(cpuid)) { | |
359 | /* Which implies Slave has started up */ | |
360 | cpu_now_booting = 0; | |
361 | smp_init_current_idle_task = NULL; | |
362 | goto alive ; | |
363 | } | |
364 | udelay(100); | |
365 | barrier(); | |
366 | } | |
1da177e4 LT |
367 | printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid); |
368 | return -1; | |
369 | ||
370 | alive: | |
371 | /* Remember the Slave data */ | |
5492a0f0 | 372 | smp_debug(100, KERN_DEBUG "SMP: CPU:%d came alive after %ld _us\n", |
1da177e4 | 373 | cpuid, timeout * 100); |
1da177e4 LT |
374 | return 0; |
375 | } | |
376 | ||
ef017beb | 377 | void __init smp_prepare_boot_cpu(void) |
1da177e4 | 378 | { |
ef017beb | 379 | int bootstrap_processor = per_cpu(cpu_data, 0).cpuid; |
1da177e4 | 380 | |
1da177e4 | 381 | /* Setup BSP mappings */ |
ef017beb | 382 | printk(KERN_INFO "SMP: bootstrap CPU ID is %d\n", bootstrap_processor); |
1da177e4 | 383 | |
9bc181d8 RR |
384 | set_cpu_online(bootstrap_processor, true); |
385 | set_cpu_present(bootstrap_processor, true); | |
1da177e4 LT |
386 | } |
387 | ||
388 | ||
389 | ||
390 | /* | |
391 | ** inventory.c:do_inventory() hasn't yet been run and thus we | |
7022672e | 392 | ** don't 'discover' the additional CPUs until later. |
1da177e4 LT |
393 | */ |
394 | void __init smp_prepare_cpus(unsigned int max_cpus) | |
395 | { | |
6ad6c424 TG |
396 | int cpu; |
397 | ||
398 | for_each_possible_cpu(cpu) | |
399 | spin_lock_init(&per_cpu(ipi_lock, cpu)); | |
400 | ||
9bc181d8 | 401 | init_cpu_present(cpumask_of(0)); |
1da177e4 LT |
402 | |
403 | parisc_max_cpus = max_cpus; | |
404 | if (!max_cpus) | |
405 | printk(KERN_INFO "SMP mode deactivated.\n"); | |
406 | } | |
407 | ||
408 | ||
409 | void smp_cpus_done(unsigned int cpu_max) | |
410 | { | |
411 | return; | |
412 | } | |
413 | ||
414 | ||
60ffef06 | 415 | int __cpu_up(unsigned int cpu, struct task_struct *tidle) |
1da177e4 | 416 | { |
5baf919d HD |
417 | if (cpu != 0 && cpu < parisc_max_cpus && smp_boot_one_cpu(cpu, tidle)) |
418 | return -ENOSYS; | |
1da177e4 LT |
419 | |
420 | return cpu_online(cpu) ? 0 : -ENOSYS; | |
421 | } | |
422 | ||
1da177e4 | 423 | #ifdef CONFIG_PROC_FS |
01f56832 | 424 | int setup_profiling_timer(unsigned int multiplier) |
1da177e4 LT |
425 | { |
426 | return -EINVAL; | |
427 | } | |
428 | #endif |