Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | ** SMP Support | |
3 | ** | |
4 | ** Copyright (C) 1999 Walt Drummond <drummond@valinux.com> | |
5 | ** Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com> | |
6 | ** Copyright (C) 2001,2004 Grant Grundler <grundler@parisc-linux.org> | |
7 | ** | |
8 | ** Lots of stuff stolen from arch/alpha/kernel/smp.c | |
9 | ** ...and then parisc stole from arch/ia64/kernel/smp.c. Thanks David! :^) | |
10 | ** | |
7022672e | 11 | ** Thanks to John Curry and Ullas Ponnadi. I learned a lot from their work. |
1da177e4 LT |
12 | ** -grant (1/12/2001) |
13 | ** | |
14 | ** This program is free software; you can redistribute it and/or modify | |
15 | ** it under the terms of the GNU General Public License as published by | |
16 | ** the Free Software Foundation; either version 2 of the License, or | |
17 | ** (at your option) any later version. | |
18 | */ | |
1da177e4 LT |
19 | #include <linux/types.h> |
20 | #include <linux/spinlock.h> | |
21 | #include <linux/slab.h> | |
22 | ||
23 | #include <linux/kernel.h> | |
24 | #include <linux/module.h> | |
25 | #include <linux/sched.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/smp.h> | |
29 | #include <linux/kernel_stat.h> | |
30 | #include <linux/mm.h> | |
4e950f6f | 31 | #include <linux/err.h> |
1da177e4 LT |
32 | #include <linux/delay.h> |
33 | #include <linux/bitops.h> | |
d75f054a | 34 | #include <linux/ftrace.h> |
1da177e4 LT |
35 | |
36 | #include <asm/system.h> | |
37 | #include <asm/atomic.h> | |
38 | #include <asm/current.h> | |
39 | #include <asm/delay.h> | |
1b2425e3 | 40 | #include <asm/tlbflush.h> |
1da177e4 LT |
41 | |
42 | #include <asm/io.h> | |
43 | #include <asm/irq.h> /* for CPU_IRQ_REGION and friends */ | |
44 | #include <asm/mmu_context.h> | |
45 | #include <asm/page.h> | |
46 | #include <asm/pgtable.h> | |
47 | #include <asm/pgalloc.h> | |
48 | #include <asm/processor.h> | |
49 | #include <asm/ptrace.h> | |
50 | #include <asm/unistd.h> | |
51 | #include <asm/cacheflush.h> | |
52 | ||
5492a0f0 KM |
53 | #undef DEBUG_SMP |
54 | #ifdef DEBUG_SMP | |
55 | static int smp_debug_lvl = 0; | |
56 | #define smp_debug(lvl, printargs...) \ | |
57 | if (lvl >= smp_debug_lvl) \ | |
58 | printk(printargs); | |
59 | #else | |
ef017beb | 60 | #define smp_debug(lvl, ...) do { } while(0) |
5492a0f0 | 61 | #endif /* DEBUG_SMP */ |
1da177e4 | 62 | |
1da177e4 LT |
63 | volatile struct task_struct *smp_init_current_idle_task; |
64 | ||
ef017beb HD |
65 | /* track which CPU is booting */ |
66 | static volatile int cpu_now_booting __cpuinitdata; | |
1da177e4 | 67 | |
ef017beb | 68 | static int parisc_max_cpus __cpuinitdata = 1; |
1da177e4 | 69 | |
6ad6c424 | 70 | static DEFINE_PER_CPU(spinlock_t, ipi_lock); |
1da177e4 | 71 | |
1da177e4 LT |
72 | enum ipi_message_type { |
73 | IPI_NOP=0, | |
74 | IPI_RESCHEDULE=1, | |
75 | IPI_CALL_FUNC, | |
dbcf4787 | 76 | IPI_CALL_FUNC_SINGLE, |
1da177e4 LT |
77 | IPI_CPU_START, |
78 | IPI_CPU_STOP, | |
79 | IPI_CPU_TEST | |
80 | }; | |
81 | ||
82 | ||
83 | /********** SMP inter processor interrupt and communication routines */ | |
84 | ||
85 | #undef PER_CPU_IRQ_REGION | |
86 | #ifdef PER_CPU_IRQ_REGION | |
87 | /* XXX REVISIT Ignore for now. | |
88 | ** *May* need this "hook" to register IPI handler | |
89 | ** once we have perCPU ExtIntr switch tables. | |
90 | */ | |
91 | static void | |
92 | ipi_init(int cpuid) | |
93 | { | |
1da177e4 LT |
94 | #error verify IRQ_OFFSET(IPI_IRQ) is ipi_interrupt() in new IRQ region |
95 | ||
96 | if(cpu_online(cpuid) ) | |
97 | { | |
98 | switch_to_idle_task(current); | |
99 | } | |
100 | ||
101 | return; | |
102 | } | |
103 | #endif | |
104 | ||
105 | ||
106 | /* | |
107 | ** Yoink this CPU from the runnable list... | |
108 | ** | |
109 | */ | |
110 | static void | |
111 | halt_processor(void) | |
112 | { | |
1da177e4 LT |
113 | /* REVISIT : redirect I/O Interrupts to another CPU? */ |
114 | /* REVISIT : does PM *know* this CPU isn't available? */ | |
9bc181d8 | 115 | set_cpu_online(smp_processor_id(), false); |
1da177e4 LT |
116 | local_irq_disable(); |
117 | for (;;) | |
118 | ; | |
1da177e4 LT |
119 | } |
120 | ||
121 | ||
d75f054a | 122 | irqreturn_t __irq_entry |
c7753f18 | 123 | ipi_interrupt(int irq, void *dev_id) |
1da177e4 LT |
124 | { |
125 | int this_cpu = smp_processor_id(); | |
ef017beb | 126 | struct cpuinfo_parisc *p = &per_cpu(cpu_data, this_cpu); |
1da177e4 LT |
127 | unsigned long ops; |
128 | unsigned long flags; | |
129 | ||
130 | /* Count this now; we may make a call that never returns. */ | |
131 | p->ipi_count++; | |
132 | ||
133 | mb(); /* Order interrupt and bit testing. */ | |
134 | ||
135 | for (;;) { | |
3c97b5e9 KM |
136 | spinlock_t *lock = &per_cpu(ipi_lock, this_cpu); |
137 | spin_lock_irqsave(lock, flags); | |
1da177e4 LT |
138 | ops = p->pending_ipi; |
139 | p->pending_ipi = 0; | |
3c97b5e9 | 140 | spin_unlock_irqrestore(lock, flags); |
1da177e4 LT |
141 | |
142 | mb(); /* Order bit clearing and data access. */ | |
143 | ||
144 | if (!ops) | |
145 | break; | |
146 | ||
147 | while (ops) { | |
148 | unsigned long which = ffz(~ops); | |
149 | ||
d911aed8 JB |
150 | ops &= ~(1 << which); |
151 | ||
1da177e4 | 152 | switch (which) { |
d911aed8 | 153 | case IPI_NOP: |
5492a0f0 | 154 | smp_debug(100, KERN_DEBUG "CPU%d IPI_NOP\n", this_cpu); |
d911aed8 JB |
155 | break; |
156 | ||
1da177e4 | 157 | case IPI_RESCHEDULE: |
5492a0f0 | 158 | smp_debug(100, KERN_DEBUG "CPU%d IPI_RESCHEDULE\n", this_cpu); |
1da177e4 LT |
159 | /* |
160 | * Reschedule callback. Everything to be | |
161 | * done is done by the interrupt return path. | |
162 | */ | |
163 | break; | |
164 | ||
165 | case IPI_CALL_FUNC: | |
5492a0f0 | 166 | smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC\n", this_cpu); |
dbcf4787 JA |
167 | generic_smp_call_function_interrupt(); |
168 | break; | |
169 | ||
170 | case IPI_CALL_FUNC_SINGLE: | |
171 | smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC_SINGLE\n", this_cpu); | |
172 | generic_smp_call_function_single_interrupt(); | |
1da177e4 LT |
173 | break; |
174 | ||
175 | case IPI_CPU_START: | |
5492a0f0 | 176 | smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_START\n", this_cpu); |
1da177e4 LT |
177 | break; |
178 | ||
179 | case IPI_CPU_STOP: | |
5492a0f0 | 180 | smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_STOP\n", this_cpu); |
1da177e4 | 181 | halt_processor(); |
1da177e4 LT |
182 | break; |
183 | ||
184 | case IPI_CPU_TEST: | |
5492a0f0 | 185 | smp_debug(100, KERN_DEBUG "CPU%d is alive!\n", this_cpu); |
1da177e4 LT |
186 | break; |
187 | ||
188 | default: | |
189 | printk(KERN_CRIT "Unknown IPI num on CPU%d: %lu\n", | |
190 | this_cpu, which); | |
1da177e4 LT |
191 | return IRQ_NONE; |
192 | } /* Switch */ | |
7085689e JB |
193 | /* let in any pending interrupts */ |
194 | local_irq_enable(); | |
195 | local_irq_disable(); | |
1da177e4 LT |
196 | } /* while (ops) */ |
197 | } | |
198 | return IRQ_HANDLED; | |
199 | } | |
200 | ||
201 | ||
202 | static inline void | |
203 | ipi_send(int cpu, enum ipi_message_type op) | |
204 | { | |
ef017beb | 205 | struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpu); |
3c97b5e9 | 206 | spinlock_t *lock = &per_cpu(ipi_lock, cpu); |
1da177e4 LT |
207 | unsigned long flags; |
208 | ||
3c97b5e9 | 209 | spin_lock_irqsave(lock, flags); |
1da177e4 | 210 | p->pending_ipi |= 1 << op; |
ef017beb | 211 | gsc_writel(IPI_IRQ - CPU_IRQ_BASE, p->hpa); |
3c97b5e9 | 212 | spin_unlock_irqrestore(lock, flags); |
1da177e4 LT |
213 | } |
214 | ||
dbcf4787 | 215 | static void |
91887a36 | 216 | send_IPI_mask(const struct cpumask *mask, enum ipi_message_type op) |
dbcf4787 JA |
217 | { |
218 | int cpu; | |
219 | ||
91887a36 | 220 | for_each_cpu(cpu, mask) |
dbcf4787 JA |
221 | ipi_send(cpu, op); |
222 | } | |
1da177e4 LT |
223 | |
224 | static inline void | |
225 | send_IPI_single(int dest_cpu, enum ipi_message_type op) | |
226 | { | |
7f2347a4 | 227 | BUG_ON(dest_cpu == NO_PROC_ID); |
1da177e4 LT |
228 | |
229 | ipi_send(dest_cpu, op); | |
230 | } | |
231 | ||
232 | static inline void | |
233 | send_IPI_allbutself(enum ipi_message_type op) | |
234 | { | |
235 | int i; | |
236 | ||
394e3902 AM |
237 | for_each_online_cpu(i) { |
238 | if (i != smp_processor_id()) | |
1da177e4 LT |
239 | send_IPI_single(i, op); |
240 | } | |
241 | } | |
242 | ||
243 | ||
244 | inline void | |
245 | smp_send_stop(void) { send_IPI_allbutself(IPI_CPU_STOP); } | |
246 | ||
247 | static inline void | |
248 | smp_send_start(void) { send_IPI_allbutself(IPI_CPU_START); } | |
249 | ||
250 | void | |
251 | smp_send_reschedule(int cpu) { send_IPI_single(cpu, IPI_RESCHEDULE); } | |
252 | ||
d911aed8 JB |
253 | void |
254 | smp_send_all_nop(void) | |
255 | { | |
256 | send_IPI_allbutself(IPI_NOP); | |
257 | } | |
258 | ||
91887a36 | 259 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
1da177e4 | 260 | { |
dbcf4787 | 261 | send_IPI_mask(mask, IPI_CALL_FUNC); |
1da177e4 LT |
262 | } |
263 | ||
dbcf4787 JA |
264 | void arch_send_call_function_single_ipi(int cpu) |
265 | { | |
266 | send_IPI_single(cpu, IPI_CALL_FUNC_SINGLE); | |
267 | } | |
1da177e4 LT |
268 | |
269 | /* | |
270 | * Flush all other CPU's tlb and then mine. Do this with on_each_cpu() | |
271 | * as we want to ensure all TLB's flushed before proceeding. | |
272 | */ | |
273 | ||
1da177e4 LT |
274 | void |
275 | smp_flush_tlb_all(void) | |
276 | { | |
15c8b6c1 | 277 | on_each_cpu(flush_tlb_all_local, NULL, 1); |
1da177e4 LT |
278 | } |
279 | ||
1da177e4 LT |
280 | /* |
281 | * Called by secondaries to update state and initialize CPU registers. | |
282 | */ | |
283 | static void __init | |
284 | smp_cpu_init(int cpunum) | |
285 | { | |
56f335c8 | 286 | extern int init_per_cpu(int); /* arch/parisc/kernel/processor.c */ |
1da177e4 | 287 | extern void init_IRQ(void); /* arch/parisc/kernel/irq.c */ |
56f335c8 | 288 | extern void start_cpu_itimer(void); /* arch/parisc/kernel/time.c */ |
1da177e4 LT |
289 | |
290 | /* Set modes and Enable floating point coprocessor */ | |
291 | (void) init_per_cpu(cpunum); | |
292 | ||
293 | disable_sr_hashing(); | |
294 | ||
295 | mb(); | |
296 | ||
297 | /* Well, support 2.4 linux scheme as well. */ | |
9bc181d8 | 298 | if (cpu_isset(cpunum, cpu_online_map)) |
1da177e4 LT |
299 | { |
300 | extern void machine_halt(void); /* arch/parisc.../process.c */ | |
301 | ||
302 | printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum); | |
303 | machine_halt(); | |
304 | } | |
9bc181d8 | 305 | set_cpu_online(cpunum, true); |
1da177e4 LT |
306 | |
307 | /* Initialise the idle task for this CPU */ | |
308 | atomic_inc(&init_mm.mm_count); | |
309 | current->active_mm = &init_mm; | |
7f2347a4 | 310 | BUG_ON(current->mm); |
1da177e4 LT |
311 | enter_lazy_tlb(&init_mm, current); |
312 | ||
7022672e | 313 | init_IRQ(); /* make sure no IRQs are enabled or pending */ |
56f335c8 | 314 | start_cpu_itimer(); |
1da177e4 LT |
315 | } |
316 | ||
317 | ||
318 | /* | |
319 | * Slaves start using C here. Indirectly called from smp_slave_stext. | |
320 | * Do what start_kernel() and main() do for boot strap processor (aka monarch) | |
321 | */ | |
322 | void __init smp_callin(void) | |
323 | { | |
324 | int slave_id = cpu_now_booting; | |
1da177e4 LT |
325 | |
326 | smp_cpu_init(slave_id); | |
5bfb5d69 | 327 | preempt_disable(); |
1da177e4 | 328 | |
1da177e4 | 329 | flush_cache_all_local(); /* start with known state */ |
1b2425e3 | 330 | flush_tlb_all_local(NULL); |
1da177e4 LT |
331 | |
332 | local_irq_enable(); /* Interrupts have been off until now */ | |
333 | ||
334 | cpu_idle(); /* Wait for timer to schedule some work */ | |
335 | ||
336 | /* NOTREACHED */ | |
337 | panic("smp_callin() AAAAaaaaahhhh....\n"); | |
338 | } | |
339 | ||
340 | /* | |
341 | * Bring one cpu online. | |
342 | */ | |
8dff980f | 343 | int __cpuinit smp_boot_one_cpu(int cpuid) |
1da177e4 | 344 | { |
ef017beb | 345 | const struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpuid); |
1da177e4 LT |
346 | struct task_struct *idle; |
347 | long timeout; | |
348 | ||
349 | /* | |
350 | * Create an idle task for this CPU. Note the address wed* give | |
351 | * to kernel_thread is irrelevant -- it's going to start | |
352 | * where OS_BOOT_RENDEVZ vector in SAL says to start. But | |
353 | * this gets all the other task-y sort of data structures set | |
354 | * up like we wish. We need to pull the just created idle task | |
355 | * off the run queue and stuff it into the init_tasks[] array. | |
356 | * Sheesh . . . | |
357 | */ | |
358 | ||
359 | idle = fork_idle(cpuid); | |
360 | if (IS_ERR(idle)) | |
361 | panic("SMP: fork failed for CPU:%d", cpuid); | |
362 | ||
40f1f0de | 363 | task_thread_info(idle)->cpu = cpuid; |
1da177e4 LT |
364 | |
365 | /* Let _start know what logical CPU we're booting | |
366 | ** (offset into init_tasks[],cpu_data[]) | |
367 | */ | |
368 | cpu_now_booting = cpuid; | |
369 | ||
370 | /* | |
371 | ** boot strap code needs to know the task address since | |
372 | ** it also contains the process stack. | |
373 | */ | |
374 | smp_init_current_idle_task = idle ; | |
375 | mb(); | |
376 | ||
ef017beb | 377 | printk(KERN_INFO "Releasing cpu %d now, hpa=%lx\n", cpuid, p->hpa); |
1da177e4 LT |
378 | |
379 | /* | |
380 | ** This gets PDC to release the CPU from a very tight loop. | |
381 | ** | |
382 | ** From the PA-RISC 2.0 Firmware Architecture Reference Specification: | |
383 | ** "The MEM_RENDEZ vector specifies the location of OS_RENDEZ which | |
384 | ** is executed after receiving the rendezvous signal (an interrupt to | |
385 | ** EIR{0}). MEM_RENDEZ is valid only when it is nonzero and the | |
386 | ** contents of memory are valid." | |
387 | */ | |
ef017beb | 388 | gsc_writel(TIMER_IRQ - CPU_IRQ_BASE, p->hpa); |
1da177e4 LT |
389 | mb(); |
390 | ||
391 | /* | |
392 | * OK, wait a bit for that CPU to finish staggering about. | |
393 | * Slave will set a bit when it reaches smp_cpu_init(). | |
394 | * Once the "monarch CPU" sees the bit change, it can move on. | |
395 | */ | |
396 | for (timeout = 0; timeout < 10000; timeout++) { | |
397 | if(cpu_online(cpuid)) { | |
398 | /* Which implies Slave has started up */ | |
399 | cpu_now_booting = 0; | |
400 | smp_init_current_idle_task = NULL; | |
401 | goto alive ; | |
402 | } | |
403 | udelay(100); | |
404 | barrier(); | |
405 | } | |
406 | ||
407 | put_task_struct(idle); | |
408 | idle = NULL; | |
409 | ||
410 | printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid); | |
411 | return -1; | |
412 | ||
413 | alive: | |
414 | /* Remember the Slave data */ | |
5492a0f0 | 415 | smp_debug(100, KERN_DEBUG "SMP: CPU:%d came alive after %ld _us\n", |
1da177e4 | 416 | cpuid, timeout * 100); |
1da177e4 LT |
417 | return 0; |
418 | } | |
419 | ||
ef017beb | 420 | void __init smp_prepare_boot_cpu(void) |
1da177e4 | 421 | { |
ef017beb | 422 | int bootstrap_processor = per_cpu(cpu_data, 0).cpuid; |
1da177e4 | 423 | |
1da177e4 | 424 | /* Setup BSP mappings */ |
ef017beb | 425 | printk(KERN_INFO "SMP: bootstrap CPU ID is %d\n", bootstrap_processor); |
1da177e4 | 426 | |
9bc181d8 RR |
427 | set_cpu_online(bootstrap_processor, true); |
428 | set_cpu_present(bootstrap_processor, true); | |
1da177e4 LT |
429 | } |
430 | ||
431 | ||
432 | ||
433 | /* | |
434 | ** inventory.c:do_inventory() hasn't yet been run and thus we | |
7022672e | 435 | ** don't 'discover' the additional CPUs until later. |
1da177e4 LT |
436 | */ |
437 | void __init smp_prepare_cpus(unsigned int max_cpus) | |
438 | { | |
6ad6c424 TG |
439 | int cpu; |
440 | ||
441 | for_each_possible_cpu(cpu) | |
442 | spin_lock_init(&per_cpu(ipi_lock, cpu)); | |
443 | ||
9bc181d8 | 444 | init_cpu_present(cpumask_of(0)); |
1da177e4 LT |
445 | |
446 | parisc_max_cpus = max_cpus; | |
447 | if (!max_cpus) | |
448 | printk(KERN_INFO "SMP mode deactivated.\n"); | |
449 | } | |
450 | ||
451 | ||
452 | void smp_cpus_done(unsigned int cpu_max) | |
453 | { | |
454 | return; | |
455 | } | |
456 | ||
457 | ||
b282b6f8 | 458 | int __cpuinit __cpu_up(unsigned int cpu) |
1da177e4 LT |
459 | { |
460 | if (cpu != 0 && cpu < parisc_max_cpus) | |
461 | smp_boot_one_cpu(cpu); | |
462 | ||
463 | return cpu_online(cpu) ? 0 : -ENOSYS; | |
464 | } | |
465 | ||
1da177e4 LT |
466 | #ifdef CONFIG_PROC_FS |
467 | int __init | |
468 | setup_profiling_timer(unsigned int multiplier) | |
469 | { | |
470 | return -EINVAL; | |
471 | } | |
472 | #endif |