parisc: ccio-dma: fix build failure without procfs
[linux-2.6-block.git] / arch / parisc / kernel / processor.c
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1da177e4
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1/* $Id: processor.c,v 1.1 2002/07/20 16:27:06 rhirst Exp $
2 *
3 * Initial setup-routines for HP 9000 based hardware.
4 *
5 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
ef017beb 6 * Modifications for PA-RISC (C) 1999-2008 Helge Deller <deller@gmx.de>
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7 * Modifications copyright 1999 SuSE GmbH (Philipp Rumpf)
8 * Modifications copyright 2000 Martin K. Petersen <mkp@mkp.net>
9 * Modifications copyright 2000 Philipp Rumpf <prumpf@tux.org>
10 * Modifications copyright 2001 Ryan Bradetich <rbradetich@uswest.net>
11 *
12 * Initial PA-RISC Version: 04-23-1999 by Helge Deller
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2, or (at your option)
17 * any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 *
28 */
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29#include <linux/delay.h>
30#include <linux/init.h>
31#include <linux/mm.h>
32#include <linux/module.h>
33#include <linux/seq_file.h>
34#include <linux/slab.h>
35#include <linux/cpu.h>
e8edc6e0 36#include <asm/param.h>
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37#include <asm/cache.h>
38#include <asm/hardware.h> /* for register_parisc_driver() stuff */
39#include <asm/processor.h>
40#include <asm/page.h>
41#include <asm/pdc.h>
42#include <asm/pdcpat.h>
43#include <asm/irq.h> /* for struct irq_region */
44#include <asm/parisc-device.h>
45
8039de10 46struct system_cpuinfo_parisc boot_cpu_data __read_mostly;
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47EXPORT_SYMBOL(boot_cpu_data);
48
ef017beb 49DEFINE_PER_CPU(struct cpuinfo_parisc, cpu_data);
1da177e4 50
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51extern int update_cr16_clocksource(void); /* from time.c */
52
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53/*
54** PARISC CPU driver - claim "device" and initialize CPU data structures.
55**
56** Consolidate per CPU initialization into (mostly) one module.
57** Monarch CPU will initialize boot_cpu_data which shouldn't
58** change once the system has booted.
59**
60** The callback *should* do per-instance initialization of
61** everything including the monarch. "Per CPU" init code in
62** setup.c:start_parisc() has migrated here and start_parisc()
63** will call register_parisc_driver(&cpu_driver) before calling do_inventory().
64**
65** The goal of consolidating CPU initialization into one place is
7022672e 66** to make sure all CPUs get initialized the same way.
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67** The code path not shared is how PDC hands control of the CPU to the OS.
68** The initialization of OS data structures is the same (done below).
69*/
70
ef017beb
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71/**
72 * init_cpu_profiler - enable/setup per cpu profiling hooks.
73 * @cpunum: The processor instance.
74 *
75 * FIXME: doesn't do much yet...
76 */
77static void __cpuinit
78init_percpu_prof(unsigned long cpunum)
79{
80 struct cpuinfo_parisc *p;
81
82 p = &per_cpu(cpu_data, cpunum);
83 p->prof_counter = 1;
84 p->prof_multiplier = 1;
85}
86
87
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88/**
89 * processor_probe - Determine if processor driver should claim this device.
90 * @dev: The device which has been found.
91 *
92 * Determine if processor driver should claim this chip (return 0) or not
93 * (return 1). If so, initialize the chip and tell other partners in crime
94 * they have work to do.
95 */
e9541d0c 96static int __cpuinit processor_probe(struct parisc_device *dev)
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97{
98 unsigned long txn_addr;
99 unsigned long cpuid;
100 struct cpuinfo_parisc *p;
101
f8b9e594 102#ifdef CONFIG_SMP
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103 if (num_online_cpus() >= nr_cpu_ids) {
104 printk(KERN_INFO "num_online_cpus() >= nr_cpu_ids\n");
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105 return 1;
106 }
107#else
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108 if (boot_cpu_data.cpu_count > 0) {
109 printk(KERN_INFO "CONFIG_SMP=n ignoring additional CPUs\n");
110 return 1;
111 }
112#endif
113
114 /* logical CPU ID and update global counter
115 * May get overwritten by PAT code.
116 */
117 cpuid = boot_cpu_data.cpu_count;
53f01bba 118 txn_addr = dev->hpa.start; /* for legacy PDC */
1da177e4 119
a8f44e38 120#ifdef CONFIG_64BIT
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121 if (is_pdc_pat()) {
122 ulong status;
123 unsigned long bytecnt;
124 pdc_pat_cell_mod_maddr_block_t pa_pdc_cell;
125#undef USE_PAT_CPUID
126#ifdef USE_PAT_CPUID
127 struct pdc_pat_cpu_num cpu_info;
128#endif
129
130 status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc,
131 dev->mod_index, PA_VIEW, &pa_pdc_cell);
132
133 BUG_ON(PDC_OK != status);
134
135 /* verify it's the same as what do_pat_inventory() found */
136 BUG_ON(dev->mod_info != pa_pdc_cell.mod_info);
137 BUG_ON(dev->pmod_loc != pa_pdc_cell.mod_location);
138
139 txn_addr = pa_pdc_cell.mod[0]; /* id_eid for IO sapic */
140
141#ifdef USE_PAT_CPUID
142/* We need contiguous numbers for cpuid. Firmware's notion
143 * of cpuid is for physical CPUs and we just don't care yet.
144 * We'll care when we need to query PAT PDC about a CPU *after*
145 * boot time (ie shutdown a CPU from an OS perspective).
146 */
147 /* get the cpu number */
53f01bba 148 status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start);
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149
150 BUG_ON(PDC_OK != status);
151
152 if (cpu_info.cpu_num >= NR_CPUS) {
153 printk(KERN_WARNING "IGNORING CPU at 0x%x,"
154 " cpu_slot_id > NR_CPUS"
155 " (%ld > %d)\n",
53f01bba 156 dev->hpa.start, cpu_info.cpu_num, NR_CPUS);
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157 /* Ignore CPU since it will only crash */
158 boot_cpu_data.cpu_count--;
159 return 1;
160 } else {
161 cpuid = cpu_info.cpu_num;
162 }
163#endif
164 }
165#endif
166
ef017beb 167 p = &per_cpu(cpu_data, cpuid);
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168 boot_cpu_data.cpu_count++;
169
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170 /* initialize counters - CPU 0 gets it_value set in time_init() */
171 if (cpuid)
172 memset(p, 0, sizeof(struct cpuinfo_parisc));
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173
174 p->loops_per_jiffy = loops_per_jiffy;
175 p->dev = dev; /* Save IODC data in case we need it */
53f01bba 176 p->hpa = dev->hpa.start; /* save CPU hpa */
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177 p->cpuid = cpuid; /* save CPU id */
178 p->txn_addr = txn_addr; /* save CPU IRQ address */
179#ifdef CONFIG_SMP
1da177e4
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180 /*
181 ** FIXME: review if any other initialization is clobbered
ef017beb 182 ** for boot_cpu by the above memset().
1da177e4 183 */
ef017beb 184 init_percpu_prof(cpuid);
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185#endif
186
187 /*
7022672e 188 ** CONFIG_SMP: init_smp_config() will attempt to get CPUs into
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189 ** OS control. RENDEZVOUS is the default state - see mem_set above.
190 ** p->state = STATE_RENDEZVOUS;
191 */
192
193#if 0
194 /* CPU 0 IRQ table is statically allocated/initialized */
195 if (cpuid) {
196 struct irqaction actions[];
197
198 /*
199 ** itimer and ipi IRQ handlers are statically initialized in
200 ** arch/parisc/kernel/irq.c. ie Don't need to register them.
201 */
202 actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC);
203 if (!actions) {
204 /* not getting it's own table, share with monarch */
205 actions = cpu_irq_actions[0];
206 }
207
208 cpu_irq_actions[cpuid] = actions;
209 }
210#endif
211
212 /*
213 * Bring this CPU up now! (ignore bootstrap cpuid == 0)
214 */
215#ifdef CONFIG_SMP
216 if (cpuid) {
9bc181d8 217 set_cpu_present(cpuid, true);
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218 cpu_up(cpuid);
219 }
220#endif
221
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222 /* If we've registered more than one cpu,
223 * we'll use the jiffies clocksource since cr16
224 * is not synchronized between CPUs.
225 */
226 update_cr16_clocksource();
227
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228 return 0;
229}
230
231/**
232 * collect_boot_cpu_data - Fill the boot_cpu_data structure.
233 *
234 * This function collects and stores the generic processor information
235 * in the boot_cpu_data structure.
236 */
237void __init collect_boot_cpu_data(void)
238{
239 memset(&boot_cpu_data, 0, sizeof(boot_cpu_data));
240
241 boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */
242
243 /* get CPU-Model Information... */
244#define p ((unsigned long *)&boot_cpu_data.pdc.model)
245 if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK)
246 printk(KERN_INFO
247 "model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
248 p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
249#undef p
250
251 if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK)
252 printk(KERN_INFO "vers %08lx\n",
253 boot_cpu_data.pdc.versions);
254
255 if (pdc_model_cpuid(&boot_cpu_data.pdc.cpuid) == PDC_OK)
256 printk(KERN_INFO "CPUID vers %ld rev %ld (0x%08lx)\n",
257 (boot_cpu_data.pdc.cpuid >> 5) & 127,
258 boot_cpu_data.pdc.cpuid & 31,
259 boot_cpu_data.pdc.cpuid);
260
261 if (pdc_model_capabilities(&boot_cpu_data.pdc.capabilities) == PDC_OK)
262 printk(KERN_INFO "capabilities 0x%lx\n",
263 boot_cpu_data.pdc.capabilities);
264
265 if (pdc_model_sysmodel(boot_cpu_data.pdc.sys_model_name) == PDC_OK)
266 printk(KERN_INFO "model %s\n",
267 boot_cpu_data.pdc.sys_model_name);
268
269 boot_cpu_data.hversion = boot_cpu_data.pdc.model.hversion;
270 boot_cpu_data.sversion = boot_cpu_data.pdc.model.sversion;
271
272 boot_cpu_data.cpu_type = parisc_get_cpu_type(boot_cpu_data.hversion);
273 boot_cpu_data.cpu_name = cpu_name_version[boot_cpu_data.cpu_type][0];
274 boot_cpu_data.family_name = cpu_name_version[boot_cpu_data.cpu_type][1];
275}
276
277
1da177e4
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278
279/**
280 * init_per_cpu - Handle individual processor initializations.
281 * @cpunum: logical processor number.
282 *
283 * This function handles initialization for *every* CPU
284 * in the system:
285 *
286 * o Set "default" CPU width for trap handlers
287 *
288 * o Enable FP coprocessor
289 * REVISIT: this could be done in the "code 22" trap handler.
290 * (frowands idea - that way we know which processes need FP
291 * registers saved on the interrupt stack.)
292 * NEWS FLASH: wide kernels need FP coprocessor enabled to handle
293 * formatted printing of %lx for example (double divides I think)
294 *
295 * o Enable CPU profiling hooks.
296 */
ef017beb 297int __cpuinit init_per_cpu(int cpunum)
1da177e4
LT
298{
299 int ret;
300 struct pdc_coproc_cfg coproc_cfg;
301
302 set_firmware_width();
303 ret = pdc_coproc_cfg(&coproc_cfg);
304
305 if(ret >= 0 && coproc_cfg.ccr_functional) {
306 mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */
307
308 /* FWIW, FP rev/model is a more accurate way to determine
309 ** CPU type. CPU rev/model has some ambiguous cases.
310 */
ef017beb
HD
311 per_cpu(cpu_data, cpunum).fp_rev = coproc_cfg.revision;
312 per_cpu(cpu_data, cpunum).fp_model = coproc_cfg.model;
1da177e4
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313
314 printk(KERN_INFO "FP[%d] enabled: Rev %ld Model %ld\n",
315 cpunum, coproc_cfg.revision, coproc_cfg.model);
316
317 /*
318 ** store status register to stack (hopefully aligned)
319 ** and clear the T-bit.
320 */
321 asm volatile ("fstd %fr0,8(%sp)");
322
323 } else {
324 printk(KERN_WARNING "WARNING: No FP CoProcessor?!"
325 " (coproc_cfg.ccr_functional == 0x%lx, expected 0xc0)\n"
a8f44e38 326#ifdef CONFIG_64BIT
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327 "Halting Machine - FP required\n"
328#endif
329 , coproc_cfg.ccr_functional);
a8f44e38 330#ifdef CONFIG_64BIT
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331 mdelay(100); /* previous chars get pushed to console */
332 panic("FP CoProc not reported");
333#endif
334 }
335
336 /* FUTURE: Enable Performance Monitor : ccr bit 0x20 */
337 init_percpu_prof(cpunum);
338
339 return ret;
340}
341
342/*
7022672e 343 * Display CPU info for all CPUs.
1da177e4
LT
344 */
345int
346show_cpuinfo (struct seq_file *m, void *v)
347{
ef017beb 348 unsigned long cpu;
1da177e4 349
ef017beb
HD
350 for_each_online_cpu(cpu) {
351 const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
1da177e4 352#ifdef CONFIG_SMP
ef017beb 353 if (0 == cpuinfo->hpa)
1da177e4 354 continue;
1da177e4 355#endif
ef017beb 356 seq_printf(m, "processor\t: %lu\n"
1da177e4 357 "cpu family\t: PA-RISC %s\n",
ef017beb 358 cpu, boot_cpu_data.family_name);
1da177e4
LT
359
360 seq_printf(m, "cpu\t\t: %s\n", boot_cpu_data.cpu_name );
361
362 /* cpu MHz */
363 seq_printf(m, "cpu MHz\t\t: %d.%06d\n",
364 boot_cpu_data.cpu_hz / 1000000,
365 boot_cpu_data.cpu_hz % 1000000 );
366
445c088f
CW
367 seq_printf(m, "capabilities\t:");
368 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32)
369 seq_printf(m, " os32");
370 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS64)
371 seq_printf(m, " os64");
372 seq_printf(m, "\n");
373
1da177e4
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374 seq_printf(m, "model\t\t: %s\n"
375 "model name\t: %s\n",
376 boot_cpu_data.pdc.sys_model_name,
ef017beb
HD
377 cpuinfo->dev ?
378 cpuinfo->dev->name : "Unknown");
1da177e4
LT
379
380 seq_printf(m, "hversion\t: 0x%08x\n"
381 "sversion\t: 0x%08x\n",
382 boot_cpu_data.hversion,
383 boot_cpu_data.sversion );
384
385 /* print cachesize info */
386 show_cache_info(m);
387
388 seq_printf(m, "bogomips\t: %lu.%02lu\n",
ef017beb
HD
389 cpuinfo->loops_per_jiffy / (500000 / HZ),
390 (cpuinfo->loops_per_jiffy / (5000 / HZ)) % 100);
1da177e4
LT
391
392 seq_printf(m, "software id\t: %ld\n\n",
393 boot_cpu_data.pdc.model.sw_id);
394 }
395 return 0;
396}
397
e9541d0c 398static const struct parisc_device_id processor_tbl[] = {
1da177e4
LT
399 { HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID },
400 { 0, }
401};
402
e9541d0c 403static struct parisc_driver cpu_driver = {
1da177e4
LT
404 .name = "CPU",
405 .id_table = processor_tbl,
406 .probe = processor_probe
407};
408
409/**
7022672e 410 * processor_init - Processor initialization procedure.
1da177e4
LT
411 *
412 * Register this driver.
413 */
414void __init processor_init(void)
415{
416 register_parisc_driver(&cpu_driver);
417}