[linux-block.git] / arch / parisc / kernel / processor.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 *    Initial setup-routines for HP 9000 based hardware.
 *
 *    Copyright (C) 1991, 1992, 1995  Linus Torvalds
 *    Modifications for PA-RISC (C) 1999-2008 Helge Deller <deller@gmx.de>
 *    Modifications copyright 1999 SuSE GmbH (Philipp Rumpf)
 *    Modifications copyright 2000 Martin K. Petersen <mkp@mkp.net>
 *    Modifications copyright 2000 Philipp Rumpf <prumpf@tux.org>
 *    Modifications copyright 2001 Ryan Bradetich <rbradetich@uswest.net>
 *
 *    Initial PA-RISC Version: 04-23-1999 by Helge Deller
 */
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/seq_file.h>
#include <linux/random.h>
#include <linux/slab.h>
#include <linux/cpu.h>
#include <asm/topology.h>
#include <asm/param.h>
#include <asm/cache.h>
#include <asm/hardware.h>	/* for register_parisc_driver() stuff */
#include <asm/processor.h>
#include <asm/page.h>
#include <asm/pdc.h>
#include <asm/pdcpat.h>
#include <asm/irq.h>		/* for struct irq_region */
#include <asm/parisc-device.h>

struct system_cpuinfo_parisc boot_cpu_data __ro_after_init;
EXPORT_SYMBOL(boot_cpu_data);
#ifdef CONFIG_PA8X00
int _parisc_requires_coherency __ro_after_init;
EXPORT_SYMBOL(_parisc_requires_coherency);
#endif

DEFINE_PER_CPU(struct cpuinfo_parisc, cpu_data);

/*
**  	PARISC CPU driver - claim "device" and initialize CPU data structures.
**
** Consolidate per CPU initialization into (mostly) one module.
** Monarch CPU will initialize boot_cpu_data which shouldn't
** change once the system has booted.
**
** The callback *should* do per-instance initialization of
** everything including the monarch. "Per CPU" init code in
** setup.c:start_parisc() has migrated here and start_parisc()
** will call register_parisc_driver(&cpu_driver) before calling do_inventory().
**
** The goal of consolidating CPU initialization into one place is
** to make sure all CPUs get initialized the same way.
** The code path not shared is how PDC hands control of the CPU to the OS.
** The initialization of OS data structures is the same (done below).
*/

/**
 * init_cpu_profiler - enable/setup per cpu profiling hooks.
 * @cpunum: The processor instance.
 *
 * FIXME: doesn't do much yet...
 */
static void
init_percpu_prof(unsigned long cpunum)
{
}


/**
 * processor_probe - Determine if processor driver should claim this device.
 * @dev: The device which has been found.
 *
 * Determine if processor driver should claim this chip (return 0) or not 
 * (return 1).  If so, initialize the chip and tell other partners in crime 
 * they have work to do.
 */
static int __init processor_probe(struct parisc_device *dev)
{
	unsigned long txn_addr;
	unsigned long cpuid;
	struct cpuinfo_parisc *p;
	struct pdc_pat_cpu_num cpu_info = { };

#ifdef CONFIG_SMP
	if (num_online_cpus() >= nr_cpu_ids) {
		printk(KERN_INFO "num_online_cpus() >= nr_cpu_ids\n");
		return 1;
	}
#else
	if (boot_cpu_data.cpu_count > 0) {
		printk(KERN_INFO "CONFIG_SMP=n  ignoring additional CPUs\n");
		return 1;
	}
#endif

	/* logical CPU ID and update global counter
	 * May get overwritten by PAT code.
	 */
	cpuid = boot_cpu_data.cpu_count;
	txn_addr = dev->hpa.start;	/* for legacy PDC */
	cpu_info.cpu_num = cpu_info.cpu_loc = cpuid;

#ifdef CONFIG_64BIT
	if (is_pdc_pat()) {
		ulong status;
		unsigned long bytecnt;
	        pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell;

		pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL);
		if (!pa_pdc_cell)
			panic("couldn't allocate memory for PDC_PAT_CELL!");

		status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc,
			dev->mod_index, PA_VIEW, pa_pdc_cell);

		BUG_ON(PDC_OK != status);

		/* verify it's the same as what do_pat_inventory() found */
		BUG_ON(dev->mod_info != pa_pdc_cell->mod_info);
		BUG_ON(dev->pmod_loc != pa_pdc_cell->mod_location);

		txn_addr = pa_pdc_cell->mod[0];   /* id_eid for IO sapic */

		kfree(pa_pdc_cell);

		/* get the cpu number */
		status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start);
		BUG_ON(PDC_OK != status);

		pr_info("Logical CPU #%lu is physical cpu #%lu at location "
			"0x%lx with hpa %pa\n",
			cpuid, cpu_info.cpu_num, cpu_info.cpu_loc,
			&dev->hpa.start);

#undef USE_PAT_CPUID
#ifdef USE_PAT_CPUID
/* We need contiguous numbers for cpuid. Firmware's notion
 * of cpuid is for physical CPUs and we just don't care yet.
 * We'll care when we need to query PAT PDC about a CPU *after*
 * boot time (ie shutdown a CPU from an OS perspective).
 */
		if (cpu_info.cpu_num >= NR_CPUS) {
			printk(KERN_WARNING "IGNORING CPU at %pa,"
				" cpu_slot_id > NR_CPUS"
				" (%ld > %d)\n",
				&dev->hpa.start, cpu_info.cpu_num, NR_CPUS);
			/* Ignore CPU since it will only crash */
			boot_cpu_data.cpu_count--;
			return 1;
		} else {
			cpuid = cpu_info.cpu_num;
		}
#endif
	}
#endif

	p = &per_cpu(cpu_data, cpuid);
	boot_cpu_data.cpu_count++;

	/* initialize counters - CPU 0 gets it_value set in time_init() */
	if (cpuid)
		memset(p, 0, sizeof(struct cpuinfo_parisc));

	p->dev = dev;		/* Save IODC data in case we need it */
	p->hpa = dev->hpa.start;	/* save CPU hpa */
	p->cpuid = cpuid;	/* save CPU id */
	p->txn_addr = txn_addr;	/* save CPU IRQ address */
	p->cpu_num = cpu_info.cpu_num;
	p->cpu_loc = cpu_info.cpu_loc;

	set_cpu_possible(cpuid, true);
	store_cpu_topology(cpuid);

#ifdef CONFIG_SMP
	/*
	** FIXME: review if any other initialization is clobbered
	**	  for boot_cpu by the above memset().
	*/
	init_percpu_prof(cpuid);
#endif

	/*
	** CONFIG_SMP: init_smp_config() will attempt to get CPUs into
	** OS control. RENDEZVOUS is the default state - see mem_set above.
	**	p->state = STATE_RENDEZVOUS;
	*/

#if 0
	/* CPU 0 IRQ table is statically allocated/initialized */
	if (cpuid) {
		struct irqaction actions[];

		/*
		** itimer and ipi IRQ handlers are statically initialized in
		** arch/parisc/kernel/irq.c. ie Don't need to register them.
		*/
		actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC);
		if (!actions) {
			/* not getting it's own table, share with monarch */
			actions = cpu_irq_actions[0];
		}

		cpu_irq_actions[cpuid] = actions;
	}
#endif

	/* 
	 * Bring this CPU up now! (ignore bootstrap cpuid == 0)
	 */
#ifdef CONFIG_SMP
	if (cpuid) {
		set_cpu_present(cpuid, true);
		add_cpu(cpuid);
	}
#endif

	return 0;
}

/**
 * collect_boot_cpu_data - Fill the boot_cpu_data structure.
 *
 * This function collects and stores the generic processor information
 * in the boot_cpu_data structure.
 */
void __init collect_boot_cpu_data(void)
{
	unsigned long cr16_seed;
	char orig_prod_num[64], current_prod_num[64], serial_no[64];

	memset(&boot_cpu_data, 0, sizeof(boot_cpu_data));

	cr16_seed = get_cycles();
	add_device_randomness(&cr16_seed, sizeof(cr16_seed));

	boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */

	/* get CPU-Model Information... */
#define p ((unsigned long *)&boot_cpu_data.pdc.model)
	if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) {
		printk(KERN_INFO 
			"model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
			p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);

		add_device_randomness(&boot_cpu_data.pdc.model,
			sizeof(boot_cpu_data.pdc.model));
	}
#undef p

	if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK) {
		printk(KERN_INFO "vers  %08lx\n", 
			boot_cpu_data.pdc.versions);

		add_device_randomness(&boot_cpu_data.pdc.versions,
			sizeof(boot_cpu_data.pdc.versions));
	}

	if (pdc_model_cpuid(&boot_cpu_data.pdc.cpuid) == PDC_OK) {
		printk(KERN_INFO "CPUID vers %ld rev %ld (0x%08lx)\n",
			(boot_cpu_data.pdc.cpuid >> 5) & 127,
			boot_cpu_data.pdc.cpuid & 31,
			boot_cpu_data.pdc.cpuid);

		add_device_randomness(&boot_cpu_data.pdc.cpuid,
			sizeof(boot_cpu_data.pdc.cpuid));
	}

	if (pdc_model_capabilities(&boot_cpu_data.pdc.capabilities) == PDC_OK)
		printk(KERN_INFO "capabilities 0x%lx\n",
			boot_cpu_data.pdc.capabilities);

	if (pdc_model_sysmodel(boot_cpu_data.pdc.sys_model_name) == PDC_OK)
		printk(KERN_INFO "model %s\n",
			boot_cpu_data.pdc.sys_model_name);

	dump_stack_set_arch_desc("%s", boot_cpu_data.pdc.sys_model_name);

	boot_cpu_data.hversion =  boot_cpu_data.pdc.model.hversion;
	boot_cpu_data.sversion =  boot_cpu_data.pdc.model.sversion;

	boot_cpu_data.cpu_type = parisc_get_cpu_type(boot_cpu_data.hversion);
	boot_cpu_data.cpu_name = cpu_name_version[boot_cpu_data.cpu_type][0];
	boot_cpu_data.family_name = cpu_name_version[boot_cpu_data.cpu_type][1];

#ifdef CONFIG_PA8X00
	_parisc_requires_coherency = (boot_cpu_data.cpu_type == mako) ||
				(boot_cpu_data.cpu_type == mako2);
#endif

	if (pdc_model_platform_info(orig_prod_num, current_prod_num, serial_no) == PDC_OK) {
		printk(KERN_INFO "product %s, original product %s, S/N: %s\n",
			current_prod_num[0] ? current_prod_num : "n/a",
			orig_prod_num, serial_no);
		add_device_randomness(orig_prod_num, strlen(orig_prod_num));
		add_device_randomness(current_prod_num, strlen(current_prod_num));
		add_device_randomness(serial_no, strlen(serial_no));
	}
}


/**
 * init_per_cpu - Handle individual processor initializations.
 * @cpunum: logical processor number.
 *
 * This function handles initialization for *every* CPU
 * in the system:
 *
 * o Set "default" CPU width for trap handlers
 *
 * o Enable FP coprocessor
 *   REVISIT: this could be done in the "code 22" trap handler.
 *	(frowands idea - that way we know which processes need FP
 *	registers saved on the interrupt stack.)
 *   NEWS FLASH: wide kernels need FP coprocessor enabled to handle
 *	formatted printing of %lx for example (double divides I think)
 *
 * o Enable CPU profiling hooks.
 */
int init_per_cpu(int cpunum)
{
	int ret;
	struct pdc_coproc_cfg coproc_cfg;

	set_firmware_width();
	ret = pdc_coproc_cfg(&coproc_cfg);

	store_cpu_topology(cpunum);

	if(ret >= 0 && coproc_cfg.ccr_functional) {
		mtctl(coproc_cfg.ccr_functional, 10);  /* 10 == Coprocessor Control Reg */

		/* FWIW, FP rev/model is a more accurate way to determine
		** CPU type. CPU rev/model has some ambiguous cases.
		*/
		per_cpu(cpu_data, cpunum).fp_rev = coproc_cfg.revision;
		per_cpu(cpu_data, cpunum).fp_model = coproc_cfg.model;

		if (cpunum == 0)
			printk(KERN_INFO  "FP[%d] enabled: Rev %ld Model %ld\n",
				cpunum, coproc_cfg.revision, coproc_cfg.model);

		/*
		** store status register to stack (hopefully aligned)
		** and clear the T-bit.
		*/
		asm volatile ("fstd    %fr0,8(%sp)");

	} else {
		printk(KERN_WARNING  "WARNING: No FP CoProcessor?!"
			" (coproc_cfg.ccr_functional == 0x%lx, expected 0xc0)\n"
#ifdef CONFIG_64BIT
			"Halting Machine - FP required\n"
#endif
			, coproc_cfg.ccr_functional);
#ifdef CONFIG_64BIT
		mdelay(100);	/* previous chars get pushed to console */
		panic("FP CoProc not reported");
#endif
	}

	/* FUTURE: Enable Performance Monitor : ccr bit 0x20 */
	init_percpu_prof(cpunum);

	return ret;
}

/*
 * Display CPU info for all CPUs.
 */
int
show_cpuinfo (struct seq_file *m, void *v)
{
	unsigned long cpu;

	for_each_online_cpu(cpu) {
		const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
#ifdef CONFIG_SMP
		if (0 == cpuinfo->hpa)
			continue;
#endif
		seq_printf(m, "processor\t: %lu\n"
				"cpu family\t: PA-RISC %s\n",
				 cpu, boot_cpu_data.family_name);

		seq_printf(m, "cpu\t\t: %s\n",  boot_cpu_data.cpu_name );

		/* cpu MHz */
		seq_printf(m, "cpu MHz\t\t: %d.%06d\n",
				 boot_cpu_data.cpu_hz / 1000000,
				 boot_cpu_data.cpu_hz % 1000000  );

#ifdef CONFIG_GENERIC_ARCH_TOPOLOGY
		seq_printf(m, "physical id\t: %d\n",
				topology_physical_package_id(cpu));
		seq_printf(m, "siblings\t: %d\n",
				cpumask_weight(topology_core_cpumask(cpu)));
		seq_printf(m, "core id\t\t: %d\n", topology_core_id(cpu));
#endif

		seq_printf(m, "capabilities\t:");
		if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32)
			seq_puts(m, " os32");
		if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS64)
			seq_puts(m, " os64");
		if (boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC)
			seq_puts(m, " iopdir_fdc");
		switch (boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) {
		case PDC_MODEL_NVA_SUPPORTED:
			seq_puts(m, " nva_supported");
			break;
		case PDC_MODEL_NVA_SLOW:
			seq_puts(m, " nva_slow");
			break;
		case PDC_MODEL_NVA_UNSUPPORTED:
			seq_puts(m, " needs_equivalent_aliasing");
			break;
		}
		seq_printf(m, " (0x%02lx)\n", boot_cpu_data.pdc.capabilities);

		seq_printf(m, "model\t\t: %s - %s\n",
				 boot_cpu_data.pdc.sys_model_name,
				 cpuinfo->dev ?
				 cpuinfo->dev->name : "Unknown");

		seq_printf(m, "hversion\t: 0x%08x\n"
			        "sversion\t: 0x%08x\n",
				 boot_cpu_data.hversion,
				 boot_cpu_data.sversion );

		/* print cachesize info */
		show_cache_info(m);

		seq_printf(m, "bogomips\t: %lu.%02lu\n",
			     loops_per_jiffy / (500000 / HZ),
			     loops_per_jiffy / (5000 / HZ) % 100);

		seq_printf(m, "software id\t: %ld\n\n",
				boot_cpu_data.pdc.model.sw_id);
	}
	return 0;
}

static const struct parisc_device_id processor_tbl[] __initconst = {
	{ HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID },
	{ 0, }
};

static struct parisc_driver cpu_driver __refdata = {
	.name		= "CPU",
	.id_table	= processor_tbl,
	.probe		= processor_probe
};

/**
 * processor_init - Processor initialization procedure.
 *
 * Register this driver.
 */
void __init processor_init(void)
{
	unsigned int cpu;

	reset_cpu_topology();

	/* reset possible mask. We will mark those which are possible. */
	for_each_possible_cpu(cpu)
		set_cpu_possible(cpu, false);

	register_parisc_driver(&cpu_driver);
}
Commit	Line	Data
de6cc651	1	// SPDX-License-Identifier: GPL-2.0-or-later
071327ec	2	/*
1da177e4 LT	3	* Initial setup-routines for HP 9000 based hardware.
	4	*
	5	* Copyright (C) 1991, 1992, 1995 Linus Torvalds
ef017beb	6	* Modifications for PA-RISC (C) 1999-2008 Helge Deller <deller@gmx.de>
1da177e4 LT	7	* Modifications copyright 1999 SuSE GmbH (Philipp Rumpf)
	8	* Modifications copyright 2000 Martin K. Petersen <mkp@mkp.net>
	9	* Modifications copyright 2000 Philipp Rumpf <prumpf@tux.org>
	10	* Modifications copyright 2001 Ryan Bradetich <rbradetich@uswest.net>
	11	*
	12	* Initial PA-RISC Version: 04-23-1999 by Helge Deller
1da177e4	13	*/
1da177e4 LT	14	#include <linux/delay.h>
	15	#include <linux/init.h>
	16	#include <linux/mm.h>
	17	#include <linux/module.h>
	18	#include <linux/seq_file.h>
1ed4714f	19	#include <linux/random.h>
1da177e4 LT	20	#include <linux/slab.h>
1da177e4 LT	21	#include <linux/cpu.h>
62773112	22	#include <asm/topology.h>
e8edc6e0	23	#include <asm/param.h>
1da177e4 LT	24	#include <asm/cache.h>
	25	#include <asm/hardware.h> /* for register_parisc_driver() stuff */
	26	#include <asm/processor.h>
	27	#include <asm/page.h>
	28	#include <asm/pdc.h>
	29	#include <asm/pdcpat.h>
	30	#include <asm/irq.h> /* for struct irq_region */
	31	#include <asm/parisc-device.h>
	32
d9888369	33	struct system_cpuinfo_parisc boot_cpu_data __ro_after_init;
1da177e4	34	EXPORT_SYMBOL(boot_cpu_data);
fc632575	35	#ifdef CONFIG_PA8X00
d9888369	36	int _parisc_requires_coherency __ro_after_init;
fc632575 HD	37	EXPORT_SYMBOL(_parisc_requires_coherency);
fc632575 HD	38	#endif
1da177e4	39
ef017beb	40	DEFINE_PER_CPU(struct cpuinfo_parisc, cpu_data);
1da177e4 LT	41
	42	/*
	43	** PARISC CPU driver - claim "device" and initialize CPU data structures.
	44	**
	45	** Consolidate per CPU initialization into (mostly) one module.
	46	** Monarch CPU will initialize boot_cpu_data which shouldn't
	47	** change once the system has booted.
	48	**
	49	** The callback should do per-instance initialization of
	50	** everything including the monarch. "Per CPU" init code in
	51	** setup.c:start_parisc() has migrated here and start_parisc()
	52	** will call register_parisc_driver(&cpu_driver) before calling do_inventory().
	53	**
	54	** The goal of consolidating CPU initialization into one place is
7022672e	55	** to make sure all CPUs get initialized the same way.
1da177e4 LT	56	** The code path not shared is how PDC hands control of the CPU to the OS.
	57	** The initialization of OS data structures is the same (done below).
	58	*/
	59
ef017beb HD	60	/**
	61	* init_cpu_profiler - enable/setup per cpu profiling hooks.
	62	* @cpunum: The processor instance.
	63	*
	64	* FIXME: doesn't do much yet...
	65	*/
60ffef06	66	static void
ef017beb HD	67	init_percpu_prof(unsigned long cpunum)
ef017beb HD	68	{
ef017beb HD	69	}
	70
	71
1da177e4 LT	72	/**
	73	* processor_probe - Determine if processor driver should claim this device.
	74	* @dev: The device which has been found.
	75	*
	76	* Determine if processor driver should claim this chip (return 0) or not
	77	* (return 1). If so, initialize the chip and tell other partners in crime
	78	* they have work to do.
	79	*/
6c706b93	80	static int __init processor_probe(struct parisc_device *dev)
1da177e4 LT	81	{
	82	unsigned long txn_addr;
	83	unsigned long cpuid;
	84	struct cpuinfo_parisc *p;
c8c37359	85	struct pdc_pat_cpu_num cpu_info = { };
1da177e4	86
f8b9e594	87	#ifdef CONFIG_SMP
bd071e1a RR	88	if (num_online_cpus() >= nr_cpu_ids) {
bd071e1a RR	89	printk(KERN_INFO "num_online_cpus() >= nr_cpu_ids\n");
f8b9e594 KM	90	return 1;
	91	}
	92	#else
1da177e4 LT	93	if (boot_cpu_data.cpu_count > 0) {
	94	printk(KERN_INFO "CONFIG_SMP=n ignoring additional CPUs\n");
	95	return 1;
	96	}
	97	#endif
	98
	99	/* logical CPU ID and update global counter
	100	* May get overwritten by PAT code.
	101	*/
	102	cpuid = boot_cpu_data.cpu_count;
53f01bba	103	txn_addr = dev->hpa.start; /* for legacy PDC */
c8c37359	104	cpu_info.cpu_num = cpu_info.cpu_loc = cpuid;
1da177e4	105
a8f44e38	106	#ifdef CONFIG_64BIT
1da177e4 LT	107	if (is_pdc_pat()) {
	108	ulong status;
	109	unsigned long bytecnt;
64a0cdb0	110	pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell;
1da177e4	111
64a0cdb0 KM	112	pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL);
	113	if (!pa_pdc_cell)
	114	panic("couldn't allocate memory for PDC_PAT_CELL!");
	115
1da177e4	116	status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc,
64a0cdb0	117	dev->mod_index, PA_VIEW, pa_pdc_cell);
1da177e4 LT	118
	119	BUG_ON(PDC_OK != status);
	120
	121	/* verify it's the same as what do_pat_inventory() found */
64a0cdb0 KM	122	BUG_ON(dev->mod_info != pa_pdc_cell->mod_info);
	123	BUG_ON(dev->pmod_loc != pa_pdc_cell->mod_location);
	124
	125	txn_addr = pa_pdc_cell->mod[0]; /* id_eid for IO sapic */
1da177e4	126
64a0cdb0	127	kfree(pa_pdc_cell);
1da177e4	128
637250cc HD	129	/* get the cpu number */
	130	status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start);
	131	BUG_ON(PDC_OK != status);
	132
	133	pr_info("Logical CPU #%lu is physical cpu #%lu at location "
	134	"0x%lx with hpa %pa\n",
	135	cpuid, cpu_info.cpu_num, cpu_info.cpu_loc,
	136	&dev->hpa.start);
	137
	138	#undef USE_PAT_CPUID
1da177e4 LT	139	#ifdef USE_PAT_CPUID
	140	/* We need contiguous numbers for cpuid. Firmware's notion
	141	* of cpuid is for physical CPUs and we just don't care yet.
	142	* We'll care when we need to query PAT PDC about a CPU after
	143	* boot time (ie shutdown a CPU from an OS perspective).
	144	*/
1da177e4	145	if (cpu_info.cpu_num >= NR_CPUS) {
637250cc	146	printk(KERN_WARNING "IGNORING CPU at %pa,"
1da177e4 LT	147	" cpu_slot_id > NR_CPUS"
1da177e4 LT	148	" (%ld > %d)\n",
637250cc	149	&dev->hpa.start, cpu_info.cpu_num, NR_CPUS);
1da177e4 LT	150	/* Ignore CPU since it will only crash */
	151	boot_cpu_data.cpu_count--;
	152	return 1;
	153	} else {
	154	cpuid = cpu_info.cpu_num;
	155	}
	156	#endif
	157	}
	158	#endif
	159
ef017beb	160	p = &per_cpu(cpu_data, cpuid);
1da177e4 LT	161	boot_cpu_data.cpu_count++;
1da177e4 LT	162
7908a0c7 GG	163	/* initialize counters - CPU 0 gets it_value set in time_init() */
	164	if (cpuid)
	165	memset(p, 0, sizeof(struct cpuinfo_parisc));
1da177e4	166
1da177e4	167	p->dev = dev; /* Save IODC data in case we need it */
53f01bba	168	p->hpa = dev->hpa.start; /* save CPU hpa */
1da177e4 LT	169	p->cpuid = cpuid; /* save CPU id */
1da177e4 LT	170	p->txn_addr = txn_addr; /* save CPU IRQ address */
c8c37359 HD	171	p->cpu_num = cpu_info.cpu_num;
c8c37359 HD	172	p->cpu_loc = cpu_info.cpu_loc;
bf7b4c1b	173
0921244f	174	set_cpu_possible(cpuid, true);
bf7b4c1b HD	175	store_cpu_topology(cpuid);
bf7b4c1b HD	176
1da177e4	177	#ifdef CONFIG_SMP
1da177e4 LT	178	/*
1da177e4 LT	179	** FIXME: review if any other initialization is clobbered
ef017beb	180	** for boot_cpu by the above memset().
1da177e4	181	*/
ef017beb	182	init_percpu_prof(cpuid);
1da177e4 LT	183	#endif
	184
	185	/*
7022672e	186	** CONFIG_SMP: init_smp_config() will attempt to get CPUs into
1da177e4 LT	187	** OS control. RENDEZVOUS is the default state - see mem_set above.
	188	** p->state = STATE_RENDEZVOUS;
	189	*/
	190
	191	#if 0
	192	/* CPU 0 IRQ table is statically allocated/initialized */
	193	if (cpuid) {
	194	struct irqaction actions[];
	195
	196	/*
	197	** itimer and ipi IRQ handlers are statically initialized in
	198	** arch/parisc/kernel/irq.c. ie Don't need to register them.
	199	*/
	200	actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC);
	201	if (!actions) {
	202	/* not getting it's own table, share with monarch */
	203	actions = cpu_irq_actions[0];
	204	}
	205
	206	cpu_irq_actions[cpuid] = actions;
	207	}
	208	#endif
	209
	210	/*
	211	* Bring this CPU up now! (ignore bootstrap cpuid == 0)
	212	*/
	213	#ifdef CONFIG_SMP
	214	if (cpuid) {
9bc181d8	215	set_cpu_present(cpuid, true);
02addaea	216	add_cpu(cpuid);
1da177e4 LT	217	}
	218	#endif
	219
	220	return 0;
	221	}
	222
	223	/**
	224	* collect_boot_cpu_data - Fill the boot_cpu_data structure.
	225	*
	226	* This function collects and stores the generic processor information
	227	* in the boot_cpu_data structure.
	228	*/
	229	void __init collect_boot_cpu_data(void)
	230	{
1ed4714f	231	unsigned long cr16_seed;
8207d4ee	232	char orig_prod_num[64], current_prod_num[64], serial_no[64];
1ed4714f	233
1da177e4 LT	234	memset(&boot_cpu_data, 0, sizeof(boot_cpu_data));
1da177e4 LT	235
1ed4714f HD	236	cr16_seed = get_cycles();
	237	add_device_randomness(&cr16_seed, sizeof(cr16_seed));
	238
1da177e4 LT	239	boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */
	240
	241	/* get CPU-Model Information... */
	242	#define p ((unsigned long *)&boot_cpu_data.pdc.model)
1ed4714f	243	if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) {
1da177e4 LT	244	printk(KERN_INFO
	245	"model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
	246	p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
1ed4714f HD	247
	248	add_device_randomness(&boot_cpu_data.pdc.model,
	249	sizeof(boot_cpu_data.pdc.model));
	250	}
1da177e4 LT	251	#undef p
1da177e4 LT	252
1ed4714f	253	if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK) {
1da177e4 LT	254	printk(KERN_INFO "vers %08lx\n",
	255	boot_cpu_data.pdc.versions);
	256
1ed4714f HD	257	add_device_randomness(&boot_cpu_data.pdc.versions,
	258	sizeof(boot_cpu_data.pdc.versions));
	259	}
	260
	261	if (pdc_model_cpuid(&boot_cpu_data.pdc.cpuid) == PDC_OK) {
1da177e4 LT	262	printk(KERN_INFO "CPUID vers %ld rev %ld (0x%08lx)\n",
	263	(boot_cpu_data.pdc.cpuid >> 5) & 127,
	264	boot_cpu_data.pdc.cpuid & 31,
	265	boot_cpu_data.pdc.cpuid);
	266
1ed4714f HD	267	add_device_randomness(&boot_cpu_data.pdc.cpuid,
	268	sizeof(boot_cpu_data.pdc.cpuid));
	269	}
	270
1da177e4 LT	271	if (pdc_model_capabilities(&boot_cpu_data.pdc.capabilities) == PDC_OK)
	272	printk(KERN_INFO "capabilities 0x%lx\n",
	273	boot_cpu_data.pdc.capabilities);
	274
	275	if (pdc_model_sysmodel(boot_cpu_data.pdc.sys_model_name) == PDC_OK)
	276	printk(KERN_INFO "model %s\n",
	277	boot_cpu_data.pdc.sys_model_name);
	278
dbf2a4b1 HD	279	dump_stack_set_arch_desc("%s", boot_cpu_data.pdc.sys_model_name);
dbf2a4b1 HD	280
1da177e4 LT	281	boot_cpu_data.hversion = boot_cpu_data.pdc.model.hversion;
	282	boot_cpu_data.sversion = boot_cpu_data.pdc.model.sversion;
	283
	284	boot_cpu_data.cpu_type = parisc_get_cpu_type(boot_cpu_data.hversion);
	285	boot_cpu_data.cpu_name = cpu_name_version[boot_cpu_data.cpu_type][0];
	286	boot_cpu_data.family_name = cpu_name_version[boot_cpu_data.cpu_type][1];
1da177e4	287
fc632575 HD	288	#ifdef CONFIG_PA8X00
	289	_parisc_requires_coherency = (boot_cpu_data.cpu_type == mako) \|\|
	290	(boot_cpu_data.cpu_type == mako2);
	291	#endif
8207d4ee HD	292
	293	if (pdc_model_platform_info(orig_prod_num, current_prod_num, serial_no) == PDC_OK) {
	294	printk(KERN_INFO "product %s, original product %s, S/N: %s\n",
0e4db23e HD	295	current_prod_num[0] ? current_prod_num : "n/a",
0e4db23e HD	296	orig_prod_num, serial_no);
8207d4ee HD	297	add_device_randomness(orig_prod_num, strlen(orig_prod_num));
	298	add_device_randomness(current_prod_num, strlen(current_prod_num));
	299	add_device_randomness(serial_no, strlen(serial_no));
	300	}
fc632575	301	}
1da177e4	302
1da177e4 LT	303
	304	/**
	305	* init_per_cpu - Handle individual processor initializations.
	306	* @cpunum: logical processor number.
	307	*
	308	* This function handles initialization for every CPU
	309	* in the system:
	310	*
	311	* o Set "default" CPU width for trap handlers
	312	*
	313	* o Enable FP coprocessor
	314	* REVISIT: this could be done in the "code 22" trap handler.
	315	* (frowands idea - that way we know which processes need FP
	316	* registers saved on the interrupt stack.)
	317	* NEWS FLASH: wide kernels need FP coprocessor enabled to handle
	318	* formatted printing of %lx for example (double divides I think)
	319	*
	320	* o Enable CPU profiling hooks.
	321	*/
beb48dfd	322	int init_per_cpu(int cpunum)
1da177e4 LT	323	{
	324	int ret;
	325	struct pdc_coproc_cfg coproc_cfg;
	326
	327	set_firmware_width();
	328	ret = pdc_coproc_cfg(&coproc_cfg);
	329
bf7b4c1b HD	330	store_cpu_topology(cpunum);
bf7b4c1b HD	331
1da177e4 LT	332	if(ret >= 0 && coproc_cfg.ccr_functional) {
	333	mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */
	334
	335	/* FWIW, FP rev/model is a more accurate way to determine
	336	** CPU type. CPU rev/model has some ambiguous cases.
	337	*/
ef017beb HD	338	per_cpu(cpu_data, cpunum).fp_rev = coproc_cfg.revision;
ef017beb HD	339	per_cpu(cpu_data, cpunum).fp_model = coproc_cfg.model;
1da177e4	340
0032c088 HD	341	if (cpunum == 0)
	342	printk(KERN_INFO "FP[%d] enabled: Rev %ld Model %ld\n",
	343	cpunum, coproc_cfg.revision, coproc_cfg.model);
1da177e4 LT	344
	345	/*
	346	** store status register to stack (hopefully aligned)
	347	** and clear the T-bit.
	348	*/
	349	asm volatile ("fstd %fr0,8(%sp)");
	350
	351	} else {
	352	printk(KERN_WARNING "WARNING: No FP CoProcessor?!"
	353	" (coproc_cfg.ccr_functional == 0x%lx, expected 0xc0)\n"
a8f44e38	354	#ifdef CONFIG_64BIT
1da177e4 LT	355	"Halting Machine - FP required\n"
	356	#endif
	357	, coproc_cfg.ccr_functional);
a8f44e38	358	#ifdef CONFIG_64BIT
1da177e4 LT	359	mdelay(100); /* previous chars get pushed to console */
	360	panic("FP CoProc not reported");
	361	#endif
	362	}
	363
	364	/* FUTURE: Enable Performance Monitor : ccr bit 0x20 */
	365	init_percpu_prof(cpunum);
	366
	367	return ret;
	368	}
	369
	370	/*
7022672e	371	* Display CPU info for all CPUs.
1da177e4 LT	372	*/
	373	int
	374	show_cpuinfo (struct seq_file m, void v)
	375	{
ef017beb	376	unsigned long cpu;
1da177e4	377
ef017beb HD	378	for_each_online_cpu(cpu) {
ef017beb HD	379	const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
1da177e4	380	#ifdef CONFIG_SMP
ef017beb	381	if (0 == cpuinfo->hpa)
1da177e4	382	continue;
1da177e4	383	#endif
ef017beb	384	seq_printf(m, "processor\t: %lu\n"
1da177e4	385	"cpu family\t: PA-RISC %s\n",
ef017beb	386	cpu, boot_cpu_data.family_name);
1da177e4 LT	387
	388	seq_printf(m, "cpu\t\t: %s\n", boot_cpu_data.cpu_name );
	389
	390	/* cpu MHz */
	391	seq_printf(m, "cpu MHz\t\t: %d.%06d\n",
	392	boot_cpu_data.cpu_hz / 1000000,
	393	boot_cpu_data.cpu_hz % 1000000 );
	394
62773112	395	#ifdef CONFIG_GENERIC_ARCH_TOPOLOGY
bf7b4c1b HD	396	seq_printf(m, "physical id\t: %d\n",
	397	topology_physical_package_id(cpu));
	398	seq_printf(m, "siblings\t: %d\n",
	399	cpumask_weight(topology_core_cpumask(cpu)));
	400	seq_printf(m, "core id\t\t: %d\n", topology_core_id(cpu));
	401	#endif
	402
445c088f CW	403	seq_printf(m, "capabilities\t:");
445c088f CW	404	if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32)
30a9f0b2	405	seq_puts(m, " os32");
445c088f	406	if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS64)
30a9f0b2 HD	407	seq_puts(m, " os64");
	408	if (boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC)
	409	seq_puts(m, " iopdir_fdc");
	410	switch (boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) {
	411	case PDC_MODEL_NVA_SUPPORTED:
	412	seq_puts(m, " nva_supported");
	413	break;
	414	case PDC_MODEL_NVA_SLOW:
	415	seq_puts(m, " nva_slow");
	416	break;
	417	case PDC_MODEL_NVA_UNSUPPORTED:
	418	seq_puts(m, " needs_equivalent_aliasing");
	419	break;
	420	}
	421	seq_printf(m, " (0x%02lx)\n", boot_cpu_data.pdc.capabilities);
445c088f	422
5b89966b	423	seq_printf(m, "model\t\t: %s - %s\n",
1da177e4	424	boot_cpu_data.pdc.sys_model_name,
ef017beb HD	425	cpuinfo->dev ?
ef017beb HD	426	cpuinfo->dev->name : "Unknown");
1da177e4 LT	427
	428	seq_printf(m, "hversion\t: 0x%08x\n"
	429	"sversion\t: 0x%08x\n",
	430	boot_cpu_data.hversion,
	431	boot_cpu_data.sversion );
	432
	433	/* print cachesize info */
	434	show_cache_info(m);
	435
	436	seq_printf(m, "bogomips\t: %lu.%02lu\n",
93346da8 HD	437	loops_per_jiffy / (500000 / HZ),
93346da8 HD	438	loops_per_jiffy / (5000 / HZ) % 100);
1da177e4 LT	439
	440	seq_printf(m, "software id\t: %ld\n\n",
	441	boot_cpu_data.pdc.model.sw_id);
	442	}
	443	return 0;
	444	}
	445
6c706b93	446	static const struct parisc_device_id processor_tbl[] __initconst = {
1da177e4 LT	447	{ HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID },
	448	{ 0, }
	449	};
	450
6c706b93	451	static struct parisc_driver cpu_driver __refdata = {
1da177e4 LT	452	.name = "CPU",
	453	.id_table = processor_tbl,
	454	.probe = processor_probe
	455	};
	456
	457	/**
7022672e	458	* processor_init - Processor initialization procedure.
1da177e4 LT	459	*
	460	* Register this driver.
	461	*/
	462	void __init processor_init(void)
	463	{
0921244f HD	464	unsigned int cpu;
0921244f HD	465
62773112	466	reset_cpu_topology();
0921244f HD	467
	468	/* reset possible mask. We will mark those which are possible. */
	469	for_each_possible_cpu(cpu)
	470	set_cpu_possible(cpu, false);
	471
1da177e4 LT	472	register_parisc_driver(&cpu_driver);
1da177e4 LT	473	}