[linux-block.git] / arch / parisc / include / asm / io.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_IO_H
#define _ASM_IO_H

#include <linux/types.h>
#include <asm/pgtable.h>

#define virt_to_phys(a) ((unsigned long)__pa(a))
#define phys_to_virt(a) __va(a)
#define virt_to_bus virt_to_phys
#define bus_to_virt phys_to_virt

static inline unsigned long isa_bus_to_virt(unsigned long addr) {
	BUG();
	return 0;
}

static inline unsigned long isa_virt_to_bus(void *addr) {
	BUG();
	return 0;
}

/*
 * Memory mapped I/O
 *
 * readX()/writeX() do byteswapping and take an ioremapped address
 * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
 * gsc_*() don't byteswap and operate on physical addresses;
 *   eg dev->hpa or 0xfee00000.
 */

static inline unsigned char gsc_readb(unsigned long addr)
{
	long flags;
	unsigned char ret;

	__asm__ __volatile__(
	"	rsm	%3,%0\n"
	"	ldbx	0(%2),%1\n"
	"	mtsm	%0\n"
	: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );

	return ret;
}

static inline unsigned short gsc_readw(unsigned long addr)
{
	long flags;
	unsigned short ret;

	__asm__ __volatile__(
	"	rsm	%3,%0\n"
	"	ldhx	0(%2),%1\n"
	"	mtsm	%0\n"
	: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );

	return ret;
}

static inline unsigned int gsc_readl(unsigned long addr)
{
	u32 ret;

	__asm__ __volatile__(
	"	ldwax	0(%1),%0\n"
	: "=r" (ret) : "r" (addr) );

	return ret;
}

static inline unsigned long long gsc_readq(unsigned long addr)
{
	unsigned long long ret;

#ifdef CONFIG_64BIT
	__asm__ __volatile__(
	"	ldda	0(%1),%0\n"
	:  "=r" (ret) : "r" (addr) );
#else
	/* two reads may have side effects.. */
	ret = ((u64) gsc_readl(addr)) << 32;
	ret |= gsc_readl(addr+4);
#endif
	return ret;
}

static inline void gsc_writeb(unsigned char val, unsigned long addr)
{
	long flags;
	__asm__ __volatile__(
	"	rsm	%3,%0\n"
	"	stbs	%1,0(%2)\n"
	"	mtsm	%0\n"
	: "=&r" (flags) :  "r" (val), "r" (addr), "i" (PSW_SM_D) );
}

static inline void gsc_writew(unsigned short val, unsigned long addr)
{
	long flags;
	__asm__ __volatile__(
	"	rsm	%3,%0\n"
	"	sths	%1,0(%2)\n"
	"	mtsm	%0\n"
	: "=&r" (flags) :  "r" (val), "r" (addr), "i" (PSW_SM_D) );
}

static inline void gsc_writel(unsigned int val, unsigned long addr)
{
	__asm__ __volatile__(
	"	stwas	%0,0(%1)\n"
	: :  "r" (val), "r" (addr) );
}

static inline void gsc_writeq(unsigned long long val, unsigned long addr)
{
#ifdef CONFIG_64BIT
	__asm__ __volatile__(
	"	stda	%0,0(%1)\n"
	: :  "r" (val), "r" (addr) );
#else
	/* two writes may have side effects.. */
	gsc_writel(val >> 32, addr);
	gsc_writel(val, addr+4);
#endif
}

/*
 * The standard PCI ioremap interfaces
 */

extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);

/* Most machines react poorly to I/O-space being cacheable... Instead let's
 * define ioremap() in terms of ioremap_nocache().
 */
static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
{
	return __ioremap(offset, size, _PAGE_NO_CACHE);
}
#define ioremap_nocache(off, sz)	ioremap((off), (sz))
#define ioremap_wc			ioremap_nocache
#define ioremap_uc			ioremap_nocache

extern void iounmap(const volatile void __iomem *addr);

static inline unsigned char __raw_readb(const volatile void __iomem *addr)
{
	return (*(volatile unsigned char __force *) (addr));
}
static inline unsigned short __raw_readw(const volatile void __iomem *addr)
{
	return *(volatile unsigned short __force *) addr;
}
static inline unsigned int __raw_readl(const volatile void __iomem *addr)
{
	return *(volatile unsigned int __force *) addr;
}
static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
{
	return *(volatile unsigned long long __force *) addr;
}

static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
{
	*(volatile unsigned char __force *) addr = b;
}
static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
{
	*(volatile unsigned short __force *) addr = b;
}
static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
{
	*(volatile unsigned int __force *) addr = b;
}
static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
{
	*(volatile unsigned long long __force *) addr = b;
}

static inline unsigned char readb(const volatile void __iomem *addr)
{
	return __raw_readb(addr);
}
static inline unsigned short readw(const volatile void __iomem *addr)
{
	return le16_to_cpu(__raw_readw(addr));
}
static inline unsigned int readl(const volatile void __iomem *addr)
{
	return le32_to_cpu(__raw_readl(addr));
}
static inline unsigned long long readq(const volatile void __iomem *addr)
{
	return le64_to_cpu(__raw_readq(addr));
}

static inline void writeb(unsigned char b, volatile void __iomem *addr)
{
	__raw_writeb(b, addr);
}
static inline void writew(unsigned short w, volatile void __iomem *addr)
{
	__raw_writew(cpu_to_le16(w), addr);
}
static inline void writel(unsigned int l, volatile void __iomem *addr)
{
	__raw_writel(cpu_to_le32(l), addr);
}
static inline void writeq(unsigned long long q, volatile void __iomem *addr)
{
	__raw_writeq(cpu_to_le64(q), addr);
}

#define	readb	readb
#define	readw	readw
#define	readl	readl
#define readq	readq
#define writeb	writeb
#define writew	writew
#define writel	writel
#define writeq	writeq

#define readb_relaxed(addr)	readb(addr)
#define readw_relaxed(addr)	readw(addr)
#define readl_relaxed(addr)	readl(addr)
#define readq_relaxed(addr)	readq(addr)
#define writeb_relaxed(b, addr)	writeb(b, addr)
#define writew_relaxed(w, addr)	writew(w, addr)
#define writel_relaxed(l, addr)	writel(l, addr)
#define writeq_relaxed(q, addr)	writeq(q, addr)

#define mmiowb() do { } while (0)

void memset_io(volatile void __iomem *addr, unsigned char val, int count);
void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
void memcpy_toio(volatile void __iomem *dst, const void *src, int count);

/* Port-space IO */

#define inb_p inb
#define inw_p inw
#define inl_p inl
#define outb_p outb
#define outw_p outw
#define outl_p outl

extern unsigned char eisa_in8(unsigned short port);
extern unsigned short eisa_in16(unsigned short port);
extern unsigned int eisa_in32(unsigned short port);
extern void eisa_out8(unsigned char data, unsigned short port);
extern void eisa_out16(unsigned short data, unsigned short port);
extern void eisa_out32(unsigned int data, unsigned short port);

#if defined(CONFIG_PCI)
extern unsigned char inb(int addr);
extern unsigned short inw(int addr);
extern unsigned int inl(int addr);

extern void outb(unsigned char b, int addr);
extern void outw(unsigned short b, int addr);
extern void outl(unsigned int b, int addr);
#elif defined(CONFIG_EISA)
#define inb eisa_in8
#define inw eisa_in16
#define inl eisa_in32
#define outb eisa_out8
#define outw eisa_out16
#define outl eisa_out32
#else
static inline char inb(unsigned long addr)
{
	BUG();
	return -1;
}

static inline short inw(unsigned long addr)
{
	BUG();
	return -1;
}

static inline int inl(unsigned long addr)
{
	BUG();
	return -1;
}

#define outb(x, y)	BUG()
#define outw(x, y)	BUG()
#define outl(x, y)	BUG()
#endif

/*
 * String versions of in/out ops:
 */
extern void insb (unsigned long port, void *dst, unsigned long count);
extern void insw (unsigned long port, void *dst, unsigned long count);
extern void insl (unsigned long port, void *dst, unsigned long count);
extern void outsb (unsigned long port, const void *src, unsigned long count);
extern void outsw (unsigned long port, const void *src, unsigned long count);
extern void outsl (unsigned long port, const void *src, unsigned long count);


/* IO Port space is :      BBiiii   where BB is HBA number. */
#define IO_SPACE_LIMIT 0x00ffffff

/* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
 * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
 * mode (essentially just sign extending.  This macro takes in a 32
 * bit I/O address (still with the leading f) and outputs the correct
 * value for either 32 or 64 bit mode */
#define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))

#include <asm-generic/iomap.h>

/*
 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
 * access
 */
#define xlate_dev_mem_ptr(p)	__va(p)

/*
 * Convert a virtual cached pointer to an uncached pointer
 */
#define xlate_dev_kmem_ptr(p)	p

#endif
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1da177e4 LT	2	#ifndef _ASM_IO_H
	3	#define _ASM_IO_H
	4
1da177e4 LT	5	#include <linux/types.h>
	6	#include <asm/pgtable.h>
	7
1da177e4 LT	8	#define virt_to_phys(a) ((unsigned long)__pa(a))
	9	#define phys_to_virt(a) __va(a)
	10	#define virt_to_bus virt_to_phys
	11	#define bus_to_virt phys_to_virt
	12
fabb8ff4 KM	13	static inline unsigned long isa_bus_to_virt(unsigned long addr) {
	14	BUG();
	15	return 0;
	16	}
	17
	18	static inline unsigned long isa_virt_to_bus(void *addr) {
	19	BUG();
	20	return 0;
	21	}
	22
1da177e4 LT	23	/*
	24	* Memory mapped I/O
	25	*
	26	* readX()/writeX() do byteswapping and take an ioremapped address
	27	* __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
	28	* gsc_*() don't byteswap and operate on physical addresses;
	29	* eg dev->hpa or 0xfee00000.
	30	*/
	31
1da177e4 LT	32	static inline unsigned char gsc_readb(unsigned long addr)
	33	{
	34	long flags;
	35	unsigned char ret;
	36
1da177e4	37	__asm__ __volatile__(
3f4fb108	38	" rsm %3,%0\n"
1da177e4 LT	39	" ldbx 0(%2),%1\n"
1da177e4 LT	40	" mtsm %0\n"
3f4fb108	41	: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );
1da177e4 LT	42
	43	return ret;
	44	}
	45
	46	static inline unsigned short gsc_readw(unsigned long addr)
	47	{
	48	long flags;
	49	unsigned short ret;
	50
1da177e4	51	__asm__ __volatile__(
3f4fb108	52	" rsm %3,%0\n"
1da177e4 LT	53	" ldhx 0(%2),%1\n"
1da177e4 LT	54	" mtsm %0\n"
3f4fb108	55	: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );
1da177e4 LT	56
	57	return ret;
	58	}
	59
	60	static inline unsigned int gsc_readl(unsigned long addr)
	61	{
	62	u32 ret;
	63
1da177e4 LT	64	__asm__ __volatile__(
	65	" ldwax 0(%1),%0\n"
	66	: "=r" (ret) : "r" (addr) );
	67
	68	return ret;
	69	}
	70
	71	static inline unsigned long long gsc_readq(unsigned long addr)
	72	{
	73	unsigned long long ret;
1da177e4	74
513e7ecd	75	#ifdef CONFIG_64BIT
1da177e4 LT	76	__asm__ __volatile__(
	77	" ldda 0(%1),%0\n"
	78	: "=r" (ret) : "r" (addr) );
	79	#else
	80	/* two reads may have side effects.. */
	81	ret = ((u64) gsc_readl(addr)) << 32;
	82	ret \|= gsc_readl(addr+4);
	83	#endif
	84	return ret;
	85	}
	86
	87	static inline void gsc_writeb(unsigned char val, unsigned long addr)
	88	{
	89	long flags;
1da177e4	90	__asm__ __volatile__(
3f4fb108	91	" rsm %3,%0\n"
1da177e4 LT	92	" stbs %1,0(%2)\n"
1da177e4 LT	93	" mtsm %0\n"
3f4fb108	94	: "=&r" (flags) : "r" (val), "r" (addr), "i" (PSW_SM_D) );
1da177e4 LT	95	}
	96
	97	static inline void gsc_writew(unsigned short val, unsigned long addr)
	98	{
	99	long flags;
1da177e4	100	__asm__ __volatile__(
3f4fb108	101	" rsm %3,%0\n"
1da177e4 LT	102	" sths %1,0(%2)\n"
1da177e4 LT	103	" mtsm %0\n"
3f4fb108	104	: "=&r" (flags) : "r" (val), "r" (addr), "i" (PSW_SM_D) );
1da177e4 LT	105	}
	106
	107	static inline void gsc_writel(unsigned int val, unsigned long addr)
	108	{
1da177e4 LT	109	__asm__ __volatile__(
	110	" stwas %0,0(%1)\n"
	111	: : "r" (val), "r" (addr) );
	112	}
	113
	114	static inline void gsc_writeq(unsigned long long val, unsigned long addr)
	115	{
513e7ecd	116	#ifdef CONFIG_64BIT
1da177e4 LT	117	__asm__ __volatile__(
	118	" stda %0,0(%1)\n"
	119	: : "r" (val), "r" (addr) );
	120	#else
	121	/* two writes may have side effects.. */
	122	gsc_writel(val >> 32, addr);
	123	gsc_writel(val, addr+4);
	124	#endif
	125	}
	126
	127	/*
	128	* The standard PCI ioremap interfaces
	129	*/
	130
	131	extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
	132
1b52d7c2 KM	133	/* Most machines react poorly to I/O-space being cacheable... Instead let's
1b52d7c2 KM	134	* define ioremap() in terms of ioremap_nocache().
1da177e4	135	*/
f13cec84	136	static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
1da177e4	137	{
1b52d7c2	138	return __ioremap(offset, size, _PAGE_NO_CACHE);
1da177e4	139	}
1b52d7c2	140	#define ioremap_nocache(off, sz) ioremap((off), (sz))
38d9029a GR	141	#define ioremap_wc ioremap_nocache
38d9029a GR	142	#define ioremap_uc ioremap_nocache
1da177e4	143
01232e93	144	extern void iounmap(const volatile void __iomem *addr);
1da177e4	145
1da177e4 LT	146	static inline unsigned char __raw_readb(const volatile void __iomem *addr)
	147	{
	148	return ((volatile unsigned char __force ) (addr));
	149	}
	150	static inline unsigned short __raw_readw(const volatile void __iomem *addr)
	151	{
	152	return (volatile unsigned short __force ) addr;
	153	}
	154	static inline unsigned int __raw_readl(const volatile void __iomem *addr)
	155	{
	156	return (volatile unsigned int __force ) addr;
	157	}
	158	static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
	159	{
	160	return (volatile unsigned long long __force ) addr;
	161	}
	162
	163	static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
	164	{
	165	(volatile unsigned char __force ) addr = b;
	166	}
	167	static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
	168	{
	169	(volatile unsigned short __force ) addr = b;
	170	}
	171	static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
	172	{
	173	(volatile unsigned int __force ) addr = b;
	174	}
	175	static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
	176	{
	177	(volatile unsigned long long __force ) addr = b;
	178	}
1da177e4	179
9dfe914d KM	180	static inline unsigned char readb(const volatile void __iomem *addr)
	181	{
	182	return __raw_readb(addr);
	183	}
	184	static inline unsigned short readw(const volatile void __iomem *addr)
	185	{
	186	return le16_to_cpu(__raw_readw(addr));
	187	}
	188	static inline unsigned int readl(const volatile void __iomem *addr)
	189	{
	190	return le32_to_cpu(__raw_readl(addr));
	191	}
	192	static inline unsigned long long readq(const volatile void __iomem *addr)
	193	{
	194	return le64_to_cpu(__raw_readq(addr));
	195	}
	196
	197	static inline void writeb(unsigned char b, volatile void __iomem *addr)
	198	{
	199	__raw_writeb(b, addr);
	200	}
	201	static inline void writew(unsigned short w, volatile void __iomem *addr)
	202	{
	203	__raw_writew(cpu_to_le16(w), addr);
	204	}
	205	static inline void writel(unsigned int l, volatile void __iomem *addr)
	206	{
	207	__raw_writel(cpu_to_le32(l), addr);
	208	}
	209	static inline void writeq(unsigned long long q, volatile void __iomem *addr)
	210	{
	211	__raw_writeq(cpu_to_le64(q), addr);
	212	}
1da177e4	213
0cb385e3 KM	214	#define readb readb
	215	#define readw readw
	216	#define readl readl
	217	#define readq readq
	218	#define writeb writeb
	219	#define writew writew
	220	#define writel writel
	221	#define writeq writeq
	222
2f083481 WD	223	#define readb_relaxed(addr) readb(addr)
	224	#define readw_relaxed(addr) readw(addr)
	225	#define readl_relaxed(addr) readl(addr)
	226	#define readq_relaxed(addr) readq(addr)
	227	#define writeb_relaxed(b, addr) writeb(b, addr)
	228	#define writew_relaxed(w, addr) writew(w, addr)
	229	#define writel_relaxed(l, addr) writel(l, addr)
	230	#define writeq_relaxed(q, addr) writeq(q, addr)
1da177e4 LT	231
	232	#define mmiowb() do { } while (0)
	233
	234	void memset_io(volatile void __iomem *addr, unsigned char val, int count);
	235	void memcpy_fromio(void dst, const volatile void __iomem src, int count);
	236	void memcpy_toio(volatile void __iomem dst, const void src, int count);
	237
1da177e4 LT	238	/* Port-space IO */
	239
	240	#define inb_p inb
	241	#define inw_p inw
	242	#define inl_p inl
	243	#define outb_p outb
	244	#define outw_p outw
	245	#define outl_p outl
	246
	247	extern unsigned char eisa_in8(unsigned short port);
	248	extern unsigned short eisa_in16(unsigned short port);
	249	extern unsigned int eisa_in32(unsigned short port);
	250	extern void eisa_out8(unsigned char data, unsigned short port);
	251	extern void eisa_out16(unsigned short data, unsigned short port);
	252	extern void eisa_out32(unsigned int data, unsigned short port);
	253
	254	#if defined(CONFIG_PCI)
	255	extern unsigned char inb(int addr);
	256	extern unsigned short inw(int addr);
	257	extern unsigned int inl(int addr);
	258
	259	extern void outb(unsigned char b, int addr);
	260	extern void outw(unsigned short b, int addr);
	261	extern void outl(unsigned int b, int addr);
	262	#elif defined(CONFIG_EISA)
	263	#define inb eisa_in8
	264	#define inw eisa_in16
	265	#define inl eisa_in32
	266	#define outb eisa_out8
	267	#define outw eisa_out16
	268	#define outl eisa_out32
	269	#else
	270	static inline char inb(unsigned long addr)
	271	{
	272	BUG();
	273	return -1;
	274	}
	275
	276	static inline short inw(unsigned long addr)
	277	{
	278	BUG();
	279	return -1;
	280	}
	281
	282	static inline int inl(unsigned long addr)
	283	{
	284	BUG();
	285	return -1;
	286	}
	287
	288	#define outb(x, y) BUG()
	289	#define outw(x, y) BUG()
	290	#define outl(x, y) BUG()
	291	#endif
	292
	293	/*
	294	* String versions of in/out ops:
	295	*/
	296	extern void insb (unsigned long port, void *dst, unsigned long count);
	297	extern void insw (unsigned long port, void *dst, unsigned long count);
	298	extern void insl (unsigned long port, void *dst, unsigned long count);
	299	extern void outsb (unsigned long port, const void *src, unsigned long count);
	300	extern void outsw (unsigned long port, const void *src, unsigned long count);
	301	extern void outsl (unsigned long port, const void *src, unsigned long count);
302
303
304	/* IO Port space is : BBiiii where BB is HBA number. */
305	#define IO_SPACE_LIMIT 0x00ffffff
306
1da177e4 LT	307	/* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
	308	* bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
	309	* mode (essentially just sign extending. This macro takes in a 32
	310	* bit I/O address (still with the leading f) and outputs the correct
	311	* value for either 32 or 64 bit mode */
	312	#define F_EXTEND(x) ((unsigned long)((x) \| (0xffffffff00000000ULL)))
	313
	314	#include <asm-generic/iomap.h>
	315
	316	/*
	317	* Convert a physical pointer to a virtual kernel pointer for /dev/mem
	318	* access
	319	*/
	320	#define xlate_dev_mem_ptr(p) __va(p)
	321
	322	/*
	323	* Convert a virtual cached pointer to an uncached pointer
	324	*/
	325	#define xlate_dev_kmem_ptr(p) p
	326
	327	#endif