[linux-block.git] / arch / openrisc / kernel / setup.c

/*
 * OpenRISC setup.c
 *
 * Linux architectural port borrowing liberally from similar works of
 * others.  All original copyrights apply as per the original source
 * declaration.
 *
 * Modifications for the OpenRISC architecture:
 * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
 *
 *      This program is free software; you can redistribute it and/or
 *      modify it under the terms of the GNU General Public License
 *      as published by the Free Software Foundation; either version
 *      2 of the License, or (at your option) any later version.
 *
 * This file handles the architecture-dependent parts of initialization
 */

#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <linux/tty.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/console.h>
#include <linux/init.h>
#include <linux/bootmem.h>
#include <linux/seq_file.h>
#include <linux/serial.h>
#include <linux/initrd.h>
#include <linux/of_fdt.h>
#include <linux/of.h>
#include <linux/memblock.h>
#include <linux/device.h>

#include <asm/sections.h>
#include <asm/segment.h>
#include <asm/pgtable.h>
#include <asm/types.h>
#include <asm/setup.h>
#include <asm/io.h>
#include <asm/cpuinfo.h>
#include <asm/delay.h>

#include "vmlinux.h"

static unsigned long __init setup_memory(void)
{
	unsigned long bootmap_size;
	unsigned long ram_start_pfn;
	unsigned long free_ram_start_pfn;
	unsigned long ram_end_pfn;
	phys_addr_t memory_start, memory_end;
	struct memblock_region *region;

	memory_end = memory_start = 0;

	/* Find main memory where is the kernel */
	for_each_memblock(memory, region) {
		memory_start = region->base;
		memory_end = region->base + region->size;
		printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__,
		       memory_start, memory_end);
	}

	if (!memory_end) {
		panic("No memory!");
	}

	ram_start_pfn = PFN_UP(memory_start);
	/* free_ram_start_pfn is first page after kernel */
	free_ram_start_pfn = PFN_UP(__pa(_end));
	ram_end_pfn = PFN_DOWN(memblock_end_of_DRAM());

	max_pfn = ram_end_pfn;

	/*
	 * initialize the boot-time allocator (with low memory only).
	 *
	 * This makes the memory from the end of the kernel to the end of
	 * RAM usable.
	 * init_bootmem sets the global values min_low_pfn, max_low_pfn.
	 */
	bootmap_size = init_bootmem(free_ram_start_pfn,
				    ram_end_pfn - ram_start_pfn);
	free_bootmem(PFN_PHYS(free_ram_start_pfn),
		     (ram_end_pfn - free_ram_start_pfn) << PAGE_SHIFT);
	reserve_bootmem(PFN_PHYS(free_ram_start_pfn), bootmap_size,
			BOOTMEM_DEFAULT);

	for_each_memblock(reserved, region) {
		printk(KERN_INFO "Reserved - 0x%08x-0x%08x\n",
		       (u32) region->base, (u32) region->size);
		reserve_bootmem(region->base, region->size, BOOTMEM_DEFAULT);
	}

	return ram_end_pfn;
}

struct cpuinfo cpuinfo;

static void print_cpuinfo(void)
{
	unsigned long upr = mfspr(SPR_UPR);
	unsigned long vr = mfspr(SPR_VR);
	unsigned int version;
	unsigned int revision;

	version = (vr & SPR_VR_VER) >> 24;
	revision = (vr & SPR_VR_REV);

	printk(KERN_INFO "CPU: OpenRISC-%x (revision %d) @%d MHz\n",
	       version, revision, cpuinfo.clock_frequency / 1000000);

	if (!(upr & SPR_UPR_UP)) {
		printk(KERN_INFO
		       "-- no UPR register... unable to detect configuration\n");
		return;
	}

	if (upr & SPR_UPR_DCP)
		printk(KERN_INFO
		       "-- dcache: %4d bytes total, %2d bytes/line, %d way(s)\n",
		       cpuinfo.dcache_size, cpuinfo.dcache_block_size, 1);
	else
		printk(KERN_INFO "-- dcache disabled\n");
	if (upr & SPR_UPR_ICP)
		printk(KERN_INFO
		       "-- icache: %4d bytes total, %2d bytes/line, %d way(s)\n",
		       cpuinfo.icache_size, cpuinfo.icache_block_size, 1);
	else
		printk(KERN_INFO "-- icache disabled\n");

	if (upr & SPR_UPR_DMP)
		printk(KERN_INFO "-- dmmu: %4d entries, %lu way(s)\n",
		       1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
		       1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW));
	if (upr & SPR_UPR_IMP)
		printk(KERN_INFO "-- immu: %4d entries, %lu way(s)\n",
		       1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
		       1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW));

	printk(KERN_INFO "-- additional features:\n");
	if (upr & SPR_UPR_DUP)
		printk(KERN_INFO "-- debug unit\n");
	if (upr & SPR_UPR_PCUP)
		printk(KERN_INFO "-- performance counters\n");
	if (upr & SPR_UPR_PMP)
		printk(KERN_INFO "-- power management\n");
	if (upr & SPR_UPR_PICP)
		printk(KERN_INFO "-- PIC\n");
	if (upr & SPR_UPR_TTP)
		printk(KERN_INFO "-- timer\n");
	if (upr & SPR_UPR_CUP)
		printk(KERN_INFO "-- custom unit(s)\n");
}

void __init setup_cpuinfo(void)
{
	struct device_node *cpu;
	unsigned long iccfgr, dccfgr;
	unsigned long cache_set_size, cache_ways;

	cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
	if (!cpu)
		panic("No compatible CPU found in device tree...\n");

	iccfgr = mfspr(SPR_ICCFGR);
	cache_ways = 1 << (iccfgr & SPR_ICCFGR_NCW);
	cache_set_size = 1 << ((iccfgr & SPR_ICCFGR_NCS) >> 3);
	cpuinfo.icache_block_size = 16 << ((iccfgr & SPR_ICCFGR_CBS) >> 7);
	cpuinfo.icache_size =
	    cache_set_size * cache_ways * cpuinfo.icache_block_size;

	dccfgr = mfspr(SPR_DCCFGR);
	cache_ways = 1 << (dccfgr & SPR_DCCFGR_NCW);
	cache_set_size = 1 << ((dccfgr & SPR_DCCFGR_NCS) >> 3);
	cpuinfo.dcache_block_size = 16 << ((dccfgr & SPR_DCCFGR_CBS) >> 7);
	cpuinfo.dcache_size =
	    cache_set_size * cache_ways * cpuinfo.dcache_block_size;

	if (of_property_read_u32(cpu, "clock-frequency",
				 &cpuinfo.clock_frequency)) {
		printk(KERN_WARNING
		       "Device tree missing CPU 'clock-frequency' parameter."
		       "Assuming frequency 25MHZ"
		       "This is probably not what you want.");
	}

	of_node_put(cpu);

	print_cpuinfo();
}

/**
 * or32_early_setup
 *
 * Handles the pointer to the device tree that this kernel is to use
 * for establishing the available platform devices.
 *
 * Falls back on built-in device tree in case null pointer is passed.
 */

void __init or32_early_setup(void *fdt)
{
	if (fdt)
		pr_info("FDT at %p\n", fdt);
	else {
		fdt = __dtb_start;
		pr_info("Compiled-in FDT at %p\n", fdt);
	}
	early_init_devtree(fdt);
}

static inline unsigned long extract_value_bits(unsigned long reg,
					       short bit_nr, short width)
{
	return (reg >> bit_nr) & (0 << width);
}

static inline unsigned long extract_value(unsigned long reg, unsigned long mask)
{
	while (!(mask & 0x1)) {
		reg = reg >> 1;
		mask = mask >> 1;
	}
	return mask & reg;
}

void __init detect_unit_config(unsigned long upr, unsigned long mask,
			       char *text, void (*func) (void))
{
	if (text != NULL)
		printk("%s", text);

	if (upr & mask) {
		if (func != NULL)
			func();
		else
			printk("present\n");
	} else
		printk("not present\n");
}

/*
 * calibrate_delay
 *
 * Lightweight calibrate_delay implementation that calculates loops_per_jiffy
 * from the clock frequency passed in via the device tree
 *
 */

void calibrate_delay(void)
{
	const int *val;
	struct device_node *cpu = NULL;
	cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
	val = of_get_property(cpu, "clock-frequency", NULL);
	if (!val)
		panic("no cpu 'clock-frequency' parameter in device tree");
	loops_per_jiffy = *val / HZ;
	pr_cont("%lu.%02lu BogoMIPS (lpj=%lu)\n",
		loops_per_jiffy / (500000 / HZ),
		(loops_per_jiffy / (5000 / HZ)) % 100, loops_per_jiffy);
}

void __init setup_arch(char **cmdline_p)
{
	unsigned long max_low_pfn;

	unflatten_and_copy_device_tree();

	setup_cpuinfo();

	/* process 1's initial memory region is the kernel code/data */
	init_mm.start_code = (unsigned long)_stext;
	init_mm.end_code = (unsigned long)_etext;
	init_mm.end_data = (unsigned long)_edata;
	init_mm.brk = (unsigned long)_end;

#ifdef CONFIG_BLK_DEV_INITRD
	initrd_start = (unsigned long)&__initrd_start;
	initrd_end = (unsigned long)&__initrd_end;
	if (initrd_start == initrd_end) {
		initrd_start = 0;
		initrd_end = 0;
	}
	initrd_below_start_ok = 1;
#endif

	/* setup bootmem allocator */
	max_low_pfn = setup_memory();

	/* paging_init() sets up the MMU and marks all pages as reserved */
	paging_init();

#if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
	if (!conswitchp)
		conswitchp = &dummy_con;
#endif

	*cmdline_p = boot_command_line;

	printk(KERN_INFO "OpenRISC Linux -- http://openrisc.net\n");
}

static int show_cpuinfo(struct seq_file *m, void *v)
{
	unsigned long vr;
	int version, revision;

	vr = mfspr(SPR_VR);
	version = (vr & SPR_VR_VER) >> 24;
	revision = vr & SPR_VR_REV;

	seq_printf(m,
		   "cpu\t\t: OpenRISC-%x\n"
		   "revision\t: %d\n"
		   "frequency\t: %ld\n"
		   "dcache size\t: %d bytes\n"
		   "dcache block size\t: %d bytes\n"
		   "icache size\t: %d bytes\n"
		   "icache block size\t: %d bytes\n"
		   "immu\t\t: %d entries, %lu ways\n"
		   "dmmu\t\t: %d entries, %lu ways\n"
		   "bogomips\t: %lu.%02lu\n",
		   version,
		   revision,
		   loops_per_jiffy * HZ,
		   cpuinfo.dcache_size,
		   cpuinfo.dcache_block_size,
		   cpuinfo.icache_size,
		   cpuinfo.icache_block_size,
		   1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
		   1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW),
		   1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
		   1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW),
		   (loops_per_jiffy * HZ) / 500000,
		   ((loops_per_jiffy * HZ) / 5000) % 100);

	return 0;
}

static void *c_start(struct seq_file *m, loff_t * pos)
{
	/* We only have one CPU... */
	return *pos < 1 ? (void *)1 : NULL;
}

static void *c_next(struct seq_file *m, void *v, loff_t * pos)
{
	++*pos;
	return NULL;
}

static void c_stop(struct seq_file *m, void *v)
{
}

const struct seq_operations cpuinfo_op = {
	.start = c_start,
	.next = c_next,
	.stop = c_stop,
	.show = show_cpuinfo,
};
Commit	Line	Data
9d02a428 JB	1	/*
	2	* OpenRISC setup.c
	3	*
	4	* Linux architectural port borrowing liberally from similar works of
	5	* others. All original copyrights apply as per the original source
	6	* declaration.
	7	*
	8	* Modifications for the OpenRISC architecture:
	9	* Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
	10	* Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
	11	*
	12	* This program is free software; you can redistribute it and/or
	13	* modify it under the terms of the GNU General Public License
	14	* as published by the Free Software Foundation; either version
	15	* 2 of the License, or (at your option) any later version.
	16	*
	17	* This file handles the architecture-dependent parts of initialization
	18	*/
	19
	20	#include <linux/errno.h>
	21	#include <linux/sched.h>
	22	#include <linux/kernel.h>
	23	#include <linux/mm.h>
	24	#include <linux/stddef.h>
	25	#include <linux/unistd.h>
	26	#include <linux/ptrace.h>
	27	#include <linux/slab.h>
	28	#include <linux/tty.h>
	29	#include <linux/ioport.h>
	30	#include <linux/delay.h>
	31	#include <linux/console.h>
	32	#include <linux/init.h>
	33	#include <linux/bootmem.h>
	34	#include <linux/seq_file.h>
	35	#include <linux/serial.h>
	36	#include <linux/initrd.h>
	37	#include <linux/of_fdt.h>
	38	#include <linux/of.h>
	39	#include <linux/memblock.h>
	40	#include <linux/device.h>
9d02a428	41
be5940c9	42	#include <asm/sections.h>
9d02a428	43	#include <asm/segment.h>
9d02a428 JB	44	#include <asm/pgtable.h>
	45	#include <asm/types.h>
	46	#include <asm/setup.h>
	47	#include <asm/io.h>
	48	#include <asm/cpuinfo.h>
	49	#include <asm/delay.h>
	50
	51	#include "vmlinux.h"
	52
9d02a428 JB	53	static unsigned long __init setup_memory(void)
	54	{
	55	unsigned long bootmap_size;
	56	unsigned long ram_start_pfn;
	57	unsigned long free_ram_start_pfn;
	58	unsigned long ram_end_pfn;
	59	phys_addr_t memory_start, memory_end;
	60	struct memblock_region *region;
	61
	62	memory_end = memory_start = 0;
	63
	64	/* Find main memory where is the kernel */
	65	for_each_memblock(memory, region) {
	66	memory_start = region->base;
	67	memory_end = region->base + region->size;
	68	printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__,
	69	memory_start, memory_end);
	70	}
	71
	72	if (!memory_end) {
	73	panic("No memory!");
	74	}
	75
	76	ram_start_pfn = PFN_UP(memory_start);
	77	/* free_ram_start_pfn is first page after kernel */
be5940c9	78	free_ram_start_pfn = PFN_UP(__pa(_end));
9d02a428 JB	79	ram_end_pfn = PFN_DOWN(memblock_end_of_DRAM());
	80
	81	max_pfn = ram_end_pfn;
	82
	83	/*
	84	* initialize the boot-time allocator (with low memory only).
	85	*
	86	* This makes the memory from the end of the kernel to the end of
	87	* RAM usable.
	88	* init_bootmem sets the global values min_low_pfn, max_low_pfn.
	89	*/
	90	bootmap_size = init_bootmem(free_ram_start_pfn,
	91	ram_end_pfn - ram_start_pfn);
	92	free_bootmem(PFN_PHYS(free_ram_start_pfn),
	93	(ram_end_pfn - free_ram_start_pfn) << PAGE_SHIFT);
	94	reserve_bootmem(PFN_PHYS(free_ram_start_pfn), bootmap_size,
	95	BOOTMEM_DEFAULT);
	96
	97	for_each_memblock(reserved, region) {
	98	printk(KERN_INFO "Reserved - 0x%08x-0x%08x\n",
	99	(u32) region->base, (u32) region->size);
	100	reserve_bootmem(region->base, region->size, BOOTMEM_DEFAULT);
	101	}
	102
	103	return ram_end_pfn;
	104	}
	105
	106	struct cpuinfo cpuinfo;
	107
	108	static void print_cpuinfo(void)
	109	{
	110	unsigned long upr = mfspr(SPR_UPR);
	111	unsigned long vr = mfspr(SPR_VR);
	112	unsigned int version;
	113	unsigned int revision;
	114
	115	version = (vr & SPR_VR_VER) >> 24;
	116	revision = (vr & SPR_VR_REV);
	117
	118	printk(KERN_INFO "CPU: OpenRISC-%x (revision %d) @%d MHz\n",
	119	version, revision, cpuinfo.clock_frequency / 1000000);
	120
	121	if (!(upr & SPR_UPR_UP)) {
	122	printk(KERN_INFO
	123	"-- no UPR register... unable to detect configuration\n");
	124	return;
	125	}
	126
	127	if (upr & SPR_UPR_DCP)
	128	printk(KERN_INFO
	129	"-- dcache: %4d bytes total, %2d bytes/line, %d way(s)\n",
	130	cpuinfo.dcache_size, cpuinfo.dcache_block_size, 1);
	131	else
	132	printk(KERN_INFO "-- dcache disabled\n");
	133	if (upr & SPR_UPR_ICP)
	134	printk(KERN_INFO
	135	"-- icache: %4d bytes total, %2d bytes/line, %d way(s)\n",
	136	cpuinfo.icache_size, cpuinfo.icache_block_size, 1);
	137	else
	138	printk(KERN_INFO "-- icache disabled\n");
	139
	140	if (upr & SPR_UPR_DMP)
	141	printk(KERN_INFO "-- dmmu: %4d entries, %lu way(s)\n",
	142	1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
143	1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW));
144	if (upr & SPR_UPR_IMP)
145	printk(KERN_INFO "-- immu: %4d entries, %lu way(s)\n",
146	1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
147	1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW));
148
149	printk(KERN_INFO "-- additional features:\n");
150	if (upr & SPR_UPR_DUP)
151	printk(KERN_INFO "-- debug unit\n");
152	if (upr & SPR_UPR_PCUP)
153	printk(KERN_INFO "-- performance counters\n");
154	if (upr & SPR_UPR_PMP)
155	printk(KERN_INFO "-- power management\n");
156	if (upr & SPR_UPR_PICP)
157	printk(KERN_INFO "-- PIC\n");
158	if (upr & SPR_UPR_TTP)
159	printk(KERN_INFO "-- timer\n");
160	if (upr & SPR_UPR_CUP)
161	printk(KERN_INFO "-- custom unit(s)\n");
162	}
163
164	void __init setup_cpuinfo(void)
165	{
166	struct device_node *cpu;
167	unsigned long iccfgr, dccfgr;
168	unsigned long cache_set_size, cache_ways;
169
170	cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
171	if (!cpu)
172	panic("No compatible CPU found in device tree...\n");
173
174	iccfgr = mfspr(SPR_ICCFGR);
175	cache_ways = 1 << (iccfgr & SPR_ICCFGR_NCW);
176	cache_set_size = 1 << ((iccfgr & SPR_ICCFGR_NCS) >> 3);
177	cpuinfo.icache_block_size = 16 << ((iccfgr & SPR_ICCFGR_CBS) >> 7);
178	cpuinfo.icache_size =
179	cache_set_size * cache_ways * cpuinfo.icache_block_size;
180
181	dccfgr = mfspr(SPR_DCCFGR);
182	cache_ways = 1 << (dccfgr & SPR_DCCFGR_NCW);
183	cache_set_size = 1 << ((dccfgr & SPR_DCCFGR_NCS) >> 3);
184	cpuinfo.dcache_block_size = 16 << ((dccfgr & SPR_DCCFGR_CBS) >> 7);
185	cpuinfo.dcache_size =
186	cache_set_size * cache_ways * cpuinfo.dcache_block_size;
187
188	if (of_property_read_u32(cpu, "clock-frequency",
189	&cpuinfo.clock_frequency)) {
190	printk(KERN_WARNING
191	"Device tree missing CPU 'clock-frequency' parameter."
192	"Assuming frequency 25MHZ"
193	"This is probably not what you want.");
194	}
195
196	of_node_put(cpu);
197
198	print_cpuinfo();
199	}
200
201	/**
202	* or32_early_setup
203	*
204	* Handles the pointer to the device tree that this kernel is to use
205	* for establishing the available platform devices.
206	*
dec83018	207	* Falls back on built-in device tree in case null pointer is passed.
9d02a428 JB	208	*/
9d02a428 JB	209
621c2cd8	210	void __init or32_early_setup(void *fdt)
9d02a428	211	{
621c2cd8 GU	212	if (fdt)
	213	pr_info("FDT at %p\n", fdt);
	214	else {
	215	fdt = __dtb_start;
	216	pr_info("Compiled-in FDT at %p\n", fdt);
dec83018	217	}
621c2cd8	218	early_init_devtree(fdt);
9d02a428 JB	219	}
9d02a428 JB	220
9d02a428 JB	221	static inline unsigned long extract_value_bits(unsigned long reg,
	222	short bit_nr, short width)
	223	{
	224	return (reg >> bit_nr) & (0 << width);
	225	}
	226
	227	static inline unsigned long extract_value(unsigned long reg, unsigned long mask)
	228	{
	229	while (!(mask & 0x1)) {
	230	reg = reg >> 1;
	231	mask = mask >> 1;
	232	}
	233	return mask & reg;
	234	}
	235
	236	void __init detect_unit_config(unsigned long upr, unsigned long mask,
	237	char text, void (func) (void))
	238	{
	239	if (text != NULL)
	240	printk("%s", text);
	241
	242	if (upr & mask) {
	243	if (func != NULL)
	244	func();
	245	else
	246	printk("present\n");
	247	} else
	248	printk("not present\n");
	249	}
	250
	251	/*
	252	* calibrate_delay
	253	*
	254	* Lightweight calibrate_delay implementation that calculates loops_per_jiffy
	255	* from the clock frequency passed in via the device tree
	256	*
	257	*/
	258
8e8550ef	259	void calibrate_delay(void)
9d02a428 JB	260	{
	261	const int *val;
	262	struct device_node *cpu = NULL;
	263	cpu = of_find_compatible_node(NULL, NULL, "opencores,or1200-rtlsvn481");
	264	val = of_get_property(cpu, "clock-frequency", NULL);
	265	if (!val)
	266	panic("no cpu 'clock-frequency' parameter in device tree");
	267	loops_per_jiffy = *val / HZ;
	268	pr_cont("%lu.%02lu BogoMIPS (lpj=%lu)\n",
	269	loops_per_jiffy / (500000 / HZ),
	270	(loops_per_jiffy / (5000 / HZ)) % 100, loops_per_jiffy);
	271	}
	272
	273	void __init setup_arch(char **cmdline_p)
	274	{
	275	unsigned long max_low_pfn;
	276
3486892f	277	unflatten_and_copy_device_tree();
9d02a428 JB	278
	279	setup_cpuinfo();
	280
	281	/* process 1's initial memory region is the kernel code/data */
be5940c9 GU	282	init_mm.start_code = (unsigned long)_stext;
	283	init_mm.end_code = (unsigned long)_etext;
	284	init_mm.end_data = (unsigned long)_edata;
	285	init_mm.brk = (unsigned long)_end;
9d02a428 JB	286
	287	#ifdef CONFIG_BLK_DEV_INITRD
	288	initrd_start = (unsigned long)&__initrd_start;
	289	initrd_end = (unsigned long)&__initrd_end;
	290	if (initrd_start == initrd_end) {
	291	initrd_start = 0;
	292	initrd_end = 0;
	293	}
	294	initrd_below_start_ok = 1;
	295	#endif
	296
	297	/* setup bootmem allocator */
	298	max_low_pfn = setup_memory();
	299
	300	/* paging_init() sets up the MMU and marks all pages as reserved */
	301	paging_init();
	302
	303	#if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
	304	if (!conswitchp)
	305	conswitchp = &dummy_con;
	306	#endif
	307
bbf28b50	308	*cmdline_p = boot_command_line;
9d02a428 JB	309
	310	printk(KERN_INFO "OpenRISC Linux -- http://openrisc.net\n");
	311	}
	312
	313	static int show_cpuinfo(struct seq_file m, void v)
	314	{
	315	unsigned long vr;
	316	int version, revision;
	317
	318	vr = mfspr(SPR_VR);
	319	version = (vr & SPR_VR_VER) >> 24;
	320	revision = vr & SPR_VR_REV;
	321
58a1aa7c JP	322	seq_printf(m,
	323	"cpu\t\t: OpenRISC-%x\n"
	324	"revision\t: %d\n"
	325	"frequency\t: %ld\n"
	326	"dcache size\t: %d bytes\n"
	327	"dcache block size\t: %d bytes\n"
	328	"icache size\t: %d bytes\n"
	329	"icache block size\t: %d bytes\n"
	330	"immu\t\t: %d entries, %lu ways\n"
	331	"dmmu\t\t: %d entries, %lu ways\n"
	332	"bogomips\t: %lu.%02lu\n",
	333	version,
	334	revision,
	335	loops_per_jiffy * HZ,
	336	cpuinfo.dcache_size,
	337	cpuinfo.dcache_block_size,
	338	cpuinfo.icache_size,
	339	cpuinfo.icache_block_size,
	340	1 << ((mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTS) >> 2),
	341	1 + (mfspr(SPR_DMMUCFGR) & SPR_DMMUCFGR_NTW),
	342	1 << ((mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTS) >> 2),
	343	1 + (mfspr(SPR_IMMUCFGR) & SPR_IMMUCFGR_NTW),
	344	(loops_per_jiffy * HZ) / 500000,
	345	((loops_per_jiffy * HZ) / 5000) % 100);
	346
	347	return 0;
9d02a428 JB	348	}
	349
	350	static void c_start(struct seq_file m, loff_t * pos)
	351	{
	352	/* We only have one CPU... */
	353	return pos < 1 ? (void )1 : NULL;
	354	}
	355
	356	static void c_next(struct seq_file m, void v, loff_t pos)
	357	{
	358	++*pos;
	359	return NULL;
	360	}
	361
	362	static void c_stop(struct seq_file m, void v)
	363	{
	364	}
	365
	366	const struct seq_operations cpuinfo_op = {
	367	.start = c_start,
	368	.next = c_next,
	369	.stop = c_stop,
	370	.show = show_cpuinfo,
	371	};