[linux-2.6-block.git] / arch / nios2 / mm / dma-mapping.c

/*
 * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
 * Copyright (C) 2009 Wind River Systems Inc
 *  Implemented by fredrik.markstrom@gmail.com and ivarholmqvist@gmail.com
 *
 * Based on DMA code from MIPS.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/types.h>
#include <linux/mm.h>
#include <linux/string.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>
#include <linux/cache.h>
#include <asm/cacheflush.h>

void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
		size_t size, enum dma_data_direction dir)
{
	void *vaddr = phys_to_virt(paddr);

	switch (dir) {
	case DMA_FROM_DEVICE:
		invalidate_dcache_range((unsigned long)vaddr,
			(unsigned long)(vaddr + size));
		break;
	case DMA_TO_DEVICE:
		/*
		 * We just need to flush the caches here , but Nios2 flush
		 * instruction will do both writeback and invalidate.
		 */
	case DMA_BIDIRECTIONAL: /* flush and invalidate */
		flush_dcache_range((unsigned long)vaddr,
			(unsigned long)(vaddr + size));
		break;
	default:
		BUG();
	}
}

void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
		size_t size, enum dma_data_direction dir)
{
	void *vaddr = phys_to_virt(paddr);

	switch (dir) {
	case DMA_BIDIRECTIONAL:
	case DMA_FROM_DEVICE:
		invalidate_dcache_range((unsigned long)vaddr,
			(unsigned long)(vaddr + size));
		break;
	case DMA_TO_DEVICE:
		break;
	default:
		BUG();
	}
}

void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
		gfp_t gfp, unsigned long attrs)
{
	void *ret;

	/* optimized page clearing */
	gfp |= __GFP_ZERO;

	if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff))
		gfp |= GFP_DMA;

	ret = (void *) __get_free_pages(gfp, get_order(size));
	if (ret != NULL) {
		*dma_handle = virt_to_phys(ret);
		flush_dcache_range((unsigned long) ret,
			(unsigned long) ret + size);
		ret = UNCAC_ADDR(ret);
	}

	return ret;
}

void arch_dma_free(struct device *dev, size_t size, void *vaddr,
		dma_addr_t dma_handle, unsigned long attrs)
{
	unsigned long addr = (unsigned long) CAC_ADDR((unsigned long) vaddr);

	free_pages(addr, get_order(size));
}
Commit	Line	Data
e23c621f LFT	1	/*
	2	* Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
	3	* Copyright (C) 2009 Wind River Systems Inc
	4	* Implemented by fredrik.markstrom@gmail.com and ivarholmqvist@gmail.com
	5	*
	6	* Based on DMA code from MIPS.
	7	*
	8	* This file is subject to the terms and conditions of the GNU General Public
	9	* License. See the file "COPYING" in the main directory of this archive
	10	* for more details.
	11	*/
	12
	13	#include <linux/types.h>
	14	#include <linux/mm.h>
e23c621f	15	#include <linux/string.h>
e23c621f LFT	16	#include <linux/dma-mapping.h>
	17	#include <linux/io.h>
	18	#include <linux/cache.h>
	19	#include <asm/cacheflush.h>
	20
25622e04 CH	21	void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
25622e04 CH	22	size_t size, enum dma_data_direction dir)
5a1a67f1	23	{
25622e04 CH	24	void *vaddr = phys_to_virt(paddr);
	25
	26	switch (dir) {
5a1a67f1 CH	27	case DMA_FROM_DEVICE:
	28	invalidate_dcache_range((unsigned long)vaddr,
	29	(unsigned long)(vaddr + size));
	30	break;
	31	case DMA_TO_DEVICE:
	32	/*
	33	* We just need to flush the caches here , but Nios2 flush
	34	* instruction will do both writeback and invalidate.
	35	*/
	36	case DMA_BIDIRECTIONAL: /* flush and invalidate */
	37	flush_dcache_range((unsigned long)vaddr,
	38	(unsigned long)(vaddr + size));
	39	break;
	40	default:
	41	BUG();
	42	}
	43	}
e23c621f	44
25622e04 CH	45	void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
25622e04 CH	46	size_t size, enum dma_data_direction dir)
5a1a67f1	47	{
25622e04 CH	48	void *vaddr = phys_to_virt(paddr);
	49
	50	switch (dir) {
5a1a67f1 CH	51	case DMA_BIDIRECTIONAL:
	52	case DMA_FROM_DEVICE:
	53	invalidate_dcache_range((unsigned long)vaddr,
	54	(unsigned long)(vaddr + size));
	55	break;
	56	case DMA_TO_DEVICE:
	57	break;
	58	default:
	59	BUG();
	60	}
	61	}
	62
25622e04 CH	63	void arch_dma_alloc(struct device dev, size_t size, dma_addr_t *dma_handle,
25622e04 CH	64	gfp_t gfp, unsigned long attrs)
e23c621f LFT	65	{
	66	void *ret;
	67
e23c621f LFT	68	/* optimized page clearing */
	69	gfp \|= __GFP_ZERO;
	70
	71	if (dev == NULL \|\| (dev->coherent_dma_mask < 0xffffffff))
	72	gfp \|= GFP_DMA;
	73
	74	ret = (void *) __get_free_pages(gfp, get_order(size));
	75	if (ret != NULL) {
	76	*dma_handle = virt_to_phys(ret);
	77	flush_dcache_range((unsigned long) ret,
	78	(unsigned long) ret + size);
	79	ret = UNCAC_ADDR(ret);
	80	}
	81
	82	return ret;
	83	}
e23c621f	84
25622e04	85	void arch_dma_free(struct device dev, size_t size, void vaddr,
00085f1e	86	dma_addr_t dma_handle, unsigned long attrs)
e23c621f LFT	87	{
	88	unsigned long addr = (unsigned long) CAC_ADDR((unsigned long) vaddr);
	89
	90	free_pages(addr, get_order(size));
	91	}