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Merge tag 'for-linux-6.12-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-block.git] / arch / mips / txx9 / generic / setup.c
CommitLineData
89d63fe1 1/*
89d63fe1
AN		 2 * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
3 * and RBTX49xx patch from CELF patch archive.
4 *
5 * 2003-2005 (c) MontaVista Software, Inc.
6 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/types.h>
edcaf1a6
AN		 15#include <linux/interrupt.h>
16#include <linux/string.h>
26dd3e4f 17#include <linux/export.h>
44ce9a9a
GU		 18#include <linux/clk-provider.h>
19#include <linux/clkdev.h>
edcaf1a6 20#include <linux/err.h>
be7658f7 21#include <linux/gpio/driver.h>
68314725 22#include <linux/platform_device.h>
dc2865ac 23#include <linux/platform_data/txx9/ndfmc.h>
7779a5e0 24#include <linux/serial_core.h>
51f607c7 25#include <linux/mtd/physmap.h>
ae027ead 26#include <linux/leds.h>
269a3eb1 27#include <linux/device.h>
5a0e3ad6 28#include <linux/slab.h>
62e59c4e 29#include <linux/io.h>
ca4d3e67 30#include <linux/irq.h>
edcaf1a6 31#include <asm/bootinfo.h>
bdc92d74 32#include <asm/idle.h>
e0eb7307 33#include <asm/time.h>
a49297e8 34#include <asm/reboot.h>
d10e025f 35#include <asm/r4kcache.h>
5c93316c 36#include <asm/setup.h>
89d63fe1 37#include <asm/txx9/generic.h>
07517529 38#include <asm/txx9/pci.h>
496a3b5c 39#include <asm/txx9tmr.h>
f48c8c95 40#include <asm/txx9/dmac.h>
edcaf1a6
AN		 41#ifdef CONFIG_CPU_TX49XX
42#include <asm/txx9/tx4938.h>
43#endif
89d63fe1
AN		 44
45/* EBUSC settings of TX4927, etc. */
46struct resource txx9_ce_res[8];
47static char txx9_ce_res_name[8][4]; /* "CEn" */
48
49/* pcode, internal register */
94a4c329 50unsigned int txx9_pcode;
89d63fe1
AN		 51char txx9_pcode_str[8];
52static struct resource txx9_reg_res = {
53 .name = txx9_pcode_str,
54 .flags = IORESOURCE_MEM,
55};
56void __init
57txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
58{
59 int i;
60
61 for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
62 sprintf(txx9_ce_res_name[i], "CE%d", i);
63 txx9_ce_res[i].flags = IORESOURCE_MEM;
64 txx9_ce_res[i].name = txx9_ce_res_name[i];
65 }
66
073828d0 67 txx9_pcode = pcode;
89d63fe1
AN		 68 sprintf(txx9_pcode_str, "TX%x", pcode);
69 if (base) {
70 txx9_reg_res.start = base & 0xfffffffffULL;
71 txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
72 request_resource(&iomem_resource, &txx9_reg_res);
73 }
74}
75
76/* clocks */
77unsigned int txx9_master_clock;
78unsigned int txx9_cpu_clock;
79unsigned int txx9_gbus_clock;
edcaf1a6 80
94a4c329 81int txx9_ccfg_toeon __initdata = 1;
edcaf1a6 82
860e546c
AN		 83#define BOARD_VEC(board) extern struct txx9_board_vec board;
84#include <asm/txx9/boards.h>
85#undef BOARD_VEC
edcaf1a6 86
edcaf1a6
AN		 87struct txx9_board_vec *txx9_board_vec __initdata;
88static char txx9_system_type[32];
89
860e546c
AN		 90static struct txx9_board_vec *board_vecs[] __initdata = {
91#define BOARD_VEC(board) &board,
92#include <asm/txx9/boards.h>
93#undef BOARD_VEC
94};
95
96static struct txx9_board_vec *__init find_board_byname(const char *name)
97{
98 int i;
99
100 /* search board_vecs table */
101 for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
102 if (strstr(board_vecs[i]->system, name))
103 return board_vecs[i];
104 }
105 return NULL;
106}
107
e0dfb20c 108static void __init prom_init_cmdline(void)
edcaf1a6 109{
97b0511c
GU		 110 int argc;
111 int *argv32;
edcaf1a6
AN		 112 int i; /* Always ignore the "-c" at argv[0] */
113
97b0511c
GU		 114 if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
115 /*
116 * argc is not a valid number, or argv32 is not a valid
117 * pointer
118 */
119 argc = 0;
120 argv32 = NULL;
121 } else {
122 argc = (int)fw_arg0;
123 argv32 = (int *)fw_arg1;
124 }
125
e0dfb20c 126 arcs_cmdline[0] = '\0';
edcaf1a6
AN		 127
128 for (i = 1; i < argc; i++) {
e0dfb20c 129 char *str = (char *)(long)argv32[i];
edcaf1a6
AN		 130 if (i != 1)
131 strcat(arcs_cmdline, " ");
e0dfb20c
AN		 132 if (strchr(str, ' ')) {
133 strcat(arcs_cmdline, "\"");
134 strcat(arcs_cmdline, str);
135 strcat(arcs_cmdline, "\"");
136 } else
137 strcat(arcs_cmdline, str);
138 }
edcaf1a6
AN		 139}
140
d10e025f
AN		 141static int txx9_ic_disable __initdata;
142static int txx9_dc_disable __initdata;
143
144#if defined(CONFIG_CPU_TX49XX)
145/* flush all cache on very early stage (before 4k_cache_init) */
146static void __init early_flush_dcache(void)
147{
148 unsigned int conf = read_c0_config();
149 unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
150 unsigned int linesz = 32;
151 unsigned long addr, end;
152
153 end = INDEX_BASE + dc_size / 4;
154 /* 4way, waybit=0 */
155 for (addr = INDEX_BASE; addr < end; addr += linesz) {
156 cache_op(Index_Writeback_Inv_D, addr | 0);
157 cache_op(Index_Writeback_Inv_D, addr | 1);
158 cache_op(Index_Writeback_Inv_D, addr | 2);
159 cache_op(Index_Writeback_Inv_D, addr | 3);
160 }
161}
162
163static void __init txx9_cache_fixup(void)
164{
165 unsigned int conf;
166
167 conf = read_c0_config();
168 /* flush and disable */
169 if (txx9_ic_disable) {
170 conf |= TX49_CONF_IC;
171 write_c0_config(conf);
172 }
173 if (txx9_dc_disable) {
174 early_flush_dcache();
175 conf |= TX49_CONF_DC;
176 write_c0_config(conf);
177 }
178
179 /* enable cache */
180 conf = read_c0_config();
181 if (!txx9_ic_disable)
182 conf &= ~TX49_CONF_IC;
183 if (!txx9_dc_disable)
184 conf &= ~TX49_CONF_DC;
185 write_c0_config(conf);
186
187 if (conf & TX49_CONF_IC)
188 pr_info("TX49XX I-Cache disabled.\n");
189 if (conf & TX49_CONF_DC)
190 pr_info("TX49XX D-Cache disabled.\n");
191}
d10e025f
AN		 192#else
193static inline void txx9_cache_fixup(void)
194{
195}
196#endif
197
860e546c 198static void __init preprocess_cmdline(void)
edcaf1a6 199{
7580c9c3 200 static char cmdline[COMMAND_LINE_SIZE] __initdata;
860e546c
AN		 201 char *s;
202
203 strcpy(cmdline, arcs_cmdline);
204 s = cmdline;
205 arcs_cmdline[0] = '\0';
206 while (s && *s) {
207 char *str = strsep(&s, " ");
208 if (strncmp(str, "board=", 6) == 0) {
209 txx9_board_vec = find_board_byname(str + 6);
210 continue;
211 } else if (strncmp(str, "masterclk=", 10) == 0) {
8e9ecbc5
DW		 212 unsigned int val;
213 if (kstrtouint(str + 10, 10, &val) == 0)
860e546c
AN		 214 txx9_master_clock = val;
215 continue;
d10e025f
AN		 216 } else if (strcmp(str, "icdisable") == 0) {
217 txx9_ic_disable = 1;
218 continue;
219 } else if (strcmp(str, "dcdisable") == 0) {
220 txx9_dc_disable = 1;
221 continue;
c7b95bcb
AN		 222 } else if (strcmp(str, "toeoff") == 0) {
223 txx9_ccfg_toeon = 0;
224 continue;
225 } else if (strcmp(str, "toeon") == 0) {
226 txx9_ccfg_toeon = 1;
227 continue;
860e546c
AN		 228 }
229 if (arcs_cmdline[0])
230 strcat(arcs_cmdline, " ");
231 strcat(arcs_cmdline, str);
232 }
d10e025f
AN		 233
234 txx9_cache_fixup();
860e546c
AN		 235}
236
237static void __init select_board(void)
238{
239 const char *envstr;
240
241 /* first, determine by "board=" argument in preprocess_cmdline() */
242 if (txx9_board_vec)
243 return;
244 /* next, determine by "board" envvar */
245 envstr = prom_getenv("board");
246 if (envstr) {
247 txx9_board_vec = find_board_byname(envstr);
248 if (txx9_board_vec)
249 return;
250 }
251
252 /* select "default" board */
edcaf1a6
AN		 253#ifdef CONFIG_CPU_TX49XX
254 switch (TX4938_REV_PCODE()) {
8d795f2a 255#ifdef CONFIG_TOSHIBA_RBTX4927
edcaf1a6 256 case 0x4927:
7a1fdf19 257 txx9_board_vec = &rbtx4927_vec;
edcaf1a6
AN		 258 break;
259 case 0x4937:
7a1fdf19 260 txx9_board_vec = &rbtx4937_vec;
edcaf1a6 261 break;
8d795f2a 262#endif
edcaf1a6
AN		 263 }
264#endif
860e546c
AN		 265}
266
267void __init prom_init(void)
268{
269 prom_init_cmdline();
270 preprocess_cmdline();
271 select_board();
7a1fdf19
YY		 272
273 strcpy(txx9_system_type, txx9_board_vec->system);
274
7b226094 275 txx9_board_vec->prom_init();
edcaf1a6
AN		 276}
277
edcaf1a6
AN		 278const char *get_system_type(void)
279{
280 return txx9_system_type;
281}
282
265b89db
AN		 283const char *__init prom_getenv(const char *name)
284{
97b0511c 285 const s32 *str;
265b89db 286
97b0511c 287 if (fw_arg2 < CKSEG0)
265b89db 288 return NULL;
97b0511c
GU		 289
290 str = (const s32 *)fw_arg2;
265b89db
AN		 291 /* YAMON style ("name", "value" pairs) */
292 while (str[0] && str[1]) {
293 if (!strcmp((const char *)(unsigned long)str[0], name))
294 return (const char *)(unsigned long)str[1];
295 str += 2;
296 }
297 return NULL;
298}
299
a49297e8
AN		 300static void __noreturn txx9_machine_halt(void)
301{
302 local_irq_disable();
303 clear_c0_status(ST0_IM);
304 while (1) {
305 if (cpu_wait) {
306 (*cpu_wait)();
307 if (cpu_has_counter) {
308 /*
309 * Clear counter interrupt while it
310 * breaks WAIT instruction even if
311 * masked.
312 */
313 write_c0_compare(0);
314 }
315 }
316 }
317}
318
68314725
AN		 319/* Watchdog support */
320void __init txx9_wdt_init(unsigned long base)
321{
322 struct resource res = {
323 .start = base,
324 .end = base + 0x100 - 1,
325 .flags = IORESOURCE_MEM,
326 };
327 platform_device_register_simple("txx9wdt", -1, &res, 1);
328}
329
496a3b5c
AN		 330void txx9_wdt_now(unsigned long base)
331{
332 struct txx9_tmr_reg __iomem *tmrptr =
333 ioremap(base, sizeof(struct txx9_tmr_reg));
334 /* disable watch dog timer */
335 __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
336 __raw_writel(0, &tmrptr->tcr);
337 /* kick watchdog */
338 __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
339 __raw_writel(1, &tmrptr->cpra); /* immediate */
340 __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
341 &tmrptr->tcr);
342}
343
c49f91f5
AN		 344/* SPI support */
345void __init txx9_spi_init(int busid, unsigned long base, int irq)
346{
347 struct resource res[] = {
348 {
349 .start = base,
350 .end = base + 0x20 - 1,
351 .flags = IORESOURCE_MEM,
352 }, {
353 .start = irq,
354 .flags = IORESOURCE_IRQ,
355 },
356 };
357 platform_device_register_simple("spi_txx9", busid,
358 res, ARRAY_SIZE(res));
359}
360
361void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
362{
363 struct platform_device *pdev =
364 platform_device_alloc("tc35815-mac", id);
365 if (!pdev ||
366 platform_device_add_data(pdev, ethaddr, 6) ||
367 platform_device_add(pdev))
368 platform_device_put(pdev);
369}
370
7779a5e0
AN		 371void __init txx9_sio_init(unsigned long baseaddr, int irq,
372 unsigned int line, unsigned int sclk, int nocts)
373{
374#ifdef CONFIG_SERIAL_TXX9
375 struct uart_port req;
376
377 memset(&req, 0, sizeof(req));
378 req.line = line;
379 req.iotype = UPIO_MEM;
380 req.membase = ioremap(baseaddr, 0x24);
381 req.mapbase = baseaddr;
382 req.irq = irq;
383 if (!nocts)
384 req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
385 if (sclk) {
386 req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
387 req.uartclk = sclk;
388 } else
389 req.uartclk = TXX9_IMCLK;
390 early_serial_txx9_setup(&req);
391#endif /* CONFIG_SERIAL_TXX9 */
392}
393
e352953c 394#ifdef CONFIG_EARLY_PRINTK
f7be4e75 395static void null_prom_putchar(char c)
e352953c
AN		 396{
397}
f7be4e75 398void (*txx9_prom_putchar)(char c) = null_prom_putchar;
e352953c 399
f7be4e75 400void prom_putchar(char c)
e352953c
AN		 401{
402 txx9_prom_putchar(c);
403}
404
405static void __iomem *early_txx9_sio_port;
406
f7be4e75 407static void early_txx9_sio_putchar(char c)
e352953c
AN		 408{
409#define TXX9_SICISR 0x0c
410#define TXX9_SITFIFO 0x1c
411#define TXX9_SICISR_TXALS 0x00000002
412 while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
413 TXX9_SICISR_TXALS))
414 ;
415 __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
416}
417
418void __init txx9_sio_putchar_init(unsigned long baseaddr)
419{
420 early_txx9_sio_port = ioremap(baseaddr, 0x24);
421 txx9_prom_putchar = early_txx9_sio_putchar;
422}
423#endif /* CONFIG_EARLY_PRINTK */
424
edcaf1a6
AN		 425/* wrappers */
426void __init plat_mem_setup(void)
427{
94a4c329
AN		 428 ioport_resource.start = 0;
429 ioport_resource.end = ~0UL; /* no limit */
430 iomem_resource.start = 0;
431 iomem_resource.end = ~0UL; /* no limit */
a49297e8
AN		 432
433 /* fallback restart/halt routines */
434 _machine_restart = (void (*)(char *))txx9_machine_halt;
435 _machine_halt = txx9_machine_halt;
436 pm_power_off = txx9_machine_halt;
437
07517529
AN		 438#ifdef CONFIG_PCI
439 pcibios_plat_setup = txx9_pcibios_setup;
440#endif
edcaf1a6
AN		 441 txx9_board_vec->mem_setup();
442}
443
444void __init arch_init_irq(void)
445{
446 txx9_board_vec->irq_setup();
447}
448
449void __init plat_time_init(void)
450{
1374d084
AN		 451#ifdef CONFIG_CPU_TX49XX
452 mips_hpt_frequency = txx9_cpu_clock / 2;
453#endif
edcaf1a6
AN		 454 txx9_board_vec->time_init();
455}
456
44ce9a9a
GU		 457static void txx9_clk_init(void)
458{
459 struct clk_hw *hw;
460 int error;
461
462 hw = clk_hw_register_fixed_rate(NULL, "gbus", NULL, 0, txx9_gbus_clock);
463 if (IS_ERR(hw)) {
464 error = PTR_ERR(hw);
465 goto fail;
466 }
467
468 hw = clk_hw_register_fixed_factor(NULL, "imbus", "gbus", 0, 1, 2);
469 error = clk_hw_register_clkdev(hw, "imbus_clk", NULL);
470 if (error)
471 goto fail;
472
473#ifdef CONFIG_CPU_TX49XX
474 if (TX4938_REV_PCODE() == 0x4938) {
475 hw = clk_hw_register_fixed_factor(NULL, "spi", "gbus", 0, 1, 4);
476 error = clk_hw_register_clkdev(hw, "spi-baseclk", NULL);
477 if (error)
478 goto fail;
479 }
480#endif
481
482 return;
483
484fail:
485 pr_err("Failed to register clocks: %d\n", error);
486}
487
edcaf1a6
AN		 488static int __init _txx9_arch_init(void)
489{
44ce9a9a
GU		 490 txx9_clk_init();
491
edcaf1a6
AN		 492 if (txx9_board_vec->arch_init)
493 txx9_board_vec->arch_init();
494 return 0;
495}
496arch_initcall(_txx9_arch_init);
497
498static int __init _txx9_device_init(void)
499{
500 if (txx9_board_vec->device_init)
501 txx9_board_vec->device_init();
502 return 0;
503}
504device_initcall(_txx9_device_init);
505
506int (*txx9_irq_dispatch)(int pending);
507asmlinkage void plat_irq_dispatch(void)
508{
509 int pending = read_c0_status() & read_c0_cause() & ST0_IM;
510 int irq = txx9_irq_dispatch(pending);
511
512 if (likely(irq >= 0))
513 do_IRQ(irq);
514 else
515 spurious_interrupt();
516}
4c642f3f
AN		 517
518/* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
519#ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
520static unsigned long __swizzle_addr_none(unsigned long port)
521{
522 return port;
523}
524unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
525EXPORT_SYMBOL(__swizzle_addr_b);
526#endif
51f607c7
AN		 527
528void __init txx9_physmap_flash_init(int no, unsigned long addr,
529 unsigned long size,
530 const struct physmap_flash_data *pdata)
531{
b33b4407 532#if IS_ENABLED(CONFIG_MTD_PHYSMAP)
51f607c7
AN		 533 struct resource res = {
534 .start = addr,
535 .end = addr + size - 1,
536 .flags = IORESOURCE_MEM,
537 };
538 struct platform_device *pdev;
51f607c7
AN		 539 static struct mtd_partition parts[2];
540 struct physmap_flash_data pdata_part;
541
542 /* If this area contained boot area, make separate partition */
543 if (pdata->nr_parts == 0 && !pdata->parts &&
544 addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
545 !parts[0].name) {
546 parts[0].name = "boot";
547 parts[0].offset = 0x1fc00000 - addr;
548 parts[0].size = addr + size - 0x1fc00000;
549 parts[1].name = "user";
550 parts[1].offset = 0;
551 parts[1].size = 0x1fc00000 - addr;
552 pdata_part = *pdata;
553 pdata_part.nr_parts = ARRAY_SIZE(parts);
554 pdata_part.parts = parts;
555 pdata = &pdata_part;
556 }
47854888 557
51f607c7
AN		 558 pdev = platform_device_alloc("physmap-flash", no);
559 if (!pdev ||
560 platform_device_add_resources(pdev, &res, 1) ||
a591f5d3
AN		 561 platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
562 platform_device_add(pdev))
563 platform_device_put(pdev);
564#endif
565}
566
567void __init txx9_ndfmc_init(unsigned long baseaddr,
568 const struct txx9ndfmc_platform_data *pdata)
569{
b33b4407 570#if IS_ENABLED(CONFIG_MTD_NAND_TXX9NDFMC)
a591f5d3
AN		 571 struct resource res = {
572 .start = baseaddr,
573 .end = baseaddr + 0x1000 - 1,
574 .flags = IORESOURCE_MEM,
575 };
576 struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1);
577
578 if (!pdev ||
579 platform_device_add_resources(pdev, &res, 1) ||
51f607c7
AN		 580 platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
581 platform_device_add(pdev))
582 platform_device_put(pdev);
583#endif
584}
ae027ead 585
b33b4407 586#if IS_ENABLED(CONFIG_LEDS_GPIO)
ae027ead
AN		 587static DEFINE_SPINLOCK(txx9_iocled_lock);
588
589#define TXX9_IOCLED_MAXLEDS 8
590
591struct txx9_iocled_data {
592 struct gpio_chip chip;
593 u8 cur_val;
594 void __iomem *mmioaddr;
595 struct gpio_led_platform_data pdata;
596 struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
597 char names[TXX9_IOCLED_MAXLEDS][32];
598};
599
600static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
601{
be7658f7 602 struct txx9_iocled_data *data = gpiochip_get_data(chip);
8cbe4b5c 603 return !!(data->cur_val & (1 << offset));
ae027ead
AN		 604}
605
606static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
607 int value)
608{
be7658f7 609 struct txx9_iocled_data *data = gpiochip_get_data(chip);
ae027ead
AN		 610 unsigned long flags;
611 spin_lock_irqsave(&txx9_iocled_lock, flags);
612 if (value)
613 data->cur_val |= 1 << offset;
614 else
615 data->cur_val &= ~(1 << offset);
616 writeb(data->cur_val, data->mmioaddr);
617 mmiowb();
618 spin_unlock_irqrestore(&txx9_iocled_lock, flags);
619}
620
621static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
622{
623 return 0;
624}
625
626static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
627 int value)
628{
629 txx9_iocled_set(chip, offset, value);
630 return 0;
631}
632
633void __init txx9_iocled_init(unsigned long baseaddr,
634 int basenum, unsigned int num, int lowactive,
635 const char *color, char **deftriggers)
636{
637 struct txx9_iocled_data *iocled;
638 struct platform_device *pdev;
639 int i;
640 static char *default_triggers[] __initdata = {
641 "heartbeat",
dde00512 642 "disk-activity",
ae027ead
AN		 643 "nand-disk",
644 NULL,
645 };
646
647 if (!deftriggers)
648 deftriggers = default_triggers;
649 iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
650 if (!iocled)
651 return;
652 iocled->mmioaddr = ioremap(baseaddr, 1);
653 if (!iocled->mmioaddr)
70ebadc8 654 goto out_free;
ae027ead
AN		 655 iocled->chip.get = txx9_iocled_get;
656 iocled->chip.set = txx9_iocled_set;
657 iocled->chip.direction_input = txx9_iocled_dir_in;
658 iocled->chip.direction_output = txx9_iocled_dir_out;
659 iocled->chip.label = "iocled";
660 iocled->chip.base = basenum;
661 iocled->chip.ngpio = num;
be7658f7 662 if (gpiochip_add_data(&iocled->chip, iocled))
70ebadc8 663 goto out_unmap;
ae027ead
AN		 664 if (basenum < 0)
665 basenum = iocled->chip.base;
666
667 pdev = platform_device_alloc("leds-gpio", basenum);
668 if (!pdev)
70ebadc8 669 goto out_gpio;
ae027ead
AN		 670 iocled->pdata.num_leds = num;
671 iocled->pdata.leds = iocled->leds;
672 for (i = 0; i < num; i++) {
673 struct gpio_led *led = &iocled->leds[i];
674 snprintf(iocled->names[i], sizeof(iocled->names[i]),
675 "iocled:%s:%u", color, i);
676 led->name = iocled->names[i];
677 led->gpio = basenum + i;
678 led->active_low = lowactive;
679 if (deftriggers && *deftriggers)
680 led->default_trigger = *deftriggers++;
681 }
682 pdev->dev.platform_data = &iocled->pdata;
683 if (platform_device_add(pdev))
70ebadc8
JL		 684 goto out_pdev;
685 return;
88d5e520 686
70ebadc8
JL		 687out_pdev:
688 platform_device_put(pdev);
689out_gpio:
88d5e520 690 gpiochip_remove(&iocled->chip);
70ebadc8
JL		 691out_unmap:
692 iounmap(iocled->mmioaddr);
693out_free:
694 kfree(iocled);
ae027ead
AN		 695}
696#else /* CONFIG_LEDS_GPIO */
697void __init txx9_iocled_init(unsigned long baseaddr,
698 int basenum, unsigned int num, int lowactive,
699 const char *color, char **deftriggers)
700{
701}
702#endif /* CONFIG_LEDS_GPIO */
f48c8c95
AN		 703
704void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq,
705 const struct txx9dmac_platform_data *pdata)
706{
b33b4407 707#if IS_ENABLED(CONFIG_TXX9_DMAC)
f48c8c95
AN		 708 struct resource res[] = {
709 {
710 .start = baseaddr,
711 .end = baseaddr + 0x800 - 1,
712 .flags = IORESOURCE_MEM,
713#ifndef CONFIG_MACH_TX49XX
714 }, {
715 .start = irq,
716 .flags = IORESOURCE_IRQ,
717#endif
718 }
719 };
720#ifdef CONFIG_MACH_TX49XX
721 struct resource chan_res[] = {
722 {
723 .flags = IORESOURCE_IRQ,
724 }
725 };
726#endif
727 struct platform_device *pdev = platform_device_alloc("txx9dmac", id);
728 struct txx9dmac_chan_platform_data cpdata;
729 int i;
730
731 if (!pdev ||
732 platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
733 platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
734 platform_device_add(pdev)) {
735 platform_device_put(pdev);
736 return;
737 }
738 memset(&cpdata, 0, sizeof(cpdata));
739 cpdata.dmac_dev = pdev;
740 for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) {
741#ifdef CONFIG_MACH_TX49XX
742 chan_res[0].start = irq + i;
743#endif
744 pdev = platform_device_alloc("txx9dmac-chan",
745 id * TXX9_DMA_MAX_NR_CHANNELS + i);
746 if (!pdev ||
747#ifdef CONFIG_MACH_TX49XX
748 platform_device_add_resources(pdev, chan_res,
749 ARRAY_SIZE(chan_res)) ||
750#endif
751 platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) ||
752 platform_device_add(pdev))
753 platform_device_put(pdev);
754 }
755#endif
756}
742cd586
AN		 757
758void __init txx9_aclc_init(unsigned long baseaddr, int irq,
759 unsigned int dmac_id,
760 unsigned int dma_chan_out,
761 unsigned int dma_chan_in)
762{
742cd586 763}
c3b28ae2 764
1003a1ad 765static const struct bus_type txx9_sramc_subsys = {
269a3eb1
KS		 766 .name = "txx9_sram",
767 .dev_name = "txx9_sram",
768};
c3b28ae2 769
269a3eb1
KS		 770struct txx9_sramc_dev {
771 struct device dev;
c3b28ae2
AN		 772 struct bin_attribute bindata_attr;
773 void __iomem *base;
774};
775
2c3c8bea 776static ssize_t txx9_sram_read(struct file *filp, struct kobject *kobj,
c3b28ae2
AN		 777 struct bin_attribute *bin_attr,
778 char *buf, loff_t pos, size_t size)
779{
269a3eb1 780 struct txx9_sramc_dev *dev = bin_attr->private;
c3b28ae2
AN		 781 size_t ramsize = bin_attr->size;
782
783 if (pos >= ramsize)
784 return 0;
785 if (pos + size > ramsize)
786 size = ramsize - pos;
787 memcpy_fromio(buf, dev->base + pos, size);
788 return size;
789}
790
2c3c8bea 791static ssize_t txx9_sram_write(struct file *filp, struct kobject *kobj,
c3b28ae2
AN		 792 struct bin_attribute *bin_attr,
793 char *buf, loff_t pos, size_t size)
794{
269a3eb1 795 struct txx9_sramc_dev *dev = bin_attr->private;
c3b28ae2
AN		 796 size_t ramsize = bin_attr->size;
797
798 if (pos >= ramsize)
799 return 0;
800 if (pos + size > ramsize)
801 size = ramsize - pos;
802 memcpy_toio(dev->base + pos, buf, size);
803 return size;
804}
805
1610c8a8
LK		 806static void txx9_device_release(struct device *dev)
807{
808 struct txx9_sramc_dev *tdev;
809
810 tdev = container_of(dev, struct txx9_sramc_dev, dev);
811 kfree(tdev);
812}
813
c3b28ae2
AN		 814void __init txx9_sramc_init(struct resource *r)
815{
269a3eb1 816 struct txx9_sramc_dev *dev;
c3b28ae2
AN		 817 size_t size;
818 int err;
819
269a3eb1
KS		 820 err = subsys_system_register(&txx9_sramc_subsys, NULL);
821 if (err)
822 return;
c3b28ae2
AN		 823 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
824 if (!dev)
825 return;
826 size = resource_size(r);
827 dev->base = ioremap(r->start, size);
1610c8a8
LK		 828 if (!dev->base) {
829 kfree(dev);
830 return;
831 }
832 dev->dev.release = &txx9_device_release;
269a3eb1 833 dev->dev.bus = &txx9_sramc_subsys;
f937331b 834 sysfs_bin_attr_init(&dev->bindata_attr);
c3b28ae2
AN		 835 dev->bindata_attr.attr.name = "bindata";
836 dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR;
837 dev->bindata_attr.read = txx9_sram_read;
838 dev->bindata_attr.write = txx9_sram_write;
839 dev->bindata_attr.size = size;
840 dev->bindata_attr.private = dev;
269a3eb1 841 err = device_register(&dev->dev);
c3b28ae2 842 if (err)
1610c8a8 843 goto exit_put;
c3b28ae2
AN		 844 err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr);
845 if (err) {
1610c8a8 846 iounmap(dev->base);
c6e1241a 847 device_unregister(&dev->dev);
c3b28ae2 848 }
1610c8a8
LK		 849 return;
850exit_put:
c6e1241a 851 iounmap(dev->base);
1610c8a8 852 put_device(&dev->dev);
c3b28ae2 853}
Linux 6.x block layer and io_uring tree(s)