projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 23fbee9d RB |
1 | /* |
| 2 | * linux/arch/mips/tx4938/toshiba_rbtx4938/irq.c | |
| 3 | * | |
| 4 | * Toshiba RBTX4938 specific interrupt handlers | |
| 5 | * Copyright (C) 2000-2001 Toshiba Corporation | |
| 6 | * | |
| 7 | * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the | |
| 8 | * terms of the GNU General Public License version 2. This program is | |
| 9 | * licensed "as is" without any warranty of any kind, whether express | |
| 10 | * or implied. | |
| 11 | * | |
| 12 | * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) | |
| 13 | */ | |
| 14 | ||
| 15 | /* | |
| 16 | IRQ Device | |
| 17 | ||
| 18 | 16 TX4938-CP0/00 Software 0 | |
| 19 | 17 TX4938-CP0/01 Software 1 | |
| 20 | 18 TX4938-CP0/02 Cascade TX4938-CP0 | |
| 21 | 19 TX4938-CP0/03 Multiplexed -- do not use | |
| 22 | 20 TX4938-CP0/04 Multiplexed -- do not use | |
| 23 | 21 TX4938-CP0/05 Multiplexed -- do not use | |
| 24 | 22 TX4938-CP0/06 Multiplexed -- do not use | |
| 25 | 23 TX4938-CP0/07 CPU TIMER | |
| 26 | ||
| 27 | 24 TX4938-PIC/00 | |
| 28 | 25 TX4938-PIC/01 | |
| 29 | 26 TX4938-PIC/02 Cascade RBTX4938-IOC | |
| 30 | 27 TX4938-PIC/03 RBTX4938 RTL-8019AS Ethernet | |
| 31 | 28 TX4938-PIC/04 | |
| 32 | 29 TX4938-PIC/05 TX4938 ETH1 | |
| 33 | 30 TX4938-PIC/06 TX4938 ETH0 | |
| 34 | 31 TX4938-PIC/07 | |
| 35 | 32 TX4938-PIC/08 TX4938 SIO 0 | |
| 36 | 33 TX4938-PIC/09 TX4938 SIO 1 | |
| 37 | 34 TX4938-PIC/10 TX4938 DMA0 | |
| 38 | 35 TX4938-PIC/11 TX4938 DMA1 | |
| 39 | 36 TX4938-PIC/12 TX4938 DMA2 | |
| 40 | 37 TX4938-PIC/13 TX4938 DMA3 | |
| 41 | 38 TX4938-PIC/14 | |
| 42 | 39 TX4938-PIC/15 | |
| 43 | 40 TX4938-PIC/16 TX4938 PCIC | |
| 44 | 41 TX4938-PIC/17 TX4938 TMR0 | |
| 45 | 42 TX4938-PIC/18 TX4938 TMR1 | |
| 46 | 43 TX4938-PIC/19 TX4938 TMR2 | |
| 47 | 44 TX4938-PIC/20 | |
| 48 | 45 TX4938-PIC/21 | |
| 49 | 46 TX4938-PIC/22 TX4938 PCIERR | |
| 50 | 47 TX4938-PIC/23 | |
| 51 | 48 TX4938-PIC/24 | |
| 52 | 49 TX4938-PIC/25 | |
| 53 | 50 TX4938-PIC/26 | |
| 54 | 51 TX4938-PIC/27 | |
| 55 | 52 TX4938-PIC/28 | |
| 56 | 53 TX4938-PIC/29 | |
| 57 | 54 TX4938-PIC/30 | |
| 58 | 55 TX4938-PIC/31 TX4938 SPI | |
| 59 | ||
| 60 | 56 RBTX4938-IOC/00 PCI-D | |
| 61 | 57 RBTX4938-IOC/01 PCI-C | |
| 62 | 58 RBTX4938-IOC/02 PCI-B | |
| 63 | 59 RBTX4938-IOC/03 PCI-A | |
| 64 | 60 RBTX4938-IOC/04 RTC | |
| 65 | 61 RBTX4938-IOC/05 ATA | |
| 66 | 62 RBTX4938-IOC/06 MODEM | |
| 67 | 63 RBTX4938-IOC/07 SWINT | |
| 68 | */ | |
| 69 | #include <linux/init.h> | |
| 70 | #include <linux/kernel.h> | |
| 71 | #include <linux/types.h> | |
| 72 | #include <linux/mm.h> | |
| 73 | #include <linux/swap.h> | |
| 74 | #include <linux/ioport.h> | |
| 75 | #include <linux/sched.h> | |
| 76 | #include <linux/interrupt.h> | |
| 77 | #include <linux/pci.h> | |
| 78 | #include <linux/timex.h> | |
| 79 | #include <asm/bootinfo.h> | |
| 80 | #include <asm/page.h> | |
| 81 | #include <asm/io.h> | |
| 82 | #include <asm/irq.h> | |
| 83 | #include <asm/processor.h> | |
| 84 | #include <asm/ptrace.h> | |
| 85 | #include <asm/reboot.h> | |
| 86 | #include <asm/time.h> | |
| 23fbee9d RB |
87 | #include <linux/bootmem.h> |
| 88 | #include <asm/tx4938/rbtx4938.h> | |
| 89 | ||
| 90 | static unsigned int toshiba_rbtx4938_irq_ioc_startup(unsigned int irq); | |
| 91 | static void toshiba_rbtx4938_irq_ioc_shutdown(unsigned int irq); | |
| 92 | static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq); | |
| 93 | static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq); | |
| 94 | static void toshiba_rbtx4938_irq_ioc_mask_and_ack(unsigned int irq); | |
| 95 | static void toshiba_rbtx4938_irq_ioc_end(unsigned int irq); | |
| 96 | ||
| 97 | DEFINE_SPINLOCK(toshiba_rbtx4938_ioc_lock); | |
| 98 | ||
| 99 | #define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC" | |
| 100 | static struct hw_interrupt_type toshiba_rbtx4938_irq_ioc_type = { | |
| 101 | .typename = TOSHIBA_RBTX4938_IOC_NAME, | |
| 102 | .startup = toshiba_rbtx4938_irq_ioc_startup, | |
| 103 | .shutdown = toshiba_rbtx4938_irq_ioc_shutdown, | |
| 104 | .enable = toshiba_rbtx4938_irq_ioc_enable, | |
| 105 | .disable = toshiba_rbtx4938_irq_ioc_disable, | |
| 106 | .ack = toshiba_rbtx4938_irq_ioc_mask_and_ack, | |
| 107 | .end = toshiba_rbtx4938_irq_ioc_end, | |
| 108 | .set_affinity = NULL | |
| 109 | }; | |
| 110 | ||
| 111 | #define TOSHIBA_RBTX4938_IOC_INTR_ENAB 0xb7f02000 | |
| 112 | #define TOSHIBA_RBTX4938_IOC_INTR_STAT 0xb7f0200a | |
| 113 | ||
| 114 | int | |
| 115 | toshiba_rbtx4938_irq_nested(int sw_irq) | |
| 116 | { | |
| 117 | u8 level3; | |
| 118 | ||
| 119 | level3 = reg_rd08(TOSHIBA_RBTX4938_IOC_INTR_STAT) & 0xff; | |
| 120 | if (level3) { | |
| 121 | /* must use fls so onboard ATA has priority */ | |
| 122 | sw_irq = TOSHIBA_RBTX4938_IRQ_IOC_BEG + fls(level3) - 1; | |
| 123 | } | |
| 124 | ||
| 125 | wbflush(); | |
| 126 | return sw_irq; | |
| 127 | } | |
| 128 | ||
| 129 | static struct irqaction toshiba_rbtx4938_irq_ioc_action = { | |
| 130 | .handler = no_action, | |
| 131 | .flags = 0, | |
| 132 | .mask = CPU_MASK_NONE, | |
| 133 | .name = TOSHIBA_RBTX4938_IOC_NAME, | |
| 134 | }; | |
| 135 | ||
| 136 | /**********************************************************************************/ | |
| 137 | /* Functions for ioc */ | |
| 138 | /**********************************************************************************/ | |
| 139 | static void __init | |
| 140 | toshiba_rbtx4938_irq_ioc_init(void) | |
| 141 | { | |
| 142 | int i; | |
| 143 | ||
| 144 | for (i = TOSHIBA_RBTX4938_IRQ_IOC_BEG; | |
| 145 | i <= TOSHIBA_RBTX4938_IRQ_IOC_END; i++) { | |
| 146 | irq_desc[i].status = IRQ_DISABLED; | |
| 147 | irq_desc[i].action = 0; | |
| 148 | irq_desc[i].depth = 3; | |
| 149 | irq_desc[i].handler = &toshiba_rbtx4938_irq_ioc_type; | |
| 150 | } | |
| 151 | ||
| 152 | setup_irq(RBTX4938_IRQ_IOCINT, | |
| 153 | &toshiba_rbtx4938_irq_ioc_action); | |
| 154 | } | |
| 155 | ||
| 156 | static unsigned int | |
| 157 | toshiba_rbtx4938_irq_ioc_startup(unsigned int irq) | |
| 158 | { | |
| 159 | toshiba_rbtx4938_irq_ioc_enable(irq); | |
| 160 | ||
| 161 | return 0; | |
| 162 | } | |
| 163 | ||
| 164 | static void | |
| 165 | toshiba_rbtx4938_irq_ioc_shutdown(unsigned int irq) | |
| 166 | { | |
| 167 | toshiba_rbtx4938_irq_ioc_disable(irq); | |
| 168 | } | |
| 169 | ||
| 170 | static void | |
| 171 | toshiba_rbtx4938_irq_ioc_enable(unsigned int irq) | |
| 172 | { | |
| 173 | unsigned long flags; | |
| 174 | volatile unsigned char v; | |
| 175 | ||
| 176 | spin_lock_irqsave(&toshiba_rbtx4938_ioc_lock, flags); | |
| 177 | ||
| 178 | v = TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); | |
| 179 | v |= (1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG)); | |
| 180 | TX4938_WR08(TOSHIBA_RBTX4938_IOC_INTR_ENAB, v); | |
| 181 | mmiowb(); | |
| 182 | TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); | |
| 183 | ||
| 184 | spin_unlock_irqrestore(&toshiba_rbtx4938_ioc_lock, flags); | |
| 185 | } | |
| 186 | ||
| 187 | static void | |
| 188 | toshiba_rbtx4938_irq_ioc_disable(unsigned int irq) | |
| 189 | { | |
| 190 | unsigned long flags; | |
| 191 | volatile unsigned char v; | |
| 192 | ||
| 193 | spin_lock_irqsave(&toshiba_rbtx4938_ioc_lock, flags); | |
| 194 | ||
| 195 | v = TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); | |
| 196 | v &= ~(1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG)); | |
| 197 | TX4938_WR08(TOSHIBA_RBTX4938_IOC_INTR_ENAB, v); | |
| 198 | mmiowb(); | |
| 199 | TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB); | |
| 200 | ||
| 201 | spin_unlock_irqrestore(&toshiba_rbtx4938_ioc_lock, flags); | |
| 202 | } | |
| 203 | ||
| 204 | static void | |
| 205 | toshiba_rbtx4938_irq_ioc_mask_and_ack(unsigned int irq) | |
| 206 | { | |
| 207 | toshiba_rbtx4938_irq_ioc_disable(irq); | |
| 208 | } | |
| 209 | ||
| 210 | static void | |
| 211 | toshiba_rbtx4938_irq_ioc_end(unsigned int irq) | |
| 212 | { | |
| 213 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { | |
| 214 | toshiba_rbtx4938_irq_ioc_enable(irq); | |
| 215 | } | |
| 216 | } | |
| 217 | ||
| 218 | extern void __init txx9_spi_irqinit(int irc_irq); | |
| 219 | ||
| 220 | void __init arch_init_irq(void) | |
| 221 | { | |
| 222 | extern void tx4938_irq_init(void); | |
| 223 | ||
| 224 | /* Now, interrupt control disabled, */ | |
| 225 | /* all IRC interrupts are masked, */ | |
| 226 | /* all IRC interrupt mode are Low Active. */ | |
| 227 | ||
| 228 | /* mask all IOC interrupts */ | |
| 229 | *rbtx4938_imask_ptr = 0; | |
| 230 | ||
| 231 | /* clear SoftInt interrupts */ | |
| 232 | *rbtx4938_softint_ptr = 0; | |
| 233 | tx4938_irq_init(); | |
| 234 | toshiba_rbtx4938_irq_ioc_init(); | |
| 235 | /* Onboard 10M Ether: High Active */ | |
| 236 | TX4938_WR(TX4938_MKA(TX4938_IRC_IRDM0), 0x00000040); | |
| 237 | ||
| 238 | if (tx4938_ccfgptr->pcfg & TX4938_PCFG_SPI_SEL) { | |
| 239 | txx9_spi_irqinit(RBTX4938_IRQ_IRC_SPI); | |
| 240 | } | |
| 241 | ||
| 242 | wbflush(); | |
| 243 | } |