treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 156
[linux-block.git] / arch / mips / sibyte / swarm / setup.c
CommitLineData
1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4 2/*
f137e463 3 * Copyright (C) 2000, 2001, 2002, 2003, 2004 Broadcom Corporation
1da177e4 4 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
1da177e4
LT
5 */
6
7/*
8 * Setup code for the SWARM board
9 */
10
1da177e4
LT
11#include <linux/spinlock.h>
12#include <linux/mm.h>
57c8a661 13#include <linux/memblock.h>
1da177e4
LT
14#include <linux/blkdev.h>
15#include <linux/init.h>
16#include <linux/kernel.h>
894673ee 17#include <linux/screen_info.h>
1da177e4
LT
18#include <linux/initrd.h>
19
20#include <asm/irq.h>
21#include <asm/io.h>
22#include <asm/bootinfo.h>
23#include <asm/mipsregs.h>
24#include <asm/reboot.h>
25#include <asm/time.h>
26#include <asm/traps.h>
27#include <asm/sibyte/sb1250.h>
f137e463
AI
28#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
29#include <asm/sibyte/bcm1480_regs.h>
30#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
1da177e4 31#include <asm/sibyte/sb1250_regs.h>
f137e463 32#else
03dbd2e0 33#error invalid SiByte board configuration
f137e463 34#endif
1da177e4
LT
35#include <asm/sibyte/sb1250_genbus.h>
36#include <asm/sibyte/board.h>
37
f137e463
AI
38#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
39extern void bcm1480_setup(void);
40#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
1da177e4 41extern void sb1250_setup(void);
f137e463 42#else
03dbd2e0 43#error invalid SiByte board configuration
f137e463 44#endif
1da177e4
LT
45
46extern int xicor_probe(void);
f06e7aa4 47extern int xicor_set_time(time64_t);
09adad17 48extern time64_t xicor_get_time(void);
1da177e4
LT
49
50extern int m41t81_probe(void);
f06e7aa4 51extern int m41t81_set_time(time64_t);
09adad17 52extern time64_t m41t81_get_time(void);
1da177e4
LT
53
54const char *get_system_type(void)
55{
56 return "SiByte " SIBYTE_BOARD_NAME;
57}
58
1da177e4
LT
59int swarm_be_handler(struct pt_regs *regs, int is_fixup)
60{
61 if (!is_fixup && (regs->cp0_cause & 4)) {
62 /* Data bus error - print PA */
6aaf7786 63 printk("DBE physical address: %010Lx\n",
1da177e4 64 __read_64bit_c0_register($26, 1));
1da177e4 65 }
635c9907 66 return is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL;
1da177e4
LT
67}
68
4b550488
RB
69enum swarm_rtc_type {
70 RTC_NONE,
71 RTC_XICOR,
2b3e5023 72 RTC_M41T81,
4b550488
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73};
74
75enum swarm_rtc_type swarm_rtc_type;
76
09adad17 77void read_persistent_clock64(struct timespec64 *ts)
4b550488 78{
09adad17 79 time64_t sec;
d4f587c6 80
4b550488
RB
81 switch (swarm_rtc_type) {
82 case RTC_XICOR:
d4f587c6
MS
83 sec = xicor_get_time();
84 break;
4b550488 85
2b3e5023 86 case RTC_M41T81:
d4f587c6
MS
87 sec = m41t81_get_time();
88 break;
4b550488
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89
90 case RTC_NONE:
91 default:
09adad17 92 sec = mktime64(2000, 1, 1, 0, 0, 0);
d4f587c6 93 break;
4b550488 94 }
d4f587c6 95 ts->tv_sec = sec;
a648e811 96 ts->tv_nsec = 0;
4b550488
RB
97}
98
f06e7aa4 99int update_persistent_clock64(struct timespec64 now)
4b550488 100{
f06e7aa4
BW
101 time64_t sec = now.tv_sec;
102
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103 switch (swarm_rtc_type) {
104 case RTC_XICOR:
105 return xicor_set_time(sec);
106
2b3e5023 107 case RTC_M41T81:
4b550488
RB
108 return m41t81_set_time(sec);
109
110 case RTC_NONE:
111 default:
112 return -1;
113 }
114}
115
2925aba4 116void __init plat_mem_setup(void)
1da177e4 117{
f137e463
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118#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
119 bcm1480_setup();
120#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
1da177e4 121 sb1250_setup();
f137e463 122#else
03dbd2e0 123#error invalid SiByte board configuration
f137e463 124#endif
1da177e4 125
1da177e4
LT
126 board_be_handler = swarm_be_handler;
127
4b550488
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128 if (xicor_probe())
129 swarm_rtc_type = RTC_XICOR;
130 if (m41t81_probe())
2b3e5023 131 swarm_rtc_type = RTC_M41T81;
1da177e4 132
1da177e4
LT
133#ifdef CONFIG_VT
134 screen_info = (struct screen_info) {
b20947aa
SAS
135 .orig_video_page = 52,
136 .orig_video_mode = 3,
137 .orig_video_cols = 80,
138 .flags = 12,
139 .orig_video_ega_bx = 3,
140 .orig_video_lines = 25,
141 .orig_video_isVGA = 0x22,
142 .orig_video_points = 16,
1da177e4
LT
143 };
144 /* XXXKW for CFE, get lines/cols from environment */
145#endif
1da177e4
LT
146}
147
1da177e4
LT
148#ifdef LEDS_PHYS
149
150#ifdef CONFIG_SIBYTE_CARMEL
151/* XXXKW need to detect Monterey/LittleSur/etc */
152#undef LEDS_PHYS
153#define LEDS_PHYS MLEDS_PHYS
154#endif
155
1da177e4
LT
156void setleds(char *str)
157{
8fb303c7 158 void *reg;
1da177e4 159 int i;
8fb303c7 160
1da177e4 161 for (i = 0; i < 4; i++) {
8fb303c7
RB
162 reg = IOADDR(LEDS_PHYS) + 0x20 + ((3 - i) << 3);
163
164 if (!str[i])
165 writeb(' ', reg);
166 else
167 writeb(str[i], reg);
1da177e4
LT
168 }
169}
8fb303c7
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170
171#endif /* LEDS_PHYS */