projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 38b18f72 RB |
1 | config SIBYTE_SB1250 |
| 2 | bool | |
| 3 | select HW_HAS_PCI | |
| 4 | select SIBYTE_HAS_LDT | |
| 5 | select SIBYTE_SB1xxx_SOC | |
| e73ea273 | 6 | select SYS_SUPPORTS_SMP |
| 38b18f72 RB |
7 | |
| 8 | config SIBYTE_BCM1120 | |
| 9 | bool | |
| 10 | select SIBYTE_BCM112X | |
| 11 | select SIBYTE_SB1xxx_SOC | |
| 12 | ||
| 13 | config SIBYTE_BCM1125 | |
| 14 | bool | |
| 15 | select HW_HAS_PCI | |
| 16 | select SIBYTE_BCM112X | |
| 17 | select SIBYTE_SB1xxx_SOC | |
| 18 | ||
| 19 | config SIBYTE_BCM1125H | |
| 20 | bool | |
| 21 | select HW_HAS_PCI | |
| 22 | select SIBYTE_BCM112X | |
| 23 | select SIBYTE_HAS_LDT | |
| 24 | select SIBYTE_SB1xxx_SOC | |
| 25 | ||
| 26 | config SIBYTE_BCM112X | |
| 27 | bool | |
| 28 | select SIBYTE_SB1xxx_SOC | |
| 29 | ||
| f137e463 AI |
30 | config SIBYTE_BCM1x80 |
| 31 | bool | |
| 32 | select HW_HAS_PCI | |
| 33 | select SIBYTE_SB1xxx_SOC | |
| e73ea273 | 34 | select SYS_SUPPORTS_SMP |
| f137e463 AI |
35 | |
| 36 | config SIBYTE_BCM1x55 | |
| 37 | bool | |
| 38 | select HW_HAS_PCI | |
| 39 | select SIBYTE_SB1xxx_SOC | |
| e73ea273 | 40 | select SYS_SUPPORTS_SMP |
| f137e463 | 41 | |
| 38b18f72 RB |
42 | config SIBYTE_SB1xxx_SOC |
| 43 | bool | |
| 44 | depends on EXPERIMENTAL | |
| 45 | select DMA_COHERENT | |
| 46 | select SIBYTE_CFE | |
| 47 | select SWAP_IO_SPACE | |
| 48 | select SYS_SUPPORTS_32BIT_KERNEL | |
| 49 | select SYS_SUPPORTS_64BIT_KERNEL | |
| 50 | ||
| 51 | choice | |
| 52 | prompt "SiByte SOC Stepping" | |
| 53 | depends on SIBYTE_SB1xxx_SOC | |
| 54 | ||
| 55 | config CPU_SB1_PASS_1 | |
| 56 | bool "1250 Pass1" | |
| 57 | depends on SIBYTE_SB1250 | |
| 58 | select CPU_HAS_PREFETCH | |
| 59 | ||
| 60 | config CPU_SB1_PASS_2_1250 | |
| 61 | bool "1250 An" | |
| 62 | depends on SIBYTE_SB1250 | |
| 63 | select CPU_SB1_PASS_2 | |
| 64 | help | |
| 65 | Also called BCM1250 Pass 2 | |
| 66 | ||
| 67 | config CPU_SB1_PASS_2_2 | |
| 68 | bool "1250 Bn" | |
| 69 | depends on SIBYTE_SB1250 | |
| 70 | select CPU_HAS_PREFETCH | |
| 71 | help | |
| 72 | Also called BCM1250 Pass 2.2 | |
| 73 | ||
| 74 | config CPU_SB1_PASS_4 | |
| 75 | bool "1250 Cn" | |
| 76 | depends on SIBYTE_SB1250 | |
| 77 | select CPU_HAS_PREFETCH | |
| 78 | help | |
| 79 | Also called BCM1250 Pass 3 | |
| 80 | ||
| 81 | config CPU_SB1_PASS_2_112x | |
| 82 | bool "112x Hybrid" | |
| 83 | depends on SIBYTE_BCM112X | |
| 84 | select CPU_SB1_PASS_2 | |
| 85 | ||
| 86 | config CPU_SB1_PASS_3 | |
| 87 | bool "112x An" | |
| 88 | depends on SIBYTE_BCM112X | |
| 89 | select CPU_HAS_PREFETCH | |
| 90 | ||
| 91 | endchoice | |
| 92 | ||
| 93 | config CPU_SB1_PASS_2 | |
| 94 | bool | |
| 95 | ||
| 96 | config SIBYTE_HAS_LDT | |
| 97 | bool | |
| 98 | depends on PCI && (SIBYTE_SB1250 || SIBYTE_BCM1125H) | |
| 99 | default y | |
| 100 | ||
| 101 | config SIMULATION | |
| 102 | bool "Running under simulation" | |
| 103 | depends on SIBYTE_SB1xxx_SOC | |
| 104 | help | |
| 105 | Build a kernel suitable for running under the GDB simulator. | |
| 106 | Primarily adjusts the kernel's notion of time. | |
| 107 | ||
| 77607635 | 108 | config SB1_CEX_ALWAYS_FATAL |
| a4b5bd9a AI |
109 | bool "All cache exceptions considered fatal (no recovery attempted)" |
| 110 | depends on SIBYTE_SB1xxx_SOC | |
| 111 | ||
| 77607635 | 112 | config SB1_CERR_STALL |
| a4b5bd9a AI |
113 | bool "Stall (rather than panic) on fatal cache error" |
| 114 | depends on SIBYTE_SB1xxx_SOC | |
| 115 | ||
| 38b18f72 RB |
116 | config SIBYTE_CFE |
| 117 | bool "Booting from CFE" | |
| 118 | depends on SIBYTE_SB1xxx_SOC | |
| 119 | help | |
| 120 | Make use of the CFE API for enumerating available memory, | |
| 121 | controlling secondary CPUs, and possibly console output. | |
| 122 | ||
| 123 | config SIBYTE_CFE_CONSOLE | |
| 124 | bool "Use firmware console" | |
| 125 | depends on SIBYTE_CFE | |
| 126 | help | |
| 127 | Use the CFE API's console write routines during boot. Other console | |
| 128 | options (VT console, sb1250 duart console, etc.) should not be | |
| 129 | configured. | |
| 130 | ||
| 131 | config SIBYTE_STANDALONE | |
| 132 | bool | |
| 133 | depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE | |
| 134 | default y | |
| 135 | ||
| 136 | config SIBYTE_STANDALONE_RAM_SIZE | |
| 137 | int "Memory size (in megabytes)" | |
| 138 | depends on SIBYTE_STANDALONE | |
| 139 | default "32" | |
| 140 | ||
| 141 | config SIBYTE_BUS_WATCHER | |
| 142 | bool "Support for Bus Watcher statistics" | |
| 143 | depends on SIBYTE_SB1xxx_SOC | |
| 144 | help | |
| 145 | Handle and keep statistics on the bus error interrupts (COR_ECC, | |
| 146 | BAD_ECC, IO_BUS). | |
| 147 | ||
| 148 | config SIBYTE_BW_TRACE | |
| 149 | bool "Capture bus trace before bus error" | |
| 150 | depends on SIBYTE_BUS_WATCHER | |
| 151 | help | |
| 152 | Run a continuous bus trace, dumping the raw data as soon as | |
| 153 | a ZBbus error is detected. Cannot work if ZBbus profiling | |
| 154 | is turned on, and also will interfere with JTAG-based trace | |
| 155 | buffer activity. Raw buffer data is dumped to console, and | |
| 156 | must be processed off-line. | |
| 157 | ||
| 158 | config SIBYTE_SB1250_PROF | |
| 159 | bool "Support for SB1/SOC profiling - SB1/SCD perf counters" | |
| 160 | depends on SIBYTE_SB1xxx_SOC | |
| 161 | ||
| 162 | config SIBYTE_TBPROF | |
| 163 | bool "Support for ZBbus profiling" | |
| 164 | depends on SIBYTE_SB1xxx_SOC |