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1da177e4 LT |
1 | /* |
2 | * IP32 basic setup | |
3 | * | |
4 | * This file is subject to the terms and conditions of the GNU General Public | |
5 | * License. See the file "COPYING" in the main directory of this archive | |
6 | * for more details. | |
7 | * | |
8 | * Copyright (C) 2000 Harald Koerfgen | |
9 | * Copyright (C) 2002, 2003, 2005 Ilya A. Volynets | |
54d0a216 | 10 | * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org> |
1da177e4 | 11 | */ |
1da177e4 LT |
12 | #include <linux/console.h> |
13 | #include <linux/init.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/mc146818rtc.h> | |
16 | #include <linux/param.h> | |
17 | #include <linux/sched.h> | |
18 | ||
19 | #include <asm/bootinfo.h> | |
20 | #include <asm/mc146818-time.h> | |
21 | #include <asm/mipsregs.h> | |
22 | #include <asm/mmu_context.h> | |
23 | #include <asm/sgialib.h> | |
24 | #include <asm/time.h> | |
25 | #include <asm/traps.h> | |
26 | #include <asm/io.h> | |
27 | #include <asm/ip32/crime.h> | |
28 | #include <asm/ip32/mace.h> | |
29 | #include <asm/ip32/ip32_ints.h> | |
30 | ||
31 | extern void ip32_be_init(void); | |
32 | extern void crime_init(void); | |
33 | ||
34 | #ifdef CONFIG_SGI_O2MACE_ETH | |
35 | /* | |
36 | * This is taken care of in here 'cause they say using Arc later on is | |
37 | * problematic | |
38 | */ | |
39 | extern char o2meth_eaddr[8]; | |
40 | static inline unsigned char str2hexnum(unsigned char c) | |
41 | { | |
42 | if (c >= '0' && c <= '9') | |
43 | return c - '0'; | |
44 | if (c >= 'a' && c <= 'f') | |
45 | return c - 'a' + 10; | |
46 | return 0; /* foo */ | |
47 | } | |
48 | ||
49 | static inline void str2eaddr(unsigned char *ea, unsigned char *str) | |
50 | { | |
51 | int i; | |
52 | ||
53 | for (i = 0; i < 6; i++) { | |
54 | unsigned char num; | |
55 | ||
56 | if(*str == ':') | |
57 | str++; | |
58 | num = str2hexnum(*str++) << 4; | |
59 | num |= (str2hexnum(*str++)); | |
60 | ea[i] = num; | |
61 | } | |
62 | } | |
63 | #endif | |
64 | ||
65 | #ifdef CONFIG_SERIAL_8250 | |
66 | #include <linux/tty.h> | |
67 | #include <linux/serial.h> | |
68 | #include <linux/serial_core.h> | |
1da177e4 LT |
69 | #endif /* CONFIG_SERIAL_8250 */ |
70 | ||
71 | /* An arbitrary time; this can be decreased if reliability looks good */ | |
72 | #define WAIT_MS 10 | |
73 | ||
74 | void __init ip32_time_init(void) | |
75 | { | |
76 | printk(KERN_INFO "Calibrating system timer... "); | |
77 | write_c0_count(0); | |
78 | crime->timer = 0; | |
79 | while (crime->timer < CRIME_MASTER_FREQ * WAIT_MS / 1000) ; | |
80 | mips_hpt_frequency = read_c0_count() * 1000 / WAIT_MS; | |
81 | printk("%d MHz CPU detected\n", mips_hpt_frequency * 2 / 1000000); | |
82 | } | |
83 | ||
54d0a216 | 84 | void __init plat_timer_setup(struct irqaction *irq) |
1da177e4 LT |
85 | { |
86 | irq->handler = no_action; | |
87 | setup_irq(IP32_R4K_TIMER_IRQ, irq); | |
88 | } | |
89 | ||
2925aba4 | 90 | void __init plat_mem_setup(void) |
1da177e4 LT |
91 | { |
92 | board_be_init = ip32_be_init; | |
93 | ||
d23ee8fe YY |
94 | rtc_mips_get_time = mc146818_get_cmos_time; |
95 | rtc_mips_set_mmss = mc146818_set_rtc_mmss; | |
1da177e4 LT |
96 | |
97 | board_time_init = ip32_time_init; | |
1da177e4 LT |
98 | |
99 | #ifdef CONFIG_SERIAL_8250 | |
a3dddd56 | 100 | { |
1da177e4 LT |
101 | static struct uart_port o2_serial[2]; |
102 | ||
103 | memset(o2_serial, 0, sizeof(o2_serial)); | |
104 | o2_serial[0].type = PORT_16550A; | |
105 | o2_serial[0].line = 0; | |
106 | o2_serial[0].irq = MACEISA_SERIAL1_IRQ; | |
59a675b2 RK |
107 | o2_serial[0].flags = UPF_SKIP_TEST; |
108 | o2_serial[0].uartclk = 1843200; | |
1da177e4 LT |
109 | o2_serial[0].iotype = UPIO_MEM; |
110 | o2_serial[0].membase = (char *)&mace->isa.serial1; | |
111 | o2_serial[0].fifosize = 14; | |
112 | /* How much to shift register offset by. Each UART register | |
113 | * is replicated over 256 byte space */ | |
114 | o2_serial[0].regshift = 8; | |
115 | o2_serial[1].type = PORT_16550A; | |
116 | o2_serial[1].line = 1; | |
117 | o2_serial[1].irq = MACEISA_SERIAL2_IRQ; | |
59a675b2 RK |
118 | o2_serial[1].flags = UPF_SKIP_TEST; |
119 | o2_serial[1].uartclk = 1843200; | |
1da177e4 LT |
120 | o2_serial[1].iotype = UPIO_MEM; |
121 | o2_serial[1].membase = (char *)&mace->isa.serial2; | |
122 | o2_serial[1].fifosize = 14; | |
123 | o2_serial[1].regshift = 8; | |
124 | ||
125 | early_serial_setup(&o2_serial[0]); | |
126 | early_serial_setup(&o2_serial[1]); | |
127 | } | |
128 | #endif | |
129 | #ifdef CONFIG_SGI_O2MACE_ETH | |
130 | { | |
131 | char *mac = ArcGetEnvironmentVariable("eaddr"); | |
132 | str2eaddr(o2meth_eaddr, mac); | |
133 | } | |
134 | #endif | |
135 | ||
136 | #if defined(CONFIG_SERIAL_CORE_CONSOLE) | |
137 | { | |
138 | char* con = ArcGetEnvironmentVariable("console"); | |
139 | if (con && *con == 'd') { | |
140 | static char options[8]; | |
141 | char *baud = ArcGetEnvironmentVariable("dbaud"); | |
142 | if (baud) | |
143 | strcpy(options, baud); | |
144 | add_preferred_console("ttyS", *(con + 1) == '2' ? 1 : 0, | |
145 | baud ? options : NULL); | |
146 | } | |
147 | } | |
148 | #endif | |
1da177e4 | 149 | } |