[linux-block.git] / arch / mips / sgi-ip27 / ip27-timer.c

/*
 * Copytight (C) 1999, 2000, 05, 06 Ralf Baechle (ralf@linux-mips.org)
 * Copytight (C) 1999, 2000 Silicon Graphics, Inc.
 */
#include <linux/bcd.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <linux/param.h>
#include <linux/time.h>
#include <linux/timex.h>
#include <linux/mm.h>

#include <asm/time.h>
#include <asm/pgtable.h>
#include <asm/sgialib.h>
#include <asm/sn/ioc3.h>
#include <asm/m48t35.h>
#include <asm/sn/klconfig.h>
#include <asm/sn/arch.h>
#include <asm/sn/addrs.h>
#include <asm/sn/sn_private.h>
#include <asm/sn/sn0/ip27.h>
#include <asm/sn/sn0/hub.h>

/*
 * This is a hack; we really need to figure these values out dynamically
 *
 * Since 800 ns works very well with various HUB frequencies, such as
 * 360, 380, 390 and 400 MHZ, we use 800 ns rtc cycle time.
 *
 * Ralf: which clock rate is used to feed the counter?
 */
#define NSEC_PER_CYCLE		800
#define CYCLES_PER_SEC		(NSEC_PER_SEC/NSEC_PER_CYCLE)
#define CYCLES_PER_JIFFY	(CYCLES_PER_SEC/HZ)

#define TICK_SIZE (tick_nsec / 1000)

static unsigned long ct_cur[NR_CPUS];	/* What counter should be at next timer irq */
static long last_rtc_update;		/* Last time the rtc clock got updated */

#if 0
static int set_rtc_mmss(unsigned long nowtime)
{
	int retval = 0;
	int real_seconds, real_minutes, cmos_minutes;
	struct m48t35_rtc *rtc;
	nasid_t nid;

	nid = get_nasid();
	rtc = (struct m48t35_rtc *)(KL_CONFIG_CH_CONS_INFO(nid)->memory_base +
							IOC3_BYTEBUS_DEV0);

	rtc->control |= M48T35_RTC_READ;
	cmos_minutes = BCD2BIN(rtc->min);
	rtc->control &= ~M48T35_RTC_READ;

	/*
	 * Since we're only adjusting minutes and seconds, don't interfere with
	 * hour overflow. This avoids messing with unknown time zones but
	 * requires your RTC not to be off by more than 15 minutes
	 */
	real_seconds = nowtime % 60;
	real_minutes = nowtime / 60;
	if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
		real_minutes += 30;	/* correct for half hour time zone */
	real_minutes %= 60;

	if (abs(real_minutes - cmos_minutes) < 30) {
		real_seconds = BIN2BCD(real_seconds);
		real_minutes = BIN2BCD(real_minutes);
		rtc->control |= M48T35_RTC_SET;
		rtc->sec = real_seconds;
		rtc->min = real_minutes;
		rtc->control &= ~M48T35_RTC_SET;
	} else {
		printk(KERN_WARNING
		       "set_rtc_mmss: can't update from %d to %d\n",
		       cmos_minutes, real_minutes);
		retval = -1;
	}

	return retval;
}
#endif

static unsigned int rt_timer_irq;

void ip27_rt_timer_interrupt(void)
{
	int cpu = smp_processor_id();
	int cpuA = cputoslice(cpu) == 0;
	unsigned int irq = rt_timer_irq;

	irq_enter();
	write_seqlock(&xtime_lock);

again:
	LOCAL_HUB_S(cpuA ? PI_RT_PEND_A : PI_RT_PEND_B, 0);	/* Ack  */
	ct_cur[cpu] += CYCLES_PER_JIFFY;
	LOCAL_HUB_S(cpuA ? PI_RT_COMPARE_A : PI_RT_COMPARE_B, ct_cur[cpu]);

	if (LOCAL_HUB_L(PI_RT_COUNT) >= ct_cur[cpu])
		goto again;

	kstat_this_cpu.irqs[irq]++;		/* kstat only for bootcpu? */

	if (cpu == 0)
		do_timer(1);

	update_process_times(user_mode(get_irq_regs()));

	/*
	 * If we have an externally synchronized Linux clock, then update
	 * RTC clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
	 * called as close as possible to when a second starts.
	 */
	if (ntp_synced() &&
	    xtime.tv_sec > last_rtc_update + 660 &&
	    (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
	    (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
		if (rtc_mips_set_time(xtime.tv_sec) == 0) {
			last_rtc_update = xtime.tv_sec;
		} else {
			last_rtc_update = xtime.tv_sec - 600;
			/* do it again in 60 s */
		}
	}

	write_sequnlock(&xtime_lock);
	irq_exit();
}

/* Includes for ioc3_init().  */
#include <asm/sn/types.h>
#include <asm/sn/sn0/addrs.h>
#include <asm/sn/sn0/hubni.h>
#include <asm/sn/sn0/hubio.h>
#include <asm/pci/bridge.h>

static __init unsigned long get_m48t35_time(void)
{
        unsigned int year, month, date, hour, min, sec;
	struct m48t35_rtc *rtc;
	nasid_t nid;

	nid = get_nasid();
	rtc = (struct m48t35_rtc *)(KL_CONFIG_CH_CONS_INFO(nid)->memory_base +
							IOC3_BYTEBUS_DEV0);

	rtc->control |= M48T35_RTC_READ;
	sec = rtc->sec;
	min = rtc->min;
	hour = rtc->hour;
	date = rtc->date;
	month = rtc->month;
	year = rtc->year;
	rtc->control &= ~M48T35_RTC_READ;

        sec = BCD2BIN(sec);
        min = BCD2BIN(min);
        hour = BCD2BIN(hour);
        date = BCD2BIN(date);
        month = BCD2BIN(month);
        year = BCD2BIN(year);

        year += 1970;

        return mktime(year, month, date, hour, min, sec);
}

static void enable_rt_irq(unsigned int irq)
{
}

static void disable_rt_irq(unsigned int irq)
{
}

static struct irq_chip rt_irq_type = {
	.typename	= "SN HUB RT timer",
	.ack		= disable_rt_irq,
	.mask		= disable_rt_irq,
	.mask_ack	= disable_rt_irq,
	.unmask		= enable_rt_irq,
	.eoi		= enable_rt_irq,
};

static struct irqaction rt_irqaction = {
	.handler	= ip27_rt_timer_interrupt,
	.flags		= IRQF_DISABLED,
	.mask		= CPU_MASK_NONE,
	.name		= "timer"
};

void __init plat_timer_setup(struct irqaction *irq)
{
	int irqno  = allocate_irqno();

	if (irqno < 0)
		panic("Can't allocate interrupt number for timer interrupt");

	set_irq_chip_and_handler(irqno, &rt_irq_type, handle_percpu_irq);

	/* over-write the handler, we use our own way */
	irq->handler = no_action;

	/* setup irqaction */
	irq_desc[irqno].status |= IRQ_PER_CPU;

	rt_timer_irq = irqno;
	/*
	 * Only needed to get /proc/interrupt to display timer irq stats
	 */
	setup_irq(irqno, &rt_irqaction);
}

static cycle_t ip27_hpt_read(void)
{
	return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT);
}

void __init ip27_time_init(void)
{
	clocksource_mips.read = ip27_hpt_read;
	mips_hpt_frequency = CYCLES_PER_SEC;
	xtime.tv_sec = get_m48t35_time();
	xtime.tv_nsec = 0;
}

void __init cpu_time_init(void)
{
	lboard_t *board;
	klcpu_t *cpu;
	int cpuid;

	/* Don't use ARCS.  ARCS is fragile.  Klconfig is simple and sane.  */
	board = find_lboard(KL_CONFIG_INFO(get_nasid()), KLTYPE_IP27);
	if (!board)
		panic("Can't find board info for myself.");

	cpuid = LOCAL_HUB_L(PI_CPU_NUM) ? IP27_CPU0_INDEX : IP27_CPU1_INDEX;
	cpu = (klcpu_t *) KLCF_COMP(board, cpuid);
	if (!cpu)
		panic("No information about myself?");

	printk("CPU %d clock is %dMHz.\n", smp_processor_id(), cpu->cpu_speed);

	set_c0_status(SRB_TIMOCLK);
}

void __init hub_rtc_init(cnodeid_t cnode)
{
	/*
	 * We only need to initialize the current node.
	 * If this is not the current node then it is a cpuless
	 * node and timeouts will not happen there.
	 */
	if (get_compact_nodeid() == cnode) {
		int cpu = smp_processor_id();
		LOCAL_HUB_S(PI_RT_EN_A, 1);
		LOCAL_HUB_S(PI_RT_EN_B, 1);
		LOCAL_HUB_S(PI_PROF_EN_A, 0);
		LOCAL_HUB_S(PI_PROF_EN_B, 0);
		ct_cur[cpu] = CYCLES_PER_JIFFY;
		LOCAL_HUB_S(PI_RT_COMPARE_A, ct_cur[cpu]);
		LOCAL_HUB_S(PI_RT_COUNT, 0);
		LOCAL_HUB_S(PI_RT_PEND_A, 0);
		LOCAL_HUB_S(PI_RT_COMPARE_B, ct_cur[cpu]);
		LOCAL_HUB_S(PI_RT_COUNT, 0);
		LOCAL_HUB_S(PI_RT_PEND_B, 0);
	}
}
Commit	Line	Data
1da177e4	1	/*
54d0a216	2	* Copytight (C) 1999, 2000, 05, 06 Ralf Baechle (ralf@linux-mips.org)
1da177e4 LT	3	* Copytight (C) 1999, 2000 Silicon Graphics, Inc.
	4	*/
	5	#include <linux/bcd.h>
	6	#include <linux/init.h>
	7	#include <linux/kernel.h>
	8	#include <linux/sched.h>
	9	#include <linux/interrupt.h>
	10	#include <linux/kernel_stat.h>
	11	#include <linux/param.h>
	12	#include <linux/time.h>
	13	#include <linux/timex.h>
	14	#include <linux/mm.h>
	15
	16	#include <asm/time.h>
	17	#include <asm/pgtable.h>
	18	#include <asm/sgialib.h>
	19	#include <asm/sn/ioc3.h>
	20	#include <asm/m48t35.h>
	21	#include <asm/sn/klconfig.h>
	22	#include <asm/sn/arch.h>
	23	#include <asm/sn/addrs.h>
	24	#include <asm/sn/sn_private.h>
	25	#include <asm/sn/sn0/ip27.h>
	26	#include <asm/sn/sn0/hub.h>
	27
	28	/*
	29	* This is a hack; we really need to figure these values out dynamically
	30	*
	31	* Since 800 ns works very well with various HUB frequencies, such as
	32	* 360, 380, 390 and 400 MHZ, we use 800 ns rtc cycle time.
	33	*
	34	* Ralf: which clock rate is used to feed the counter?
	35	*/
	36	#define NSEC_PER_CYCLE 800
	37	#define CYCLES_PER_SEC (NSEC_PER_SEC/NSEC_PER_CYCLE)
	38	#define CYCLES_PER_JIFFY (CYCLES_PER_SEC/HZ)
	39
	40	#define TICK_SIZE (tick_nsec / 1000)
	41
	42	static unsigned long ct_cur[NR_CPUS]; /* What counter should be at next timer irq */
	43	static long last_rtc_update; /* Last time the rtc clock got updated */
	44
1da177e4 LT	45	#if 0
	46	static int set_rtc_mmss(unsigned long nowtime)
	47	{
	48	int retval = 0;
	49	int real_seconds, real_minutes, cmos_minutes;
	50	struct m48t35_rtc *rtc;
	51	nasid_t nid;
	52
	53	nid = get_nasid();
	54	rtc = (struct m48t35_rtc *)(KL_CONFIG_CH_CONS_INFO(nid)->memory_base +
	55	IOC3_BYTEBUS_DEV0);
	56
	57	rtc->control \|= M48T35_RTC_READ;
	58	cmos_minutes = BCD2BIN(rtc->min);
	59	rtc->control &= ~M48T35_RTC_READ;
	60
	61	/*
	62	* Since we're only adjusting minutes and seconds, don't interfere with
	63	* hour overflow. This avoids messing with unknown time zones but
	64	* requires your RTC not to be off by more than 15 minutes
	65	*/
	66	real_seconds = nowtime % 60;
	67	real_minutes = nowtime / 60;
	68	if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
	69	real_minutes += 30; /* correct for half hour time zone */
	70	real_minutes %= 60;
	71
	72	if (abs(real_minutes - cmos_minutes) < 30) {
	73	real_seconds = BIN2BCD(real_seconds);
	74	real_minutes = BIN2BCD(real_minutes);
	75	rtc->control \|= M48T35_RTC_SET;
	76	rtc->sec = real_seconds;
	77	rtc->min = real_minutes;
	78	rtc->control &= ~M48T35_RTC_SET;
	79	} else {
	80	printk(KERN_WARNING
	81	"set_rtc_mmss: can't update from %d to %d\n",
	82	cmos_minutes, real_minutes);
	83	retval = -1;
	84	}
	85
	86	return retval;
	87	}
	88	#endif
	89
3c009442 RB	90	static unsigned int rt_timer_irq;
3c009442 RB	91
937a8015	92	void ip27_rt_timer_interrupt(void)
1da177e4 LT	93	{
	94	int cpu = smp_processor_id();
	95	int cpuA = cputoslice(cpu) == 0;
3c009442	96	unsigned int irq = rt_timer_irq;
1da177e4 LT	97
	98	irq_enter();
	99	write_seqlock(&xtime_lock);
	100
	101	again:
	102	LOCAL_HUB_S(cpuA ? PI_RT_PEND_A : PI_RT_PEND_B, 0); /* Ack */
	103	ct_cur[cpu] += CYCLES_PER_JIFFY;
	104	LOCAL_HUB_S(cpuA ? PI_RT_COMPARE_A : PI_RT_COMPARE_B, ct_cur[cpu]);
	105
	106	if (LOCAL_HUB_L(PI_RT_COUNT) >= ct_cur[cpu])
	107	goto again;
	108
	109	kstat_this_cpu.irqs[irq]++; /* kstat only for bootcpu? */
	110
	111	if (cpu == 0)
3171a030	112	do_timer(1);
1da177e4	113
937a8015	114	update_process_times(user_mode(get_irq_regs()));
1da177e4 LT	115
	116	/*
	117	* If we have an externally synchronized Linux clock, then update
	118	* RTC clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
	119	* called as close as possible to when a second starts.
	120	*/
b149ee22	121	if (ntp_synced() &&
1da177e4 LT	122	xtime.tv_sec > last_rtc_update + 660 &&
	123	(xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
	124	(xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
c0858d82	125	if (rtc_mips_set_time(xtime.tv_sec) == 0) {
1da177e4 LT	126	last_rtc_update = xtime.tv_sec;
	127	} else {
	128	last_rtc_update = xtime.tv_sec - 600;
	129	/* do it again in 60 s */
	130	}
	131	}
	132
	133	write_sequnlock(&xtime_lock);
	134	irq_exit();
	135	}
	136
1da177e4 LT	137	/* Includes for ioc3_init(). */
	138	#include <asm/sn/types.h>
	139	#include <asm/sn/sn0/addrs.h>
	140	#include <asm/sn/sn0/hubni.h>
	141	#include <asm/sn/sn0/hubio.h>
	142	#include <asm/pci/bridge.h>
	143
	144	static __init unsigned long get_m48t35_time(void)
	145	{
	146	unsigned int year, month, date, hour, min, sec;
	147	struct m48t35_rtc *rtc;
	148	nasid_t nid;
	149
	150	nid = get_nasid();
	151	rtc = (struct m48t35_rtc *)(KL_CONFIG_CH_CONS_INFO(nid)->memory_base +
	152	IOC3_BYTEBUS_DEV0);
	153
	154	rtc->control \|= M48T35_RTC_READ;
	155	sec = rtc->sec;
	156	min = rtc->min;
	157	hour = rtc->hour;
	158	date = rtc->date;
	159	month = rtc->month;
	160	year = rtc->year;
	161	rtc->control &= ~M48T35_RTC_READ;
	162
	163	sec = BCD2BIN(sec);
	164	min = BCD2BIN(min);
	165	hour = BCD2BIN(hour);
	166	date = BCD2BIN(date);
	167	month = BCD2BIN(month);
	168	year = BCD2BIN(year);
	169
	170	year += 1970;
	171
	172	return mktime(year, month, date, hour, min, sec);
	173	}
	174
3c009442 RB	175	static void enable_rt_irq(unsigned int irq)
	176	{
	177	}
	178
	179	static void disable_rt_irq(unsigned int irq)
	180	{
	181	}
	182
94dee171	183	static struct irq_chip rt_irq_type = {
3c009442	184	.typename = "SN HUB RT timer",
1603b5ac AN	185	.ack = disable_rt_irq,
	186	.mask = disable_rt_irq,
	187	.mask_ack = disable_rt_irq,
	188	.unmask = enable_rt_irq,
1417836e	189	.eoi = enable_rt_irq,
3c009442 RB	190	};
	191
	192	static struct irqaction rt_irqaction = {
	193	.handler = ip27_rt_timer_interrupt,
f40298fd	194	.flags = IRQF_DISABLED,
3c009442 RB	195	.mask = CPU_MASK_NONE,
	196	.name = "timer"
	197	};
	198
54d0a216	199	void __init plat_timer_setup(struct irqaction *irq)
1da177e4	200	{
3c009442 RB	201	int irqno = allocate_irqno();
	202
	203	if (irqno < 0)
	204	panic("Can't allocate interrupt number for timer interrupt");
	205
1417836e	206	set_irq_chip_and_handler(irqno, &rt_irq_type, handle_percpu_irq);
3c009442	207
1da177e4 LT	208	/* over-write the handler, we use our own way */
	209	irq->handler = no_action;
	210
	211	/* setup irqaction */
3c009442 RB	212	irq_desc[irqno].status \|= IRQ_PER_CPU;
	213
	214	rt_timer_irq = irqno;
bf283630 RB	215	/*
	216	* Only needed to get /proc/interrupt to display timer irq stats
	217	*/
	218	setup_irq(irqno, &rt_irqaction);
1da177e4 LT	219	}
1da177e4 LT	220
00598560	221	static cycle_t ip27_hpt_read(void)
16b7b2ac AN	222	{
	223	return REMOTE_HUB_L(cputonasid(0), PI_RT_COUNT);
	224	}
	225
1da177e4 LT	226	void __init ip27_time_init(void)
1da177e4 LT	227	{
00598560	228	clocksource_mips.read = ip27_hpt_read;
16b7b2ac	229	mips_hpt_frequency = CYCLES_PER_SEC;
1da177e4 LT	230	xtime.tv_sec = get_m48t35_time();
1da177e4 LT	231	xtime.tv_nsec = 0;
1da177e4 LT	232	}
	233
	234	void __init cpu_time_init(void)
	235	{
	236	lboard_t *board;
	237	klcpu_t *cpu;
	238	int cpuid;
	239
	240	/* Don't use ARCS. ARCS is fragile. Klconfig is simple and sane. */
	241	board = find_lboard(KL_CONFIG_INFO(get_nasid()), KLTYPE_IP27);
	242	if (!board)
	243	panic("Can't find board info for myself.");
	244
	245	cpuid = LOCAL_HUB_L(PI_CPU_NUM) ? IP27_CPU0_INDEX : IP27_CPU1_INDEX;
	246	cpu = (klcpu_t *) KLCF_COMP(board, cpuid);
	247	if (!cpu)
	248	panic("No information about myself?");
	249
	250	printk("CPU %d clock is %dMHz.\n", smp_processor_id(), cpu->cpu_speed);
	251
	252	set_c0_status(SRB_TIMOCLK);
	253	}
	254
	255	void __init hub_rtc_init(cnodeid_t cnode)
	256	{
	257	/*
	258	* We only need to initialize the current node.
	259	* If this is not the current node then it is a cpuless
	260	* node and timeouts will not happen there.
	261	*/
	262	if (get_compact_nodeid() == cnode) {
	263	int cpu = smp_processor_id();
	264	LOCAL_HUB_S(PI_RT_EN_A, 1);
	265	LOCAL_HUB_S(PI_RT_EN_B, 1);
	266	LOCAL_HUB_S(PI_PROF_EN_A, 0);
	267	LOCAL_HUB_S(PI_PROF_EN_B, 0);
	268	ct_cur[cpu] = CYCLES_PER_JIFFY;
	269	LOCAL_HUB_S(PI_RT_COMPARE_A, ct_cur[cpu]);
	270	LOCAL_HUB_S(PI_RT_COUNT, 0);
	271	LOCAL_HUB_S(PI_RT_PEND_A, 0);
	272	LOCAL_HUB_S(PI_RT_COMPARE_B, ct_cur[cpu]);
	273	LOCAL_HUB_S(PI_RT_COUNT, 0);
	274	LOCAL_HUB_S(PI_RT_PEND_B, 0);
	275	}
	276	}