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[linux-2.6-block.git] / arch / mips / sgi-ip22 / ip22-int.c
CommitLineData
1da177e4
LT
1/*
2 * ip22-int.c: Routines for generic manipulation of the INT[23] ASIC
3 * found on INDY and Indigo2 workstations.
4 *
5 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
6 * Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org)
7 * Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu)
8 * - Indigo2 changes
9 * - Interrupt handling fixes
10 * Copyright (C) 2001, 2003 Ladislav Michl (ladis@linux-mips.org)
11 */
1da177e4
LT
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/kernel_stat.h>
15#include <linux/signal.h>
16#include <linux/sched.h>
17#include <linux/interrupt.h>
18#include <linux/irq.h>
19
20#include <asm/mipsregs.h>
21#include <asm/addrspace.h>
22
23#include <asm/sgi/ioc.h>
24#include <asm/sgi/hpc3.h>
25#include <asm/sgi/ip22.h>
26
27/* #define DEBUG_SGINT */
28
29/* So far nothing hangs here */
42a3b4f2 30#undef USE_LIO3_IRQ
1da177e4
LT
31
32struct sgint_regs *sgint;
33
34static char lc0msk_to_irqnr[256];
35static char lc1msk_to_irqnr[256];
36static char lc2msk_to_irqnr[256];
37static char lc3msk_to_irqnr[256];
38
1da177e4
LT
39extern int ip22_eisa_init(void);
40
41static void enable_local0_irq(unsigned int irq)
42{
43 unsigned long flags;
44
45 local_irq_save(flags);
46 /* don't allow mappable interrupt to be enabled from setup_irq,
47 * we have our own way to do so */
48 if (irq != SGI_MAP_0_IRQ)
49 sgint->imask0 |= (1 << (irq - SGINT_LOCAL0));
50 local_irq_restore(flags);
51}
52
53static unsigned int startup_local0_irq(unsigned int irq)
54{
55 enable_local0_irq(irq);
56 return 0; /* Never anything pending */
57}
58
59static void disable_local0_irq(unsigned int irq)
60{
61 unsigned long flags;
62
63 local_irq_save(flags);
64 sgint->imask0 &= ~(1 << (irq - SGINT_LOCAL0));
65 local_irq_restore(flags);
66}
67
68#define shutdown_local0_irq disable_local0_irq
69#define mask_and_ack_local0_irq disable_local0_irq
70
71static void end_local0_irq (unsigned int irq)
72{
73 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
74 enable_local0_irq(irq);
75}
76
94dee171 77static struct irq_chip ip22_local0_irq_type = {
1da177e4
LT
78 .typename = "IP22 local 0",
79 .startup = startup_local0_irq,
80 .shutdown = shutdown_local0_irq,
81 .enable = enable_local0_irq,
82 .disable = disable_local0_irq,
83 .ack = mask_and_ack_local0_irq,
84 .end = end_local0_irq,
85};
86
87static void enable_local1_irq(unsigned int irq)
88{
89 unsigned long flags;
90
91 local_irq_save(flags);
92 /* don't allow mappable interrupt to be enabled from setup_irq,
93 * we have our own way to do so */
94 if (irq != SGI_MAP_1_IRQ)
95 sgint->imask1 |= (1 << (irq - SGINT_LOCAL1));
96 local_irq_restore(flags);
97}
98
99static unsigned int startup_local1_irq(unsigned int irq)
100{
101 enable_local1_irq(irq);
102 return 0; /* Never anything pending */
103}
104
105void disable_local1_irq(unsigned int irq)
106{
107 unsigned long flags;
108
109 local_irq_save(flags);
110 sgint->imask1 &= ~(1 << (irq - SGINT_LOCAL1));
111 local_irq_restore(flags);
112}
113
114#define shutdown_local1_irq disable_local1_irq
115#define mask_and_ack_local1_irq disable_local1_irq
116
117static void end_local1_irq (unsigned int irq)
118{
119 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
120 enable_local1_irq(irq);
121}
122
94dee171 123static struct irq_chip ip22_local1_irq_type = {
1da177e4
LT
124 .typename = "IP22 local 1",
125 .startup = startup_local1_irq,
126 .shutdown = shutdown_local1_irq,
127 .enable = enable_local1_irq,
128 .disable = disable_local1_irq,
129 .ack = mask_and_ack_local1_irq,
130 .end = end_local1_irq,
131};
132
133static void enable_local2_irq(unsigned int irq)
134{
135 unsigned long flags;
136
137 local_irq_save(flags);
138 sgint->imask0 |= (1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
139 sgint->cmeimask0 |= (1 << (irq - SGINT_LOCAL2));
140 local_irq_restore(flags);
141}
142
143static unsigned int startup_local2_irq(unsigned int irq)
144{
145 enable_local2_irq(irq);
146 return 0; /* Never anything pending */
147}
148
149void disable_local2_irq(unsigned int irq)
150{
151 unsigned long flags;
152
153 local_irq_save(flags);
154 sgint->cmeimask0 &= ~(1 << (irq - SGINT_LOCAL2));
155 if (!sgint->cmeimask0)
156 sgint->imask0 &= ~(1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
157 local_irq_restore(flags);
158}
159
160#define shutdown_local2_irq disable_local2_irq
161#define mask_and_ack_local2_irq disable_local2_irq
162
163static void end_local2_irq (unsigned int irq)
164{
165 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
166 enable_local2_irq(irq);
167}
168
94dee171 169static struct irq_chip ip22_local2_irq_type = {
1da177e4
LT
170 .typename = "IP22 local 2",
171 .startup = startup_local2_irq,
172 .shutdown = shutdown_local2_irq,
173 .enable = enable_local2_irq,
174 .disable = disable_local2_irq,
175 .ack = mask_and_ack_local2_irq,
176 .end = end_local2_irq,
177};
178
179static void enable_local3_irq(unsigned int irq)
180{
181 unsigned long flags;
182
183 local_irq_save(flags);
184 sgint->imask1 |= (1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
185 sgint->cmeimask1 |= (1 << (irq - SGINT_LOCAL3));
186 local_irq_restore(flags);
187}
188
189static unsigned int startup_local3_irq(unsigned int irq)
190{
191 enable_local3_irq(irq);
192 return 0; /* Never anything pending */
193}
194
195void disable_local3_irq(unsigned int irq)
196{
197 unsigned long flags;
198
199 local_irq_save(flags);
200 sgint->cmeimask1 &= ~(1 << (irq - SGINT_LOCAL3));
201 if (!sgint->cmeimask1)
202 sgint->imask1 &= ~(1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
203 local_irq_restore(flags);
204}
205
206#define shutdown_local3_irq disable_local3_irq
207#define mask_and_ack_local3_irq disable_local3_irq
208
209static void end_local3_irq (unsigned int irq)
210{
211 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
212 enable_local3_irq(irq);
213}
214
94dee171 215static struct irq_chip ip22_local3_irq_type = {
1da177e4
LT
216 .typename = "IP22 local 3",
217 .startup = startup_local3_irq,
218 .shutdown = shutdown_local3_irq,
219 .enable = enable_local3_irq,
220 .disable = disable_local3_irq,
221 .ack = mask_and_ack_local3_irq,
222 .end = end_local3_irq,
223};
224
e4ac58af 225static void indy_local0_irqdispatch(struct pt_regs *regs)
1da177e4
LT
226{
227 u8 mask = sgint->istat0 & sgint->imask0;
228 u8 mask2;
229 int irq;
230
231 if (mask & SGINT_ISTAT0_LIO2) {
232 mask2 = sgint->vmeistat & sgint->cmeimask0;
233 irq = lc2msk_to_irqnr[mask2];
234 } else
235 irq = lc0msk_to_irqnr[mask];
236
237 /* if irq == 0, then the interrupt has already been cleared */
238 if (irq)
239 do_IRQ(irq, regs);
240 return;
241}
242
e4ac58af 243static void indy_local1_irqdispatch(struct pt_regs *regs)
1da177e4
LT
244{
245 u8 mask = sgint->istat1 & sgint->imask1;
246 u8 mask2;
247 int irq;
248
249 if (mask & SGINT_ISTAT1_LIO3) {
250 mask2 = sgint->vmeistat & sgint->cmeimask1;
251 irq = lc3msk_to_irqnr[mask2];
252 } else
253 irq = lc1msk_to_irqnr[mask];
254
255 /* if irq == 0, then the interrupt has already been cleared */
256 if (irq)
257 do_IRQ(irq, regs);
258 return;
259}
260
261extern void ip22_be_interrupt(int irq, struct pt_regs *regs);
262
e4ac58af 263static void indy_buserror_irq(struct pt_regs *regs)
1da177e4
LT
264{
265 int irq = SGI_BUSERR_IRQ;
266
267 irq_enter();
268 kstat_this_cpu.irqs[irq]++;
269 ip22_be_interrupt(irq, regs);
270 irq_exit();
271}
272
42a3b4f2 273static struct irqaction local0_cascade = {
1da177e4 274 .handler = no_action,
f40298fd 275 .flags = IRQF_DISABLED,
1da177e4
LT
276 .name = "local0 cascade",
277};
278
42a3b4f2 279static struct irqaction local1_cascade = {
1da177e4 280 .handler = no_action,
f40298fd 281 .flags = IRQF_DISABLED,
1da177e4
LT
282 .name = "local1 cascade",
283};
284
42a3b4f2 285static struct irqaction buserr = {
1da177e4 286 .handler = no_action,
f40298fd 287 .flags = IRQF_DISABLED,
1da177e4
LT
288 .name = "Bus Error",
289};
290
42a3b4f2 291static struct irqaction map0_cascade = {
1da177e4 292 .handler = no_action,
f40298fd 293 .flags = IRQF_DISABLED,
1da177e4
LT
294 .name = "mapable0 cascade",
295};
296
297#ifdef USE_LIO3_IRQ
42a3b4f2 298static struct irqaction map1_cascade = {
1da177e4 299 .handler = no_action,
f40298fd 300 .flags = IRQF_DISABLED,
1da177e4
LT
301 .name = "mapable1 cascade",
302};
303#define SGI_INTERRUPTS SGINT_END
304#else
305#define SGI_INTERRUPTS SGINT_LOCAL3
306#endif
307
e4ac58af
RB
308extern void indy_r4k_timer_interrupt(struct pt_regs *regs);
309extern void indy_8254timer_irq(struct pt_regs *regs);
310
311/*
312 * IRQs on the INDY look basically (barring software IRQs which we don't use
313 * at all) like:
314 *
315 * MIPS IRQ Source
316 * -------- ------
317 * 0 Software (ignored)
318 * 1 Software (ignored)
319 * 2 Local IRQ level zero
320 * 3 Local IRQ level one
321 * 4 8254 Timer zero
322 * 5 8254 Timer one
323 * 6 Bus Error
324 * 7 R4k timer (what we use)
325 *
326 * We handle the IRQ according to _our_ priority which is:
327 *
328 * Highest ---- R4k Timer
329 * Local IRQ zero
330 * Local IRQ one
331 * Bus Error
332 * 8254 Timer zero
333 * Lowest ---- 8254 Timer one
334 *
335 * then we just return, if multiple IRQs are pending then we will just take
336 * another exception, big deal.
337 */
338
339asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
340{
341 unsigned int pending = read_c0_cause();
342
343 /*
344 * First we check for r4k counter/timer IRQ.
345 */
346 if (pending & CAUSEF_IP7)
347 indy_r4k_timer_interrupt(regs);
348 else if (pending & CAUSEF_IP2)
349 indy_local0_irqdispatch(regs);
350 else if (pending & CAUSEF_IP3)
351 indy_local1_irqdispatch(regs);
352 else if (pending & CAUSEF_IP6)
353 indy_buserror_irq(regs);
354 else if (pending & (CAUSEF_IP4 | CAUSEF_IP5))
355 indy_8254timer_irq(regs);
356}
357
1da177e4
LT
358extern void mips_cpu_irq_init(unsigned int irq_base);
359
360void __init arch_init_irq(void)
361{
362 int i;
363
364 /* Init local mask --> irq tables. */
365 for (i = 0; i < 256; i++) {
366 if (i & 0x80) {
367 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 7;
368 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 7;
369 lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 7;
370 lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 7;
371 } else if (i & 0x40) {
372 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 6;
373 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 6;
374 lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 6;
375 lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 6;
376 } else if (i & 0x20) {
377 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 5;
378 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 5;
379 lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 5;
380 lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 5;
381 } else if (i & 0x10) {
382 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 4;
383 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 4;
384 lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 4;
385 lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 4;
386 } else if (i & 0x08) {
387 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 3;
388 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 3;
389 lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 3;
390 lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 3;
391 } else if (i & 0x04) {
392 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 2;
393 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 2;
394 lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 2;
395 lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 2;
396 } else if (i & 0x02) {
397 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 1;
398 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 1;
399 lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 1;
400 lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 1;
401 } else if (i & 0x01) {
402 lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 0;
403 lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 0;
404 lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 0;
405 lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 0;
406 } else {
407 lc0msk_to_irqnr[i] = 0;
408 lc1msk_to_irqnr[i] = 0;
409 lc2msk_to_irqnr[i] = 0;
410 lc3msk_to_irqnr[i] = 0;
411 }
412 }
413
414 /* Mask out all interrupts. */
415 sgint->imask0 = 0;
416 sgint->imask1 = 0;
417 sgint->cmeimask0 = 0;
418 sgint->cmeimask1 = 0;
419
1da177e4
LT
420 /* init CPU irqs */
421 mips_cpu_irq_init(SGINT_CPU);
422
423 for (i = SGINT_LOCAL0; i < SGI_INTERRUPTS; i++) {
94dee171 424 struct irq_chip *handler;
1da177e4
LT
425
426 if (i < SGINT_LOCAL1)
427 handler = &ip22_local0_irq_type;
428 else if (i < SGINT_LOCAL2)
429 handler = &ip22_local1_irq_type;
430 else if (i < SGINT_LOCAL3)
431 handler = &ip22_local2_irq_type;
432 else
433 handler = &ip22_local3_irq_type;
434
435 irq_desc[i].status = IRQ_DISABLED;
436 irq_desc[i].action = 0;
437 irq_desc[i].depth = 1;
d1bef4ed 438 irq_desc[i].chip = handler;
1da177e4
LT
439 }
440
441 /* vector handler. this register the IRQ as non-sharable */
442 setup_irq(SGI_LOCAL_0_IRQ, &local0_cascade);
443 setup_irq(SGI_LOCAL_1_IRQ, &local1_cascade);
444 setup_irq(SGI_BUSERR_IRQ, &buserr);
445
446 /* cascade in cascade. i love Indy ;-) */
447 setup_irq(SGI_MAP_0_IRQ, &map0_cascade);
448#ifdef USE_LIO3_IRQ
449 setup_irq(SGI_MAP_1_IRQ, &map1_cascade);
450#endif
451
452#ifdef CONFIG_EISA
453 if (ip22_is_fullhouse()) /* Only Indigo-2 has EISA stuff */
454 ip22_eisa_init ();
455#endif
456}