[linux-2.6-block.git] / arch / mips / sgi-ip22 / ip22-int.c

// SPDX-License-Identifier: GPL-2.0
/*
 * ip22-int.c: Routines for generic manipulation of the INT[23] ASIC
 *	       found on INDY and Indigo2 workstations.
 *
 * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
 * Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org)
 * Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu)
 *		      - Indigo2 changes
 *		      - Interrupt handling fixes
 * Copyright (C) 2001, 2003 Ladislav Michl (ladis@linux-mips.org)
 */
#include <linux/types.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/interrupt.h>
#include <linux/ftrace.h>

#include <asm/irq_cpu.h>
#include <asm/sgi/hpc3.h>
#include <asm/sgi/ip22.h>

/* So far nothing hangs here */
#undef USE_LIO3_IRQ

struct sgint_regs *sgint;

static char lc0msk_to_irqnr[256];
static char lc1msk_to_irqnr[256];
static char lc2msk_to_irqnr[256];
static char lc3msk_to_irqnr[256];

extern int ip22_eisa_init(void);

static void enable_local0_irq(struct irq_data *d)
{
	/* don't allow mappable interrupt to be enabled from setup_irq,
	 * we have our own way to do so */
	if (d->irq != SGI_MAP_0_IRQ)
		sgint->imask0 |= (1 << (d->irq - SGINT_LOCAL0));
}

static void disable_local0_irq(struct irq_data *d)
{
	sgint->imask0 &= ~(1 << (d->irq - SGINT_LOCAL0));
}

static struct irq_chip ip22_local0_irq_type = {
	.name		= "IP22 local 0",
	.irq_mask	= disable_local0_irq,
	.irq_unmask	= enable_local0_irq,
};

static void enable_local1_irq(struct irq_data *d)
{
	/* don't allow mappable interrupt to be enabled from setup_irq,
	 * we have our own way to do so */
	if (d->irq != SGI_MAP_1_IRQ)
		sgint->imask1 |= (1 << (d->irq - SGINT_LOCAL1));
}

static void disable_local1_irq(struct irq_data *d)
{
	sgint->imask1 &= ~(1 << (d->irq - SGINT_LOCAL1));
}

static struct irq_chip ip22_local1_irq_type = {
	.name		= "IP22 local 1",
	.irq_mask	= disable_local1_irq,
	.irq_unmask	= enable_local1_irq,
};

static void enable_local2_irq(struct irq_data *d)
{
	sgint->imask0 |= (1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
	sgint->cmeimask0 |= (1 << (d->irq - SGINT_LOCAL2));
}

static void disable_local2_irq(struct irq_data *d)
{
	sgint->cmeimask0 &= ~(1 << (d->irq - SGINT_LOCAL2));
	if (!sgint->cmeimask0)
		sgint->imask0 &= ~(1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
}

static struct irq_chip ip22_local2_irq_type = {
	.name		= "IP22 local 2",
	.irq_mask	= disable_local2_irq,
	.irq_unmask	= enable_local2_irq,
};

static void enable_local3_irq(struct irq_data *d)
{
	sgint->imask1 |= (1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
	sgint->cmeimask1 |= (1 << (d->irq - SGINT_LOCAL3));
}

static void disable_local3_irq(struct irq_data *d)
{
	sgint->cmeimask1 &= ~(1 << (d->irq - SGINT_LOCAL3));
	if (!sgint->cmeimask1)
		sgint->imask1 &= ~(1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
}

static struct irq_chip ip22_local3_irq_type = {
	.name		= "IP22 local 3",
	.irq_mask	= disable_local3_irq,
	.irq_unmask	= enable_local3_irq,
};

static void indy_local0_irqdispatch(void)
{
	u8 mask = sgint->istat0 & sgint->imask0;
	u8 mask2;
	int irq;

	if (mask & SGINT_ISTAT0_LIO2) {
		mask2 = sgint->vmeistat & sgint->cmeimask0;
		irq = lc2msk_to_irqnr[mask2];
	} else
		irq = lc0msk_to_irqnr[mask];

	/*
	 * workaround for INT2 bug; if irq == 0, INT2 has seen a fifo full
	 * irq, but failed to latch it into status register
	 */
	if (irq)
		do_IRQ(irq);
	else
		do_IRQ(SGINT_LOCAL0 + 0);
}

static void indy_local1_irqdispatch(void)
{
	u8 mask = sgint->istat1 & sgint->imask1;
	u8 mask2;
	int irq;

	if (mask & SGINT_ISTAT1_LIO3) {
		mask2 = sgint->vmeistat & sgint->cmeimask1;
		irq = lc3msk_to_irqnr[mask2];
	} else
		irq = lc1msk_to_irqnr[mask];

	/* if irq == 0, then the interrupt has already been cleared */
	if (irq)
		do_IRQ(irq);
}

extern void ip22_be_interrupt(int irq);

static void __irq_entry indy_buserror_irq(void)
{
	int irq = SGI_BUSERR_IRQ;

	irq_enter();
	kstat_incr_irq_this_cpu(irq);
	ip22_be_interrupt(irq);
	irq_exit();
}

static struct irqaction local0_cascade = {
	.handler	= no_action,
	.flags		= IRQF_NO_THREAD,
	.name		= "local0 cascade",
};

static struct irqaction local1_cascade = {
	.handler	= no_action,
	.flags		= IRQF_NO_THREAD,
	.name		= "local1 cascade",
};

static struct irqaction buserr = {
	.handler	= no_action,
	.flags		= IRQF_NO_THREAD,
	.name		= "Bus Error",
};

static struct irqaction map0_cascade = {
	.handler	= no_action,
	.flags		= IRQF_NO_THREAD,
	.name		= "mapable0 cascade",
};

#ifdef USE_LIO3_IRQ
static struct irqaction map1_cascade = {
	.handler	= no_action,
	.flags		= IRQF_NO_THREAD,
	.name		= "mapable1 cascade",
};
#define SGI_INTERRUPTS	SGINT_END
#else
#define SGI_INTERRUPTS	SGINT_LOCAL3
#endif

extern void indy_8254timer_irq(void);

/*
 * IRQs on the INDY look basically (barring software IRQs which we don't use
 * at all) like:
 *
 *	MIPS IRQ	Source
 *	--------	------
 *	       0	Software (ignored)
 *	       1	Software (ignored)
 *	       2	Local IRQ level zero
 *	       3	Local IRQ level one
 *	       4	8254 Timer zero
 *	       5	8254 Timer one
 *	       6	Bus Error
 *	       7	R4k timer (what we use)
 *
 * We handle the IRQ according to _our_ priority which is:
 *
 * Highest ----	    R4k Timer
 *		    Local IRQ zero
 *		    Local IRQ one
 *		    Bus Error
 *		    8254 Timer zero
 * Lowest  ----	    8254 Timer one
 *
 * then we just return, if multiple IRQs are pending then we will just take
 * another exception, big deal.
 */

asmlinkage void plat_irq_dispatch(void)
{
	unsigned int pending = read_c0_status() & read_c0_cause();

	/*
	 * First we check for r4k counter/timer IRQ.
	 */
	if (pending & CAUSEF_IP7)
		do_IRQ(SGI_TIMER_IRQ);
	else if (pending & CAUSEF_IP2)
		indy_local0_irqdispatch();
	else if (pending & CAUSEF_IP3)
		indy_local1_irqdispatch();
	else if (pending & CAUSEF_IP6)
		indy_buserror_irq();
	else if (pending & (CAUSEF_IP4 | CAUSEF_IP5))
		indy_8254timer_irq();
}

void __init arch_init_irq(void)
{
	int i;

	/* Init local mask --> irq tables. */
	for (i = 0; i < 256; i++) {
		if (i & 0x80) {
			lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 7;
			lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 7;
			lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 7;
			lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 7;
		} else if (i & 0x40) {
			lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 6;
			lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 6;
			lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 6;
			lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 6;
		} else if (i & 0x20) {
			lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 5;
			lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 5;
			lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 5;
			lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 5;
		} else if (i & 0x10) {
			lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 4;
			lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 4;
			lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 4;
			lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 4;
		} else if (i & 0x08) {
			lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 3;
			lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 3;
			lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 3;
			lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 3;
		} else if (i & 0x04) {
			lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 2;
			lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 2;
			lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 2;
			lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 2;
		} else if (i & 0x02) {
			lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 1;
			lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 1;
			lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 1;
			lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 1;
		} else if (i & 0x01) {
			lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 0;
			lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 0;
			lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 0;
			lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 0;
		} else {
			lc0msk_to_irqnr[i] = 0;
			lc1msk_to_irqnr[i] = 0;
			lc2msk_to_irqnr[i] = 0;
			lc3msk_to_irqnr[i] = 0;
		}
	}

	/* Mask out all interrupts. */
	sgint->imask0 = 0;
	sgint->imask1 = 0;
	sgint->cmeimask0 = 0;
	sgint->cmeimask1 = 0;

	/* init CPU irqs */
	mips_cpu_irq_init();

	for (i = SGINT_LOCAL0; i < SGI_INTERRUPTS; i++) {
		struct irq_chip *handler;

		if (i < SGINT_LOCAL1)
			handler		= &ip22_local0_irq_type;
		else if (i < SGINT_LOCAL2)
			handler		= &ip22_local1_irq_type;
		else if (i < SGINT_LOCAL3)
			handler		= &ip22_local2_irq_type;
		else
			handler		= &ip22_local3_irq_type;

		irq_set_chip_and_handler(i, handler, handle_level_irq);
	}

	/* vector handler. this register the IRQ as non-sharable */
	setup_irq(SGI_LOCAL_0_IRQ, &local0_cascade);
	setup_irq(SGI_LOCAL_1_IRQ, &local1_cascade);
	setup_irq(SGI_BUSERR_IRQ, &buserr);

	/* cascade in cascade. i love Indy ;-) */
	setup_irq(SGI_MAP_0_IRQ, &map0_cascade);
#ifdef USE_LIO3_IRQ
	setup_irq(SGI_MAP_1_IRQ, &map1_cascade);
#endif

#ifdef CONFIG_EISA
	if (ip22_is_fullhouse())	/* Only Indigo-2 has EISA stuff */
		ip22_eisa_init();
#endif
}
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
1da177e4 LT	2	/*
1da177e4 LT	3	* ip22-int.c: Routines for generic manipulation of the INT[23] ASIC
70342287	4	* found on INDY and Indigo2 workstations.
1da177e4	5	*
79add627	6	* Copyright (C) 1996 David S. Miller (davem@davemloft.net)
1da177e4 LT	7	* Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org)
1da177e4 LT	8	* Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu)
70342287 RB	9	* - Indigo2 changes
70342287 RB	10	* - Interrupt handling fixes
1da177e4 LT	11	* Copyright (C) 2001, 2003 Ladislav Michl (ladis@linux-mips.org)
1da177e4 LT	12	*/
1da177e4 LT	13	#include <linux/types.h>
	14	#include <linux/init.h>
	15	#include <linux/kernel_stat.h>
1da177e4	16	#include <linux/interrupt.h>
8f99a162	17	#include <linux/ftrace.h>
1da177e4	18
97dcb82d	19	#include <asm/irq_cpu.h>
1da177e4 LT	20	#include <asm/sgi/hpc3.h>
1da177e4 LT	21	#include <asm/sgi/ip22.h>
1da177e4 LT	22
1da177e4 LT	23	/* So far nothing hangs here */
42a3b4f2	24	#undef USE_LIO3_IRQ
1da177e4 LT	25
	26	struct sgint_regs *sgint;
	27
	28	static char lc0msk_to_irqnr[256];
	29	static char lc1msk_to_irqnr[256];
	30	static char lc2msk_to_irqnr[256];
	31	static char lc3msk_to_irqnr[256];
	32
1da177e4 LT	33	extern int ip22_eisa_init(void);
1da177e4 LT	34
9458ea56	35	static void enable_local0_irq(struct irq_data *d)
1da177e4	36	{
1da177e4 LT	37	/* don't allow mappable interrupt to be enabled from setup_irq,
1da177e4 LT	38	* we have our own way to do so */
9458ea56 TG	39	if (d->irq != SGI_MAP_0_IRQ)
9458ea56 TG	40	sgint->imask0 \|= (1 << (d->irq - SGINT_LOCAL0));
1da177e4 LT	41	}
1da177e4 LT	42
9458ea56	43	static void disable_local0_irq(struct irq_data *d)
1da177e4	44	{
9458ea56	45	sgint->imask0 &= ~(1 << (d->irq - SGINT_LOCAL0));
1da177e4 LT	46	}
1da177e4 LT	47
94dee171	48	static struct irq_chip ip22_local0_irq_type = {
70d21cde	49	.name = "IP22 local 0",
9458ea56 TG	50	.irq_mask = disable_local0_irq,
9458ea56 TG	51	.irq_unmask = enable_local0_irq,
1da177e4 LT	52	};
1da177e4 LT	53
9458ea56	54	static void enable_local1_irq(struct irq_data *d)
1da177e4	55	{
1da177e4 LT	56	/* don't allow mappable interrupt to be enabled from setup_irq,
1da177e4 LT	57	* we have our own way to do so */
9458ea56 TG	58	if (d->irq != SGI_MAP_1_IRQ)
9458ea56 TG	59	sgint->imask1 \|= (1 << (d->irq - SGINT_LOCAL1));
1da177e4 LT	60	}
1da177e4 LT	61
9458ea56	62	static void disable_local1_irq(struct irq_data *d)
1da177e4	63	{
9458ea56	64	sgint->imask1 &= ~(1 << (d->irq - SGINT_LOCAL1));
1da177e4 LT	65	}
1da177e4 LT	66
94dee171	67	static struct irq_chip ip22_local1_irq_type = {
70d21cde	68	.name = "IP22 local 1",
9458ea56 TG	69	.irq_mask = disable_local1_irq,
9458ea56 TG	70	.irq_unmask = enable_local1_irq,
1da177e4 LT	71	};
1da177e4 LT	72
9458ea56	73	static void enable_local2_irq(struct irq_data *d)
1da177e4	74	{
1da177e4	75	sgint->imask0 \|= (1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
9458ea56	76	sgint->cmeimask0 \|= (1 << (d->irq - SGINT_LOCAL2));
1da177e4 LT	77	}
1da177e4 LT	78
9458ea56	79	static void disable_local2_irq(struct irq_data *d)
1da177e4	80	{
9458ea56	81	sgint->cmeimask0 &= ~(1 << (d->irq - SGINT_LOCAL2));
1da177e4 LT	82	if (!sgint->cmeimask0)
1da177e4 LT	83	sgint->imask0 &= ~(1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
1da177e4 LT	84	}
1da177e4 LT	85
94dee171	86	static struct irq_chip ip22_local2_irq_type = {
70d21cde	87	.name = "IP22 local 2",
9458ea56 TG	88	.irq_mask = disable_local2_irq,
9458ea56 TG	89	.irq_unmask = enable_local2_irq,
1da177e4 LT	90	};
1da177e4 LT	91
9458ea56	92	static void enable_local3_irq(struct irq_data *d)
1da177e4	93	{
1da177e4	94	sgint->imask1 \|= (1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
9458ea56	95	sgint->cmeimask1 \|= (1 << (d->irq - SGINT_LOCAL3));
1da177e4 LT	96	}
1da177e4 LT	97
9458ea56	98	static void disable_local3_irq(struct irq_data *d)
1da177e4	99	{
9458ea56	100	sgint->cmeimask1 &= ~(1 << (d->irq - SGINT_LOCAL3));
1da177e4 LT	101	if (!sgint->cmeimask1)
1da177e4 LT	102	sgint->imask1 &= ~(1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
1da177e4 LT	103	}
1da177e4 LT	104
94dee171	105	static struct irq_chip ip22_local3_irq_type = {
70d21cde	106	.name = "IP22 local 3",
9458ea56 TG	107	.irq_mask = disable_local3_irq,
9458ea56 TG	108	.irq_unmask = enable_local3_irq,
1da177e4 LT	109	};
1da177e4 LT	110
937a8015	111	static void indy_local0_irqdispatch(void)
1da177e4 LT	112	{
	113	u8 mask = sgint->istat0 & sgint->imask0;
	114	u8 mask2;
	115	int irq;
	116
	117	if (mask & SGINT_ISTAT0_LIO2) {
	118	mask2 = sgint->vmeistat & sgint->cmeimask0;
	119	irq = lc2msk_to_irqnr[mask2];
	120	} else
	121	irq = lc0msk_to_irqnr[mask];
	122
1d421ca9 TB	123	/*
	124	* workaround for INT2 bug; if irq == 0, INT2 has seen a fifo full
	125	* irq, but failed to latch it into status register
	126	*/
1da177e4	127	if (irq)
937a8015	128	do_IRQ(irq);
1d421ca9 TB	129	else
1d421ca9 TB	130	do_IRQ(SGINT_LOCAL0 + 0);
1da177e4 LT	131	}
1da177e4 LT	132
937a8015	133	static void indy_local1_irqdispatch(void)
1da177e4 LT	134	{
	135	u8 mask = sgint->istat1 & sgint->imask1;
	136	u8 mask2;
	137	int irq;
	138
	139	if (mask & SGINT_ISTAT1_LIO3) {
	140	mask2 = sgint->vmeistat & sgint->cmeimask1;
	141	irq = lc3msk_to_irqnr[mask2];
	142	} else
	143	irq = lc1msk_to_irqnr[mask];
	144
	145	/* if irq == 0, then the interrupt has already been cleared */
	146	if (irq)
937a8015	147	do_IRQ(irq);
1da177e4 LT	148	}
1da177e4 LT	149
937a8015	150	extern void ip22_be_interrupt(int irq);
1da177e4	151
8f99a162	152	static void __irq_entry indy_buserror_irq(void)
1da177e4 LT	153	{
	154	int irq = SGI_BUSERR_IRQ;
	155
	156	irq_enter();
310ff2c8	157	kstat_incr_irq_this_cpu(irq);
937a8015	158	ip22_be_interrupt(irq);
1da177e4 LT	159	irq_exit();
	160	}
	161
42a3b4f2	162	static struct irqaction local0_cascade = {
1da177e4	163	.handler = no_action,
8b5690f8	164	.flags = IRQF_NO_THREAD,
1da177e4 LT	165	.name = "local0 cascade",
	166	};
	167
42a3b4f2	168	static struct irqaction local1_cascade = {
1da177e4	169	.handler = no_action,
8b5690f8	170	.flags = IRQF_NO_THREAD,
1da177e4 LT	171	.name = "local1 cascade",
	172	};
	173
42a3b4f2	174	static struct irqaction buserr = {
1da177e4	175	.handler = no_action,
8b5690f8	176	.flags = IRQF_NO_THREAD,
1da177e4 LT	177	.name = "Bus Error",
	178	};
	179
42a3b4f2	180	static struct irqaction map0_cascade = {
1da177e4	181	.handler = no_action,
8b5690f8	182	.flags = IRQF_NO_THREAD,
1da177e4 LT	183	.name = "mapable0 cascade",
	184	};
	185
	186	#ifdef USE_LIO3_IRQ
42a3b4f2	187	static struct irqaction map1_cascade = {
1da177e4	188	.handler = no_action,
8b5690f8	189	.flags = IRQF_NO_THREAD,
1da177e4 LT	190	.name = "mapable1 cascade",
	191	};
	192	#define SGI_INTERRUPTS SGINT_END
	193	#else
	194	#define SGI_INTERRUPTS SGINT_LOCAL3
	195	#endif
	196
937a8015	197	extern void indy_8254timer_irq(void);
e4ac58af RB	198
	199	/*
	200	* IRQs on the INDY look basically (barring software IRQs which we don't use
	201	* at all) like:
	202	*
	203	* MIPS IRQ Source
70342287 RB	204	* -------- ------
	205	* 0 Software (ignored)
	206	* 1 Software (ignored)
	207	* 2 Local IRQ level zero
	208	* 3 Local IRQ level one
	209	* 4 8254 Timer zero
	210	* 5 8254 Timer one
	211	* 6 Bus Error
	212	* 7 R4k timer (what we use)
e4ac58af RB	213	*
	214	* We handle the IRQ according to _our_ priority which is:
	215	*
70342287 RB	216	* Highest ---- R4k Timer
	217	* Local IRQ zero
	218	* Local IRQ one
	219	* Bus Error
	220	* 8254 Timer zero
	221	* Lowest ---- 8254 Timer one
e4ac58af RB	222	*
	223	* then we just return, if multiple IRQs are pending then we will just take
	224	* another exception, big deal.
	225	*/
	226
937a8015	227	asmlinkage void plat_irq_dispatch(void)
e4ac58af	228	{
119537c0	229	unsigned int pending = read_c0_status() & read_c0_cause();
e4ac58af RB	230
	231	/*
	232	* First we check for r4k counter/timer IRQ.
	233	*/
	234	if (pending & CAUSEF_IP7)
7bcf7717	235	do_IRQ(SGI_TIMER_IRQ);
e4ac58af	236	else if (pending & CAUSEF_IP2)
937a8015	237	indy_local0_irqdispatch();
e4ac58af	238	else if (pending & CAUSEF_IP3)
937a8015	239	indy_local1_irqdispatch();
e4ac58af	240	else if (pending & CAUSEF_IP6)
937a8015	241	indy_buserror_irq();
e4ac58af	242	else if (pending & (CAUSEF_IP4 \| CAUSEF_IP5))
937a8015	243	indy_8254timer_irq();
e4ac58af RB	244	}
e4ac58af RB	245
1da177e4 LT	246	void __init arch_init_irq(void)
	247	{
	248	int i;
	249
	250	/* Init local mask --> irq tables. */
	251	for (i = 0; i < 256; i++) {
	252	if (i & 0x80) {
	253	lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 7;
	254	lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 7;
	255	lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 7;
	256	lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 7;
	257	} else if (i & 0x40) {
	258	lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 6;
	259	lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 6;
	260	lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 6;
	261	lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 6;
	262	} else if (i & 0x20) {
	263	lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 5;
	264	lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 5;
	265	lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 5;
	266	lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 5;
	267	} else if (i & 0x10) {
	268	lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 4;
	269	lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 4;
	270	lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 4;
	271	lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 4;
	272	} else if (i & 0x08) {
	273	lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 3;
	274	lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 3;
	275	lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 3;
	276	lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 3;
	277	} else if (i & 0x04) {
	278	lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 2;
	279	lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 2;
	280	lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 2;
	281	lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 2;
	282	} else if (i & 0x02) {
	283	lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 1;
	284	lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 1;
	285	lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 1;
	286	lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 1;
	287	} else if (i & 0x01) {
	288	lc0msk_to_irqnr[i] = SGINT_LOCAL0 + 0;
	289	lc1msk_to_irqnr[i] = SGINT_LOCAL1 + 0;
	290	lc2msk_to_irqnr[i] = SGINT_LOCAL2 + 0;
	291	lc3msk_to_irqnr[i] = SGINT_LOCAL3 + 0;
	292	} else {
	293	lc0msk_to_irqnr[i] = 0;
	294	lc1msk_to_irqnr[i] = 0;
	295	lc2msk_to_irqnr[i] = 0;
	296	lc3msk_to_irqnr[i] = 0;
	297	}
	298	}
	299
	300	/* Mask out all interrupts. */
	301	sgint->imask0 = 0;
	302	sgint->imask1 = 0;
	303	sgint->cmeimask0 = 0;
	304	sgint->cmeimask1 = 0;
	305
1da177e4	306	/* init CPU irqs */
97dcb82d	307	mips_cpu_irq_init();
1da177e4 LT	308
1da177e4 LT	309	for (i = SGINT_LOCAL0; i < SGI_INTERRUPTS; i++) {
94dee171	310	struct irq_chip *handler;
1da177e4 LT	311
	312	if (i < SGINT_LOCAL1)
	313	handler = &ip22_local0_irq_type;
	314	else if (i < SGINT_LOCAL2)
	315	handler = &ip22_local1_irq_type;
	316	else if (i < SGINT_LOCAL3)
	317	handler = &ip22_local2_irq_type;
	318	else
	319	handler = &ip22_local3_irq_type;
	320
e4ec7989	321	irq_set_chip_and_handler(i, handler, handle_level_irq);
1da177e4 LT	322	}
	323
	324	/* vector handler. this register the IRQ as non-sharable */
	325	setup_irq(SGI_LOCAL_0_IRQ, &local0_cascade);
	326	setup_irq(SGI_LOCAL_1_IRQ, &local1_cascade);
	327	setup_irq(SGI_BUSERR_IRQ, &buserr);
	328
	329	/* cascade in cascade. i love Indy ;-) */
	330	setup_irq(SGI_MAP_0_IRQ, &map0_cascade);
	331	#ifdef USE_LIO3_IRQ
	332	setup_irq(SGI_MAP_1_IRQ, &map1_cascade);
	333	#endif
	334
	335	#ifdef CONFIG_EISA
	336	if (ip22_is_fullhouse()) /* Only Indigo-2 has EISA stuff */
14823ccb	337	ip22_eisa_init();
1da177e4 LT	338	#endif
1da177e4 LT	339	}