[linux-2.6-block.git] / arch / mips / rb532 / devices.c

/*
 *  RouterBoard 500 Platform devices
 *
 *  Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
 *  Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 *  GNU General Public License for more details.
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/ctype.h>
#include <linux/string.h>
#include <linux/platform_device.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>

#include <asm/bootinfo.h>

#include <asm/mach-rc32434/rc32434.h>
#include <asm/mach-rc32434/dma.h>
#include <asm/mach-rc32434/dma_v.h>
#include <asm/mach-rc32434/eth.h>
#include <asm/mach-rc32434/rb.h>
#include <asm/mach-rc32434/integ.h>
#include <asm/mach-rc32434/gpio.h>
#include <asm/mach-rc32434/irq.h>

#define ETH0_RX_DMA_ADDR  (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET)
#define ETH0_TX_DMA_ADDR  (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET)

static struct resource korina_dev0_res[] = {
	{
		.name = "korina_regs",
		.start = ETH0_BASE_ADDR,
		.end = ETH0_BASE_ADDR + sizeof(struct eth_regs),
		.flags = IORESOURCE_MEM,
	 }, {
		.name = "korina_rx",
		.start = ETH0_DMA_RX_IRQ,
		.end = ETH0_DMA_RX_IRQ,
		.flags = IORESOURCE_IRQ
	}, {
		.name = "korina_tx",
		.start = ETH0_DMA_TX_IRQ,
		.end = ETH0_DMA_TX_IRQ,
		.flags = IORESOURCE_IRQ
	}, {
		.name = "korina_ovr",
		.start = ETH0_RX_OVR_IRQ,
		.end = ETH0_RX_OVR_IRQ,
		.flags = IORESOURCE_IRQ
	}, {
		.name = "korina_und",
		.start = ETH0_TX_UND_IRQ,
		.end = ETH0_TX_UND_IRQ,
		.flags = IORESOURCE_IRQ
	}, {
		.name = "korina_dma_rx",
		.start = ETH0_RX_DMA_ADDR,
		.end = ETH0_RX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
		.flags = IORESOURCE_MEM,
	 }, {
		.name = "korina_dma_tx",
		.start = ETH0_TX_DMA_ADDR,
		.end = ETH0_TX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
		.flags = IORESOURCE_MEM,
	 }
};

static struct korina_device korina_dev0_data = {
	.name = "korina0",
	.mac = {0xde, 0xca, 0xff, 0xc0, 0xff, 0xee}
};

static struct platform_device korina_dev0 = {
	.id = -1,
	.name = "korina",
	.dev.platform_data = &korina_dev0_data,
	.resource = korina_dev0_res,
	.num_resources = ARRAY_SIZE(korina_dev0_res),
};

static struct resource cf_slot0_res[] = {
	{
		.name = "cf_membase",
		.flags = IORESOURCE_MEM
	}, {
		.name = "cf_irq",
		.start = (8 + 4 * 32 + CF_GPIO_NUM),	/* 149 */
		.end = (8 + 4 * 32 + CF_GPIO_NUM),
		.flags = IORESOURCE_IRQ
	}
};

static struct cf_device cf_slot0_data = {
	.gpio_pin = CF_GPIO_NUM
};

static struct platform_device cf_slot0 = {
	.id = -1,
	.name = "pata-rb532-cf",
	.dev.platform_data = &cf_slot0_data,
	.resource = cf_slot0_res,
	.num_resources = ARRAY_SIZE(cf_slot0_res),
};

/* Resources and device for NAND */
static int rb532_dev_ready(struct mtd_info *mtd)
{
	return gpio_get_value(GPIO_RDY);
}

static void rb532_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
	struct nand_chip *chip = mtd->priv;
	unsigned char orbits, nandbits;

	if (ctrl & NAND_CTRL_CHANGE) {
		orbits = (ctrl & NAND_CLE) << 1;
		orbits |= (ctrl & NAND_ALE) >> 1;

		nandbits = (~ctrl & NAND_CLE) << 1;
		nandbits |= (~ctrl & NAND_ALE) >> 1;

		set_latch_u5(orbits, nandbits);
	}
	if (cmd != NAND_CMD_NONE)
		writeb(cmd, chip->IO_ADDR_W);
}

static struct resource nand_slot0_res[] = {
	[0] = {
		.name = "nand_membase",
		.flags = IORESOURCE_MEM
	}
};

static struct platform_nand_data rb532_nand_data = {
	.ctrl.dev_ready = rb532_dev_ready,
	.ctrl.cmd_ctrl	= rb532_cmd_ctrl,
};

static struct platform_device nand_slot0 = {
	.name = "gen_nand",
	.id = -1,
	.resource = nand_slot0_res,
	.num_resources = ARRAY_SIZE(nand_slot0_res),
	.dev.platform_data = &rb532_nand_data,
};

static struct mtd_partition rb532_partition_info[] = {
	{
		.name = "Routerboard NAND boot",
		.offset = 0,
		.size = 4 * 1024 * 1024,
	}, {
		.name = "rootfs",
		.offset = MTDPART_OFS_NXTBLK,
		.size = MTDPART_SIZ_FULL,
	}
};

static struct platform_device rb532_led = {
	.name = "rb532-led",
	.id = -1,
};

static struct gpio_keys_button rb532_gpio_btn[] = {
	{
		.gpio = 1,
		.code = BTN_0,
		.desc = "S1",
		.active_low = 1,
	}
};

static struct gpio_keys_platform_data rb532_gpio_btn_data = {
	.buttons = rb532_gpio_btn,
	.nbuttons = ARRAY_SIZE(rb532_gpio_btn),
};

static struct platform_device rb532_button = {
	.name 	= "gpio-keys",
	.id	= -1,
	.dev	= {
		.platform_data = &rb532_gpio_btn_data,
	}
};

static struct resource rb532_wdt_res[] = {
	{
		.name = "rb532_wdt_res",
		.start = INTEG0_BASE_ADDR,
		.end = INTEG0_BASE_ADDR + sizeof(struct integ),
		.flags = IORESOURCE_MEM,
	}
};

static struct platform_device rb532_wdt = {
	.name 		= "rc32434_wdt",
	.id 		= -1,
	.resource 	= rb532_wdt_res,
	.num_resources	= ARRAY_SIZE(rb532_wdt_res),
};

static struct platform_device *rb532_devs[] = {
	&korina_dev0,
	&nand_slot0,
	&cf_slot0,
	&rb532_led,
	&rb532_button,
	&rb532_wdt
};

static void __init parse_mac_addr(char *macstr)
{
	int i, j;
	unsigned char result, value;

	for (i = 0; i < 6; i++) {
		result = 0;

		if (i != 5 && *(macstr + 2) != ':')
			return;

		for (j = 0; j < 2; j++) {
			if (isxdigit(*macstr)
			    && (value =
				isdigit(*macstr) ? *macstr -
				'0' : toupper(*macstr) - 'A' + 10) < 16) {
				result = result * 16 + value;
				macstr++;
			} else
				return;
		}

		macstr++;
		korina_dev0_data.mac[i] = result;
	}
}


/* NAND definitions */
#define NAND_CHIP_DELAY	25

static void __init rb532_nand_setup(void)
{
	switch (mips_machtype) {
	case MACH_MIKROTIK_RB532A:
		set_latch_u5(LO_FOFF | LO_CEX,
				LO_ULED | LO_ALE | LO_CLE | LO_WPX);
		break;
	default:
		set_latch_u5(LO_WPX | LO_FOFF | LO_CEX,
				LO_ULED | LO_ALE | LO_CLE);
		break;
	}

	/* Setup NAND specific settings */
	rb532_nand_data.chip.nr_chips = 1;
	rb532_nand_data.chip.nr_partitions = ARRAY_SIZE(rb532_partition_info);
	rb532_nand_data.chip.partitions = rb532_partition_info;
	rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY;
	rb532_nand_data.chip.options = NAND_NO_AUTOINCR;
}


static int __init plat_setup_devices(void)
{
	/* Look for the CF card reader */
	if (!readl(IDT434_REG_BASE + DEV1MASK))
		rb532_devs[2] = NULL;	/* disable cf_slot0 at index 2 */
	else {
		cf_slot0_res[0].start =
		    readl(IDT434_REG_BASE + DEV1BASE);
		cf_slot0_res[0].end = cf_slot0_res[0].start + 0x1000;
	}

	/* Read the NAND resources from the device controller */
	nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE);
	nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000;

	/* Initialise the NAND device */
	rb532_nand_setup();

	return platform_add_devices(rb532_devs, ARRAY_SIZE(rb532_devs));
}

static int __init setup_kmac(char *s)
{
	printk(KERN_INFO "korina mac = %s\n", s);
	parse_mac_addr(s);
	return 0;
}

__setup("kmac=", setup_kmac);

arch_initcall(plat_setup_devices);
Commit	Line	Data
73b4390f RB	1	/*
	2	* RouterBoard 500 Platform devices
	3	*
	4	* Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
	5	* Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*/
	17	#include <linux/kernel.h>
	18	#include <linux/init.h>
	19	#include <linux/ctype.h>
	20	#include <linux/string.h>
	21	#include <linux/platform_device.h>
	22	#include <linux/mtd/nand.h>
	23	#include <linux/mtd/mtd.h>
	24	#include <linux/mtd/partitions.h>
	25	#include <linux/gpio_keys.h>
	26	#include <linux/input.h>
	27
	28	#include <asm/bootinfo.h>
	29
	30	#include <asm/mach-rc32434/rc32434.h>
	31	#include <asm/mach-rc32434/dma.h>
	32	#include <asm/mach-rc32434/dma_v.h>
	33	#include <asm/mach-rc32434/eth.h>
	34	#include <asm/mach-rc32434/rb.h>
	35	#include <asm/mach-rc32434/integ.h>
	36	#include <asm/mach-rc32434/gpio.h>
3cd4e067	37	#include <asm/mach-rc32434/irq.h>
73b4390f RB	38
	39	#define ETH0_RX_DMA_ADDR (DMA0_BASE_ADDR + 0 * DMA_CHAN_OFFSET)
	40	#define ETH0_TX_DMA_ADDR (DMA0_BASE_ADDR + 1 * DMA_CHAN_OFFSET)
	41
73b4390f RB	42	static struct resource korina_dev0_res[] = {
	43	{
	44	.name = "korina_regs",
	45	.start = ETH0_BASE_ADDR,
	46	.end = ETH0_BASE_ADDR + sizeof(struct eth_regs),
	47	.flags = IORESOURCE_MEM,
	48	}, {
	49	.name = "korina_rx",
	50	.start = ETH0_DMA_RX_IRQ,
	51	.end = ETH0_DMA_RX_IRQ,
	52	.flags = IORESOURCE_IRQ
	53	}, {
	54	.name = "korina_tx",
	55	.start = ETH0_DMA_TX_IRQ,
	56	.end = ETH0_DMA_TX_IRQ,
	57	.flags = IORESOURCE_IRQ
	58	}, {
	59	.name = "korina_ovr",
	60	.start = ETH0_RX_OVR_IRQ,
	61	.end = ETH0_RX_OVR_IRQ,
	62	.flags = IORESOURCE_IRQ
	63	}, {
	64	.name = "korina_und",
	65	.start = ETH0_TX_UND_IRQ,
	66	.end = ETH0_TX_UND_IRQ,
	67	.flags = IORESOURCE_IRQ
	68	}, {
	69	.name = "korina_dma_rx",
	70	.start = ETH0_RX_DMA_ADDR,
	71	.end = ETH0_RX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
	72	.flags = IORESOURCE_MEM,
	73	}, {
	74	.name = "korina_dma_tx",
	75	.start = ETH0_TX_DMA_ADDR,
	76	.end = ETH0_TX_DMA_ADDR + DMA_CHAN_OFFSET - 1,
	77	.flags = IORESOURCE_MEM,
	78	}
	79	};
	80
	81	static struct korina_device korina_dev0_data = {
	82	.name = "korina0",
	83	.mac = {0xde, 0xca, 0xff, 0xc0, 0xff, 0xee}
	84	};
	85
	86	static struct platform_device korina_dev0 = {
b6e2f58a	87	.id = -1,
73b4390f RB	88	.name = "korina",
	89	.dev.platform_data = &korina_dev0_data,
	90	.resource = korina_dev0_res,
	91	.num_resources = ARRAY_SIZE(korina_dev0_res),
	92	};
	93
73b4390f RB	94	static struct resource cf_slot0_res[] = {
	95	{
	96	.name = "cf_membase",
	97	.flags = IORESOURCE_MEM
	98	}, {
	99	.name = "cf_irq",
	100	.start = (8 + 4 * 32 + CF_GPIO_NUM), /* 149 */
	101	.end = (8 + 4 * 32 + CF_GPIO_NUM),
	102	.flags = IORESOURCE_IRQ
	103	}
	104	};
	105
	106	static struct cf_device cf_slot0_data = {
3cd4e067	107	.gpio_pin = CF_GPIO_NUM
73b4390f RB	108	};
	109
	110	static struct platform_device cf_slot0 = {
b6e2f58a	111	.id = -1,
73b4390f RB	112	.name = "pata-rb532-cf",
	113	.dev.platform_data = &cf_slot0_data,
	114	.resource = cf_slot0_res,
	115	.num_resources = ARRAY_SIZE(cf_slot0_res),
	116	};
	117
	118	/* Resources and device for NAND */
	119	static int rb532_dev_ready(struct mtd_info *mtd)
	120	{
1b432840	121	return gpio_get_value(GPIO_RDY);
73b4390f RB	122	}
	123
	124	static void rb532_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
	125	{
	126	struct nand_chip *chip = mtd->priv;
	127	unsigned char orbits, nandbits;
	128
	129	if (ctrl & NAND_CTRL_CHANGE) {
	130	orbits = (ctrl & NAND_CLE) << 1;
	131	orbits \|= (ctrl & NAND_ALE) >> 1;
	132
	133	nandbits = (~ctrl & NAND_CLE) << 1;
	134	nandbits \|= (~ctrl & NAND_ALE) >> 1;
	135
	136	set_latch_u5(orbits, nandbits);
	137	}
	138	if (cmd != NAND_CMD_NONE)
	139	writeb(cmd, chip->IO_ADDR_W);
	140	}
	141
	142	static struct resource nand_slot0_res[] = {
	143	[0] = {
	144	.name = "nand_membase",
	145	.flags = IORESOURCE_MEM
	146	}
	147	};
	148
	149	static struct platform_nand_data rb532_nand_data = {
	150	.ctrl.dev_ready = rb532_dev_ready,
	151	.ctrl.cmd_ctrl = rb532_cmd_ctrl,
	152	};
	153
	154	static struct platform_device nand_slot0 = {
	155	.name = "gen_nand",
	156	.id = -1,
	157	.resource = nand_slot0_res,
	158	.num_resources = ARRAY_SIZE(nand_slot0_res),
	159	.dev.platform_data = &rb532_nand_data,
	160	};
	161
	162	static struct mtd_partition rb532_partition_info[] = {
	163	{
	164	.name = "Routerboard NAND boot",
	165	.offset = 0,
	166	.size = 4 * 1024 * 1024,
	167	}, {
	168	.name = "rootfs",
	169	.offset = MTDPART_OFS_NXTBLK,
	170	.size = MTDPART_SIZ_FULL,
	171	}
	172	};
	173
	174	static struct platform_device rb532_led = {
	175	.name = "rb532-led",
b6e2f58a	176	.id = -1,
73b4390f RB	177	};
	178
	179	static struct gpio_keys_button rb532_gpio_btn[] = {
	180	{
	181	.gpio = 1,
	182	.code = BTN_0,
	183	.desc = "S1",
	184	.active_low = 1,
	185	}
	186	};
	187
	188	static struct gpio_keys_platform_data rb532_gpio_btn_data = {
	189	.buttons = rb532_gpio_btn,
	190	.nbuttons = ARRAY_SIZE(rb532_gpio_btn),
	191	};
	192
	193	static struct platform_device rb532_button = {
	194	.name = "gpio-keys",
	195	.id = -1,
	196	.dev = {
	197	.platform_data = &rb532_gpio_btn_data,
	198	}
	199	};
	200
	201	static struct resource rb532_wdt_res[] = {
	202	{
	203	.name = "rb532_wdt_res",
	204	.start = INTEG0_BASE_ADDR,
	205	.end = INTEG0_BASE_ADDR + sizeof(struct integ),
	206	.flags = IORESOURCE_MEM,
	207	}
	208	};
	209
	210	static struct platform_device rb532_wdt = {
	211	.name = "rc32434_wdt",
	212	.id = -1,
	213	.resource = rb532_wdt_res,
	214	.num_resources = ARRAY_SIZE(rb532_wdt_res),
	215	};
	216
	217	static struct platform_device *rb532_devs[] = {
	218	&korina_dev0,
	219	&nand_slot0,
	220	&cf_slot0,
	221	&rb532_led,
	222	&rb532_button,
	223	&rb532_wdt
	224	};
	225
	226	static void __init parse_mac_addr(char *macstr)
	227	{
	228	int i, j;
	229	unsigned char result, value;
	230
	231	for (i = 0; i < 6; i++) {
	232	result = 0;
	233
	234	if (i != 5 && *(macstr + 2) != ':')
	235	return;
	236
	237	for (j = 0; j < 2; j++) {
	238	if (isxdigit(*macstr)
	239	&& (value =
	240	isdigit(macstr) ? macstr -
241	'0' : toupper(*macstr) - 'A' + 10) < 16) {
242	result = result * 16 + value;
243	macstr++;
244	} else
245	return;
246	}
247
248	macstr++;
249	korina_dev0_data.mac[i] = result;
250	}
251	}
252
253
73b4390f RB	254	/* NAND definitions */
	255	#define NAND_CHIP_DELAY 25
	256
	257	static void __init rb532_nand_setup(void)
	258	{
	259	switch (mips_machtype) {
	260	case MACH_MIKROTIK_RB532A:
	261	set_latch_u5(LO_FOFF \| LO_CEX,
	262	LO_ULED \| LO_ALE \| LO_CLE \| LO_WPX);
	263	break;
	264	default:
	265	set_latch_u5(LO_WPX \| LO_FOFF \| LO_CEX,
	266	LO_ULED \| LO_ALE \| LO_CLE);
	267	break;
	268	}
	269
	270	/* Setup NAND specific settings */
	271	rb532_nand_data.chip.nr_chips = 1;
	272	rb532_nand_data.chip.nr_partitions = ARRAY_SIZE(rb532_partition_info);
	273	rb532_nand_data.chip.partitions = rb532_partition_info;
	274	rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY;
	275	rb532_nand_data.chip.options = NAND_NO_AUTOINCR;
	276	}
	277
	278
	279	static int __init plat_setup_devices(void)
	280	{
	281	/* Look for the CF card reader */
1ddfe82d	282	if (!readl(IDT434_REG_BASE + DEV1MASK))
bc4c4e83	283	rb532_devs[2] = NULL; /* disable cf_slot0 at index 2 */
73b4390f RB	284	else {
73b4390f RB	285	cf_slot0_res[0].start =
1ddfe82d	286	readl(IDT434_REG_BASE + DEV1BASE);
73b4390f RB	287	cf_slot0_res[0].end = cf_slot0_res[0].start + 0x1000;
	288	}
	289
	290	/* Read the NAND resources from the device controller */
1ddfe82d	291	nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE);
73b4390f RB	292	nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000;
	293
	294	/* Initialise the NAND device */
	295	rb532_nand_setup();
	296
	297	return platform_add_devices(rb532_devs, ARRAY_SIZE(rb532_devs));
	298	}
	299
	300	static int __init setup_kmac(char *s)
	301	{
	302	printk(KERN_INFO "korina mac = %s\n", s);
	303	parse_mac_addr(s);
	304	return 0;
	305	}
	306
	307	__setup("kmac=", setup_kmac);
	308
	309	arch_initcall(plat_setup_devices);