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[MIPS] War on whitespace: cleanup initial spaces followed by tabs.
[linux-block.git] / arch / mips / pci / fixup-vr4133.c
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1da177e4
LT		 1/*
2 * arch/mips/vr41xx/nec-cmbvr4133/pci_fixup.c
3 *
4 * The NEC CMB-VR4133 Board specific PCI fixups.
5 *
6 * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
7 * Alex Sapkov <asapkov@ru.mvista.com>
8 *
9 * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 *
14 * Modified for support in 2.6
15 * Author: Manish Lachwani (mlachwani@mvista.com)
16 *
17 */
18#include <linux/config.h>
19#include <linux/init.h>
20#include <linux/pci.h>
21
22#include <asm/io.h>
23#include <asm/vr41xx/cmbvr4133.h>
24
25extern int vr4133_rockhopper;
26extern void ali_m1535plus_init(struct pci_dev *dev);
27extern void ali_m5229_init(struct pci_dev *dev);
28
29/* Do platform specific device initialization at pci_enable_device() time */
30int pcibios_plat_dev_init(struct pci_dev *dev)
31{
32 /*
33 * We have to reset AMD PCnet adapter on Rockhopper since
34 * PMON leaves it enabled and generating interrupts. This leads
35 * to a lock if some PCI device driver later enables the IRQ line
36 * shared with PCnet and there is no AMD PCnet driver to catch its
37 * interrupts.
38 */
39#ifdef CONFIG_ROCKHOPPER
40 if (dev->vendor == PCI_VENDOR_ID_AMD &&
41 dev->device == PCI_DEVICE_ID_AMD_LANCE) {
42 inl(pci_resource_start(dev, 0) + 0x18);
43 }
44#endif
45
46 /*
47 * we have to open the bridges' windows down to 0 because otherwise
a3dddd56 48 * we cannot access ISA south bridge I/O registers that get mapped from
1da177e4
LT		 49 * 0. for example, 8259 PIC would be unaccessible without that
50 */
51 if(dev->vendor == PCI_VENDOR_ID_INTEL && dev->device == PCI_DEVICE_ID_INTEL_S21152BB) {
52 pci_write_config_byte(dev, PCI_IO_BASE, 0);
53 if(dev->bus->number == 0) {
54 pci_write_config_word(dev, PCI_IO_BASE_UPPER16, 0);
55 } else {
56 pci_write_config_word(dev, PCI_IO_BASE_UPPER16, 1);
57 }
58 }
59
60 return 0;
61}
62
63/*
64 * M1535 IRQ mapping
65 * Feel free to change this, although it shouldn't be needed
66 */
67#define M1535_IRQ_INTA 7
68#define M1535_IRQ_INTB 9
69#define M1535_IRQ_INTC 10
70#define M1535_IRQ_INTD 11
71
72#define M1535_IRQ_USB 9
73#define M1535_IRQ_IDE 14
74#define M1535_IRQ_IDE2 15
75#define M1535_IRQ_PS2 12
76#define M1535_IRQ_RTC 8
77#define M1535_IRQ_FDC 6
78#define M1535_IRQ_AUDIO 5
79#define M1535_IRQ_COM1 4
80#define M1535_IRQ_COM2 4
81#define M1535_IRQ_IRDA 3
82#define M1535_IRQ_KBD 1
83#define M1535_IRQ_TMR 0
84
85/* Rockhopper "slots" assignment; this is hard-coded ... */
86#define ROCKHOPPER_M5451_SLOT 1
87#define ROCKHOPPER_M1535_SLOT 2
88#define ROCKHOPPER_M5229_SLOT 11
89#define ROCKHOPPER_M5237_SLOT 15
90#define ROCKHOPPER_PMU_SLOT 12
91/* ... and hard-wired. */
92#define ROCKHOPPER_PCI1_SLOT 3
93#define ROCKHOPPER_PCI2_SLOT 4
94#define ROCKHOPPER_PCI3_SLOT 5
95#define ROCKHOPPER_PCI4_SLOT 6
96#define ROCKHOPPER_PCNET_SLOT 1
97
98#define M1535_IRQ_MASK(n) (1 << (n))
99
100#define M1535_IRQ_EDGE (M1535_IRQ_MASK(M1535_IRQ_TMR) | \
101 M1535_IRQ_MASK(M1535_IRQ_KBD) | \
102 M1535_IRQ_MASK(M1535_IRQ_COM1) | \
103 M1535_IRQ_MASK(M1535_IRQ_COM2) | \
104 M1535_IRQ_MASK(M1535_IRQ_IRDA) | \
105 M1535_IRQ_MASK(M1535_IRQ_RTC) | \
106 M1535_IRQ_MASK(M1535_IRQ_FDC) | \
107 M1535_IRQ_MASK(M1535_IRQ_PS2))
108
109#define M1535_IRQ_LEVEL (M1535_IRQ_MASK(M1535_IRQ_IDE) | \
110 M1535_IRQ_MASK(M1535_IRQ_USB) | \
111 M1535_IRQ_MASK(M1535_IRQ_INTA) | \
112 M1535_IRQ_MASK(M1535_IRQ_INTB) | \
113 M1535_IRQ_MASK(M1535_IRQ_INTC) | \
114 M1535_IRQ_MASK(M1535_IRQ_INTD))
115
116struct irq_map_entry {
117 u16 bus;
118 u8 slot;
119 u8 irq;
120};
121static struct irq_map_entry int_map[] = {
122 {1, ROCKHOPPER_M5451_SLOT, M1535_IRQ_AUDIO}, /* Audio controller */
123 {1, ROCKHOPPER_PCI1_SLOT, M1535_IRQ_INTD}, /* PCI slot #1 */
124 {1, ROCKHOPPER_PCI2_SLOT, M1535_IRQ_INTC}, /* PCI slot #2 */
125 {1, ROCKHOPPER_M5237_SLOT, M1535_IRQ_USB}, /* USB host controller */
126 {1, ROCKHOPPER_M5229_SLOT, IDE_PRIMARY_IRQ}, /* IDE controller */
127 {2, ROCKHOPPER_PCNET_SLOT, M1535_IRQ_INTD}, /* AMD Am79c973 on-board
128 ethernet */
129 {2, ROCKHOPPER_PCI3_SLOT, M1535_IRQ_INTB}, /* PCI slot #3 */
130 {2, ROCKHOPPER_PCI4_SLOT, M1535_IRQ_INTC} /* PCI slot #4 */
131};
132
133static int pci_intlines[] =
134 { M1535_IRQ_INTA, M1535_IRQ_INTB, M1535_IRQ_INTC, M1535_IRQ_INTD };
135
136/* Determine the Rockhopper IRQ line number for the PCI device */
137int rockhopper_get_irq(struct pci_dev *dev, u8 pin, u8 slot)
138{
139 struct pci_bus *bus;
140 int i;
141
142 bus = dev->bus;
143 if (bus == NULL)
144 return -1;
145
146 for (i = 0; i < sizeof (int_map) / sizeof (int_map[0]); i++) {
147 if (int_map[i].bus == bus->number && int_map[i].slot == slot) {
148 int line;
149 for (line = 0; line < 4; line++)
150 if (pci_intlines[line] == int_map[i].irq)
151 break;
152 if (line < 4)
153 return pci_intlines[(line + (pin - 1)) % 4];
154 else
155 return int_map[i].irq;
156 }
157 }
158 return -1;
159}
160
161#ifdef CONFIG_ROCKHOPPER
162void i8259_init(void)
163{
164 outb(0x11, 0x20); /* Master ICW1 */
165 outb(I8259_IRQ_BASE, 0x21); /* Master ICW2 */
166 outb(0x04, 0x21); /* Master ICW3 */
167 outb(0x01, 0x21); /* Master ICW4 */
168 outb(0xff, 0x21); /* Master IMW */
169
170 outb(0x11, 0xa0); /* Slave ICW1 */
171 outb(I8259_IRQ_BASE + 8, 0xa1); /* Slave ICW2 */
172 outb(0x02, 0xa1); /* Slave ICW3 */
173 outb(0x01, 0xa1); /* Slave ICW4 */
174 outb(0xff, 0xa1); /* Slave IMW */
175
176 outb(0x00, 0x4d0);
177 outb(0x02, 0x4d1); /* USB IRQ9 is level */
178}
179#endif
180
181int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
182{
183 extern int pci_probe_only;
184 pci_probe_only = 1;
185
186#ifdef CONFIG_ROCKHOPPER
187 if( dev->bus->number == 1 && vr4133_rockhopper ) {
188 if(slot == ROCKHOPPER_PCI1_SLOT || slot == ROCKHOPPER_PCI2_SLOT)
189 dev->irq = CMBVR41XX_INTA_IRQ;
190 else
191 dev->irq = rockhopper_get_irq(dev, pin, slot);
192 } else
193 dev->irq = CMBVR41XX_INTA_IRQ;
194#else
195 dev->irq = CMBVR41XX_INTA_IRQ;
196#endif
197
198 return dev->irq;
199}
200
201DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, ali_m1535plus_init);
202DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, ali_m5229_init);
203
204
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