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MIPS: bpf: Fix is_range() semantics
[linux-2.6-block.git] / arch / mips / net / bpf_jit.c
CommitLineData
c6610de3
MC		 1/*
2 * Just-In-Time compiler for BPF filters on MIPS
3 *
4 * Copyright (c) 2014 Imagination Technologies Ltd.
5 * Author: Markos Chandras <markos.chandras@imgtec.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; version 2 of the License.
10 */
11
12#include <linux/bitops.h>
13#include <linux/compiler.h>
14#include <linux/errno.h>
15#include <linux/filter.h>
16#include <linux/if_vlan.h>
17#include <linux/kconfig.h>
18#include <linux/moduleloader.h>
19#include <linux/netdevice.h>
20#include <linux/string.h>
21#include <linux/slab.h>
22#include <linux/types.h>
23#include <asm/bitops.h>
24#include <asm/cacheflush.h>
25#include <asm/cpu-features.h>
26#include <asm/uasm.h>
27
28#include "bpf_jit.h"
29
30/* ABI
31 *
32 * s0 1st scratch register
33 * s1 2nd scratch register
34 * s2 offset register
35 * s3 BPF register A
36 * s4 BPF register X
37 * s5 *skb
38 * s6 *scratch memory
39 *
40 * On entry (*bpf_func)(*skb, *filter)
41 * a0 = MIPS_R_A0 = skb;
42 * a1 = MIPS_R_A1 = filter;
43 *
44 * Stack
45 * ...
46 * M[15]
47 * M[14]
48 * M[13]
49 * ...
50 * M[0] <-- r_M
51 * saved reg k-1
52 * saved reg k-2
53 * ...
54 * saved reg 0 <-- r_sp
55 * <no argument area>
56 *
57 * Packet layout
58 *
59 * <--------------------- len ------------------------>
60 * <--skb-len(r_skb_hl)-->< ----- skb->data_len ------>
61 * ----------------------------------------------------
62 * | skb->data |
63 * ----------------------------------------------------
64 */
65
66#define RSIZE (sizeof(unsigned long))
67#define ptr typeof(unsigned long)
68
69/* ABI specific return values */
70#ifdef CONFIG_32BIT /* O32 */
71#ifdef CONFIG_CPU_LITTLE_ENDIAN
72#define r_err MIPS_R_V1
73#define r_val MIPS_R_V0
74#else /* CONFIG_CPU_LITTLE_ENDIAN */
75#define r_err MIPS_R_V0
76#define r_val MIPS_R_V1
77#endif
78#else /* N64 */
79#define r_err MIPS_R_V0
80#define r_val MIPS_R_V0
81#endif
82
83#define r_ret MIPS_R_V0
84
85/*
86 * Use 2 scratch registers to avoid pipeline interlocks.
87 * There is no overhead during epilogue and prologue since
88 * any of the $s0-$s6 registers will only be preserved if
89 * they are going to actually be used.
90 */
91#define r_s0 MIPS_R_S0 /* scratch reg 1 */
92#define r_s1 MIPS_R_S1 /* scratch reg 2 */
93#define r_off MIPS_R_S2
94#define r_A MIPS_R_S3
95#define r_X MIPS_R_S4
96#define r_skb MIPS_R_S5
97#define r_M MIPS_R_S6
98#define r_tmp_imm MIPS_R_T6 /* No need to preserve this */
99#define r_tmp MIPS_R_T7 /* No need to preserve this */
100#define r_zero MIPS_R_ZERO
101#define r_sp MIPS_R_SP
102#define r_ra MIPS_R_RA
103
104#define SCRATCH_OFF(k) (4 * (k))
105
106/* JIT flags */
107#define SEEN_CALL (1 << BPF_MEMWORDS)
108#define SEEN_SREG_SFT (BPF_MEMWORDS + 1)
109#define SEEN_SREG_BASE (1 << SEEN_SREG_SFT)
110#define SEEN_SREG(x) (SEEN_SREG_BASE << (x))
111#define SEEN_S0 SEEN_SREG(0)
112#define SEEN_S1 SEEN_SREG(1)
113#define SEEN_OFF SEEN_SREG(2)
114#define SEEN_A SEEN_SREG(3)
115#define SEEN_X SEEN_SREG(4)
116#define SEEN_SKB SEEN_SREG(5)
117#define SEEN_MEM SEEN_SREG(6)
118
119/* Arguments used by JIT */
120#define ARGS_USED_BY_JIT 2 /* only applicable to 64-bit */
121
122#define FLAG_NEED_X_RESET (1 << 0)
123
124#define SBIT(x) (1 << (x)) /* Signed version of BIT() */
125
126/**
127 * struct jit_ctx - JIT context
128 * @skf: The sk_filter
129 * @prologue_bytes: Number of bytes for prologue
130 * @idx: Instruction index
131 * @flags: JIT flags
132 * @offsets: Instruction offsets
133 * @target: Memory location for the compiled filter
134 */
135struct jit_ctx {
136 const struct sk_filter *skf;
137 unsigned int prologue_bytes;
138 u32 idx;
139 u32 flags;
140 u32 *offsets;
141 u32 *target;
142};
143
144
145static inline int optimize_div(u32 *k)
146{
147 /* power of 2 divides can be implemented with right shift */
148 if (!(*k & (*k-1))) {
149 *k = ilog2(*k);
150 return 1;
151 }
152
153 return 0;
154}
155
156/* Simply emit the instruction if the JIT memory space has been allocated */
157#define emit_instr(ctx, func, ...) \
158do { \
159 if ((ctx)->target != NULL) { \
160 u32 *p = &(ctx)->target[ctx->idx]; \
161 uasm_i_##func(&p, ##__VA_ARGS__); \
162 } \
163 (ctx)->idx++; \
164} while (0)
165
166/* Determine if immediate is within the 16-bit signed range */
167static inline bool is_range16(s32 imm)
168{
10c4d614 169 return !(imm >= SBIT(15) || imm < -SBIT(15));
c6610de3
MC		 170}
171
172static inline void emit_addu(unsigned int dst, unsigned int src1,
173 unsigned int src2, struct jit_ctx *ctx)
174{
175 emit_instr(ctx, addu, dst, src1, src2);
176}
177
178static inline void emit_nop(struct jit_ctx *ctx)
179{
180 emit_instr(ctx, nop);
181}
182
183/* Load a u32 immediate to a register */
184static inline void emit_load_imm(unsigned int dst, u32 imm, struct jit_ctx *ctx)
185{
186 if (ctx->target != NULL) {
187 /* addiu can only handle s16 */
10c4d614 188 if (!is_range16(imm)) {
c6610de3
MC		 189 u32 *p = &ctx->target[ctx->idx];
190 uasm_i_lui(&p, r_tmp_imm, (s32)imm >> 16);
191 p = &ctx->target[ctx->idx + 1];
192 uasm_i_ori(&p, dst, r_tmp_imm, imm & 0xffff);
193 } else {
194 u32 *p = &ctx->target[ctx->idx];
195 uasm_i_addiu(&p, dst, r_zero, imm);
196 }
197 }
198 ctx->idx++;
199
10c4d614 200 if (!is_range16(imm))
c6610de3
MC		 201 ctx->idx++;
202}
203
204static inline void emit_or(unsigned int dst, unsigned int src1,
205 unsigned int src2, struct jit_ctx *ctx)
206{
207 emit_instr(ctx, or, dst, src1, src2);
208}
209
210static inline void emit_ori(unsigned int dst, unsigned src, u32 imm,
211 struct jit_ctx *ctx)
212{
213 if (imm >= BIT(16)) {
214 emit_load_imm(r_tmp, imm, ctx);
215 emit_or(dst, src, r_tmp, ctx);
216 } else {
217 emit_instr(ctx, ori, dst, src, imm);
218 }
219}
220
221
222static inline void emit_daddu(unsigned int dst, unsigned int src1,
223 unsigned int src2, struct jit_ctx *ctx)
224{
225 emit_instr(ctx, daddu, dst, src1, src2);
226}
227
228static inline void emit_daddiu(unsigned int dst, unsigned int src,
229 int imm, struct jit_ctx *ctx)
230{
231 /*
232 * Only used for stack, so the imm is relatively small
233 * and it fits in 15-bits
234 */
235 emit_instr(ctx, daddiu, dst, src, imm);
236}
237
238static inline void emit_addiu(unsigned int dst, unsigned int src,
239 u32 imm, struct jit_ctx *ctx)
240{
10c4d614 241 if (!is_range16(imm)) {
c6610de3
MC		 242 emit_load_imm(r_tmp, imm, ctx);
243 emit_addu(dst, r_tmp, src, ctx);
244 } else {
245 emit_instr(ctx, addiu, dst, src, imm);
246 }
247}
248
249static inline void emit_and(unsigned int dst, unsigned int src1,
250 unsigned int src2, struct jit_ctx *ctx)
251{
252 emit_instr(ctx, and, dst, src1, src2);
253}
254
255static inline void emit_andi(unsigned int dst, unsigned int src,
256 u32 imm, struct jit_ctx *ctx)
257{
258 /* If imm does not fit in u16 then load it to register */
259 if (imm >= BIT(16)) {
260 emit_load_imm(r_tmp, imm, ctx);
261 emit_and(dst, src, r_tmp, ctx);
262 } else {
263 emit_instr(ctx, andi, dst, src, imm);
264 }
265}
266
267static inline void emit_xor(unsigned int dst, unsigned int src1,
268 unsigned int src2, struct jit_ctx *ctx)
269{
270 emit_instr(ctx, xor, dst, src1, src2);
271}
272
273static inline void emit_xori(ptr dst, ptr src, u32 imm, struct jit_ctx *ctx)
274{
275 /* If imm does not fit in u16 then load it to register */
276 if (imm >= BIT(16)) {
277 emit_load_imm(r_tmp, imm, ctx);
278 emit_xor(dst, src, r_tmp, ctx);
279 } else {
280 emit_instr(ctx, xori, dst, src, imm);
281 }
282}
283
284static inline void emit_stack_offset(int offset, struct jit_ctx *ctx)
285{
286 if (config_enabled(CONFIG_64BIT))
287 emit_instr(ctx, daddiu, r_sp, r_sp, offset);
288 else
289 emit_instr(ctx, addiu, r_sp, r_sp, offset);
290
291}
292
293static inline void emit_subu(unsigned int dst, unsigned int src1,
294 unsigned int src2, struct jit_ctx *ctx)
295{
296 emit_instr(ctx, subu, dst, src1, src2);
297}
298
299static inline void emit_neg(unsigned int reg, struct jit_ctx *ctx)
300{
301 emit_subu(reg, r_zero, reg, ctx);
302}
303
304static inline void emit_sllv(unsigned int dst, unsigned int src,
305 unsigned int sa, struct jit_ctx *ctx)
306{
307 emit_instr(ctx, sllv, dst, src, sa);
308}
309
310static inline void emit_sll(unsigned int dst, unsigned int src,
311 unsigned int sa, struct jit_ctx *ctx)
312{
313 /* sa is 5-bits long */
314 BUG_ON(sa >= BIT(5));
315 emit_instr(ctx, sll, dst, src, sa);
316}
317
318static inline void emit_srlv(unsigned int dst, unsigned int src,
319 unsigned int sa, struct jit_ctx *ctx)
320{
321 emit_instr(ctx, srlv, dst, src, sa);
322}
323
324static inline void emit_srl(unsigned int dst, unsigned int src,
325 unsigned int sa, struct jit_ctx *ctx)
326{
327 /* sa is 5-bits long */
328 BUG_ON(sa >= BIT(5));
329 emit_instr(ctx, srl, dst, src, sa);
330}
331
55393ee5
MC		 332static inline void emit_slt(unsigned int dst, unsigned int src1,
333 unsigned int src2, struct jit_ctx *ctx)
334{
335 emit_instr(ctx, slt, dst, src1, src2);
336}
337
c6610de3
MC		 338static inline void emit_sltu(unsigned int dst, unsigned int src1,
339 unsigned int src2, struct jit_ctx *ctx)
340{
341 emit_instr(ctx, sltu, dst, src1, src2);
342}
343
344static inline void emit_sltiu(unsigned dst, unsigned int src,
345 unsigned int imm, struct jit_ctx *ctx)
346{
347 /* 16 bit immediate */
10c4d614 348 if (!is_range16((s32)imm)) {
c6610de3
MC		 349 emit_load_imm(r_tmp, imm, ctx);
350 emit_sltu(dst, src, r_tmp, ctx);
351 } else {
352 emit_instr(ctx, sltiu, dst, src, imm);
353 }
354
355}
356
357/* Store register on the stack */
358static inline void emit_store_stack_reg(ptr reg, ptr base,
359 unsigned int offset,
360 struct jit_ctx *ctx)
361{
362 if (config_enabled(CONFIG_64BIT))
363 emit_instr(ctx, sd, reg, offset, base);
364 else
365 emit_instr(ctx, sw, reg, offset, base);
366}
367
368static inline void emit_store(ptr reg, ptr base, unsigned int offset,
369 struct jit_ctx *ctx)
370{
371 emit_instr(ctx, sw, reg, offset, base);
372}
373
374static inline void emit_load_stack_reg(ptr reg, ptr base,
375 unsigned int offset,
376 struct jit_ctx *ctx)
377{
378 if (config_enabled(CONFIG_64BIT))
379 emit_instr(ctx, ld, reg, offset, base);
380 else
381 emit_instr(ctx, lw, reg, offset, base);
382}
383
384static inline void emit_load(unsigned int reg, unsigned int base,
385 unsigned int offset, struct jit_ctx *ctx)
386{
387 emit_instr(ctx, lw, reg, offset, base);
388}
389
390static inline void emit_load_byte(unsigned int reg, unsigned int base,
391 unsigned int offset, struct jit_ctx *ctx)
392{
393 emit_instr(ctx, lb, reg, offset, base);
394}
395
396static inline void emit_half_load(unsigned int reg, unsigned int base,
397 unsigned int offset, struct jit_ctx *ctx)
398{
399 emit_instr(ctx, lh, reg, offset, base);
400}
401
402static inline void emit_mul(unsigned int dst, unsigned int src1,
403 unsigned int src2, struct jit_ctx *ctx)
404{
405 emit_instr(ctx, mul, dst, src1, src2);
406}
407
408static inline void emit_div(unsigned int dst, unsigned int src,
409 struct jit_ctx *ctx)
410{
411 if (ctx->target != NULL) {
412 u32 *p = &ctx->target[ctx->idx];
413 uasm_i_divu(&p, dst, src);
414 p = &ctx->target[ctx->idx + 1];
35a8e16a 415 uasm_i_mflo(&p, dst);
c6610de3
MC		 416 }
417 ctx->idx += 2; /* 2 insts */
418}
419
420static inline void emit_mod(unsigned int dst, unsigned int src,
421 struct jit_ctx *ctx)
422{
423 if (ctx->target != NULL) {
424 u32 *p = &ctx->target[ctx->idx];
425 uasm_i_divu(&p, dst, src);
426 p = &ctx->target[ctx->idx + 1];
427 uasm_i_mflo(&p, dst);
428 }
429 ctx->idx += 2; /* 2 insts */
430}
431
432static inline void emit_dsll(unsigned int dst, unsigned int src,
433 unsigned int sa, struct jit_ctx *ctx)
434{
435 emit_instr(ctx, dsll, dst, src, sa);
436}
437
438static inline void emit_dsrl32(unsigned int dst, unsigned int src,
439 unsigned int sa, struct jit_ctx *ctx)
440{
441 emit_instr(ctx, dsrl32, dst, src, sa);
442}
443
444static inline void emit_wsbh(unsigned int dst, unsigned int src,
445 struct jit_ctx *ctx)
446{
447 emit_instr(ctx, wsbh, dst, src);
448}
449
450/* load a function pointer to register */
451static inline void emit_load_func(unsigned int reg, ptr imm,
452 struct jit_ctx *ctx)
453{
454 if (config_enabled(CONFIG_64BIT)) {
455 /* At this point imm is always 64-bit */
456 emit_load_imm(r_tmp, (u64)imm >> 32, ctx);
457 emit_dsll(r_tmp_imm, r_tmp, 16, ctx); /* left shift by 16 */
458 emit_ori(r_tmp, r_tmp_imm, (imm >> 16) & 0xffff, ctx);
459 emit_dsll(r_tmp_imm, r_tmp, 16, ctx); /* left shift by 16 */
460 emit_ori(reg, r_tmp_imm, imm & 0xffff, ctx);
461 } else {
462 emit_load_imm(reg, imm, ctx);
463 }
464}
465
466/* Move to real MIPS register */
467static inline void emit_reg_move(ptr dst, ptr src, struct jit_ctx *ctx)
468{
469 if (config_enabled(CONFIG_64BIT))
470 emit_daddu(dst, src, r_zero, ctx);
471 else
472 emit_addu(dst, src, r_zero, ctx);
473}
474
475/* Move to JIT (32-bit) register */
476static inline void emit_jit_reg_move(ptr dst, ptr src, struct jit_ctx *ctx)
477{
478 emit_addu(dst, src, r_zero, ctx);
479}
480
481/* Compute the immediate value for PC-relative branches. */
482static inline u32 b_imm(unsigned int tgt, struct jit_ctx *ctx)
483{
484 if (ctx->target == NULL)
485 return 0;
486
487 /*
488 * We want a pc-relative branch. We only do forward branches
489 * so tgt is always after pc. tgt is the instruction offset
490 * we want to jump to.
491
492 * Branch on MIPS:
493 * I: target_offset <- sign_extend(offset)
494 * I+1: PC += target_offset (delay slot)
495 *
496 * ctx->idx currently points to the branch instruction
497 * but the offset is added to the delay slot so we need
498 * to subtract 4.
499 */
500 return ctx->offsets[tgt] -
501 (ctx->idx * 4 - ctx->prologue_bytes) - 4;
502}
503
504static inline void emit_bcond(int cond, unsigned int reg1, unsigned int reg2,
505 unsigned int imm, struct jit_ctx *ctx)
506{
507 if (ctx->target != NULL) {
508 u32 *p = &ctx->target[ctx->idx];
509
510 switch (cond) {
511 case MIPS_COND_EQ:
512 uasm_i_beq(&p, reg1, reg2, imm);
513 break;
514 case MIPS_COND_NE:
515 uasm_i_bne(&p, reg1, reg2, imm);
516 break;
517 case MIPS_COND_ALL:
518 uasm_i_b(&p, imm);
519 break;
520 default:
521 pr_warn("%s: Unhandled branch conditional: %d\n",
522 __func__, cond);
523 }
524 }
525 ctx->idx++;
526}
527
528static inline void emit_b(unsigned int imm, struct jit_ctx *ctx)
529{
530 emit_bcond(MIPS_COND_ALL, r_zero, r_zero, imm, ctx);
531}
532
533static inline void emit_jalr(unsigned int link, unsigned int reg,
534 struct jit_ctx *ctx)
535{
536 emit_instr(ctx, jalr, link, reg);
537}
538
539static inline void emit_jr(unsigned int reg, struct jit_ctx *ctx)
540{
541 emit_instr(ctx, jr, reg);
542}
543
544static inline u16 align_sp(unsigned int num)
545{
546 /* Double word alignment for 32-bit, quadword for 64-bit */
547 unsigned int align = config_enabled(CONFIG_64BIT) ? 16 : 8;
548 num = (num + (align - 1)) & -align;
549 return num;
550}
551
552static inline void update_on_xread(struct jit_ctx *ctx)
553{
554 if (!(ctx->flags & SEEN_X))
555 ctx->flags |= FLAG_NEED_X_RESET;
556
557 ctx->flags |= SEEN_X;
558}
559
560static bool is_load_to_a(u16 inst)
561{
562 switch (inst) {
a83d081e
DB		 563 case BPF_LD | BPF_W | BPF_LEN:
564 case BPF_LD | BPF_W | BPF_ABS:
565 case BPF_LD | BPF_H | BPF_ABS:
566 case BPF_LD | BPF_B | BPF_ABS:
c6610de3
MC		 567 return true;
568 default:
569 return false;
570 }
571}
572
573static void save_bpf_jit_regs(struct jit_ctx *ctx, unsigned offset)
574{
575 int i = 0, real_off = 0;
576 u32 sflags, tmp_flags;
577
578 /* Adjust the stack pointer */
579 emit_stack_offset(-align_sp(offset), ctx);
580
581 if (ctx->flags & SEEN_CALL) {
582 /* Argument save area */
583 if (config_enabled(CONFIG_64BIT))
584 /* Bottom of current frame */
585 real_off = align_sp(offset) - RSIZE;
586 else
587 /* Top of previous frame */
588 real_off = align_sp(offset) + RSIZE;
589 emit_store_stack_reg(MIPS_R_A0, r_sp, real_off, ctx);
590 emit_store_stack_reg(MIPS_R_A1, r_sp, real_off + RSIZE, ctx);
591
592 real_off = 0;
593 }
594
595 tmp_flags = sflags = ctx->flags >> SEEN_SREG_SFT;
596 /* sflags is essentially a bitmap */
597 while (tmp_flags) {
598 if ((sflags >> i) & 0x1) {
599 emit_store_stack_reg(MIPS_R_S0 + i, r_sp, real_off,
600 ctx);
601 real_off += RSIZE;
602 }
603 i++;
604 tmp_flags >>= 1;
605 }
606
607 /* save return address */
608 if (ctx->flags & SEEN_CALL) {
609 emit_store_stack_reg(r_ra, r_sp, real_off, ctx);
610 real_off += RSIZE;
611 }
612
613 /* Setup r_M leaving the alignment gap if necessary */
614 if (ctx->flags & SEEN_MEM) {
615 if (real_off % (RSIZE * 2))
616 real_off += RSIZE;
617 emit_addiu(r_M, r_sp, real_off, ctx);
618 }
619}
620
621static void restore_bpf_jit_regs(struct jit_ctx *ctx,
622 unsigned int offset)
623{
624 int i, real_off = 0;
625 u32 sflags, tmp_flags;
626
627 if (ctx->flags & SEEN_CALL) {
628 if (config_enabled(CONFIG_64BIT))
629 /* Bottom of current frame */
630 real_off = align_sp(offset) - RSIZE;
631 else
632 /* Top of previous frame */
633 real_off = align_sp(offset) + RSIZE;
634 emit_load_stack_reg(MIPS_R_A0, r_sp, real_off, ctx);
635 emit_load_stack_reg(MIPS_R_A1, r_sp, real_off + RSIZE, ctx);
636
637 real_off = 0;
638 }
639
640 tmp_flags = sflags = ctx->flags >> SEEN_SREG_SFT;
641 /* sflags is a bitmap */
642 i = 0;
643 while (tmp_flags) {
644 if ((sflags >> i) & 0x1) {
645 emit_load_stack_reg(MIPS_R_S0 + i, r_sp, real_off,
646 ctx);
647 real_off += RSIZE;
648 }
649 i++;
650 tmp_flags >>= 1;
651 }
652
653 /* restore return address */
654 if (ctx->flags & SEEN_CALL)
655 emit_load_stack_reg(r_ra, r_sp, real_off, ctx);
656
657 /* Restore the sp and discard the scrach memory */
658 emit_stack_offset(align_sp(offset), ctx);
659}
660
661static unsigned int get_stack_depth(struct jit_ctx *ctx)
662{
663 int sp_off = 0;
664
665
666 /* How may s* regs do we need to preserved? */
667 sp_off += hweight32(ctx->flags >> SEEN_SREG_SFT) * RSIZE;
668
669 if (ctx->flags & SEEN_MEM)
670 sp_off += 4 * BPF_MEMWORDS; /* BPF_MEMWORDS are 32-bit */
671
672 if (ctx->flags & SEEN_CALL)
673 /*
674 * The JIT code make calls to external functions using 2
675 * arguments. Therefore, for o32 we don't need to allocate
676 * space because we don't care if the argumetns are lost
677 * across calls. We do need however to preserve incoming
678 * arguments but the space is already allocated for us by
679 * the caller. On the other hand, for n64, we need to allocate
680 * this space ourselves. We need to preserve $ra as well.
681 */
682 sp_off += config_enabled(CONFIG_64BIT) ?
683 (ARGS_USED_BY_JIT + 1) * RSIZE : RSIZE;
684
685 /*
686 * Subtract the bytes for the last registers since we only care about
687 * the location on the stack pointer.
688 */
689 return sp_off - RSIZE;
690}
691
692static void build_prologue(struct jit_ctx *ctx)
693{
694 u16 first_inst = ctx->skf->insns[0].code;
695 int sp_off;
696
697 /* Calculate the total offset for the stack pointer */
698 sp_off = get_stack_depth(ctx);
699 save_bpf_jit_regs(ctx, sp_off);
700
701 if (ctx->flags & SEEN_SKB)
702 emit_reg_move(r_skb, MIPS_R_A0, ctx);
703
704 if (ctx->flags & FLAG_NEED_X_RESET)
705 emit_jit_reg_move(r_X, r_zero, ctx);
706
707 /* Do not leak kernel data to userspace */
a83d081e 708 if ((first_inst != (BPF_RET | BPF_K)) && !(is_load_to_a(first_inst)))
c6610de3
MC		 709 emit_jit_reg_move(r_A, r_zero, ctx);
710}
711
712static void build_epilogue(struct jit_ctx *ctx)
713{
714 unsigned int sp_off;
715
716 /* Calculate the total offset for the stack pointer */
717
718 sp_off = get_stack_depth(ctx);
719 restore_bpf_jit_regs(ctx, sp_off);
720
721 /* Return */
722 emit_jr(r_ra, ctx);
723 emit_nop(ctx);
724}
725
726static u64 jit_get_skb_b(struct sk_buff *skb, unsigned offset)
727{
728 u8 ret;
729 int err;
730
731 err = skb_copy_bits(skb, offset, &ret, 1);
732
733 return (u64)err << 32 | ret;
734}
735
736static u64 jit_get_skb_h(struct sk_buff *skb, unsigned offset)
737{
738 u16 ret;
739 int err;
740
741 err = skb_copy_bits(skb, offset, &ret, 2);
742
743 return (u64)err << 32 | ntohs(ret);
744}
745
746static u64 jit_get_skb_w(struct sk_buff *skb, unsigned offset)
747{
748 u32 ret;
749 int err;
750
751 err = skb_copy_bits(skb, offset, &ret, 4);
752
753 return (u64)err << 32 | ntohl(ret);
754}
755
756#define PKT_TYPE_MAX 7
757static int pkt_type_offset(void)
758{
759 struct sk_buff skb_probe = {
760 .pkt_type = ~0,
761 };
762 char *ct = (char *)&skb_probe;
763 unsigned int off;
764
765 for (off = 0; off < sizeof(struct sk_buff); off++) {
766 if (ct[off] == PKT_TYPE_MAX)
767 return off;
768 }
769 pr_err_once("Please fix pkt_type_offset(), as pkt_type couldn't be found\n");
770 return -1;
771}
772
773static int build_body(struct jit_ctx *ctx)
774{
775 void *load_func[] = {jit_get_skb_b, jit_get_skb_h, jit_get_skb_w};
776 const struct sk_filter *prog = ctx->skf;
777 const struct sock_filter *inst;
778 unsigned int i, off, load_order, condt;
779 u32 k, b_off __maybe_unused;
780
781 for (i = 0; i < prog->len; i++) {
a83d081e
DB		 782 u16 code;
783
c6610de3
MC		 784 inst = &(prog->insns[i]);
785 pr_debug("%s: code->0x%02x, jt->0x%x, jf->0x%x, k->0x%x\n",
786 __func__, inst->code, inst->jt, inst->jf, inst->k);
787 k = inst->k;
a83d081e 788 code = bpf_anc_helper(inst);
c6610de3
MC		 789
790 if (ctx->target == NULL)
791 ctx->offsets[i] = ctx->idx * 4;
792
a83d081e
DB		 793 switch (code) {
794 case BPF_LD | BPF_IMM:
c6610de3
MC		 795 /* A <- k ==> li r_A, k */
796 ctx->flags |= SEEN_A;
797 emit_load_imm(r_A, k, ctx);
798 break;
a83d081e 799 case BPF_LD | BPF_W | BPF_LEN:
c6610de3
MC		 800 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4);
801 /* A <- len ==> lw r_A, offset(skb) */
802 ctx->flags |= SEEN_SKB | SEEN_A;
803 off = offsetof(struct sk_buff, len);
804 emit_load(r_A, r_skb, off, ctx);
805 break;
a83d081e 806 case BPF_LD | BPF_MEM:
c6610de3
MC		 807 /* A <- M[k] ==> lw r_A, offset(M) */
808 ctx->flags |= SEEN_MEM | SEEN_A;
809 emit_load(r_A, r_M, SCRATCH_OFF(k), ctx);
810 break;
a83d081e 811 case BPF_LD | BPF_W | BPF_ABS:
c6610de3
MC		 812 /* A <- P[k:4] */
813 load_order = 2;
814 goto load;
a83d081e 815 case BPF_LD | BPF_H | BPF_ABS:
c6610de3
MC		 816 /* A <- P[k:2] */
817 load_order = 1;
818 goto load;
a83d081e 819 case BPF_LD | BPF_B | BPF_ABS:
c6610de3
MC		 820 /* A <- P[k:1] */
821 load_order = 0;
822load:
55393ee5
MC		 823 /* the interpreter will deal with the negative K */
824 if ((int)k < 0)
825 return -ENOTSUPP;
826
c6610de3
MC		 827 emit_load_imm(r_off, k, ctx);
828load_common:
55393ee5
MC		 829 /*
830 * We may got here from the indirect loads so
831 * return if offset is negative.
832 */
833 emit_slt(r_s0, r_off, r_zero, ctx);
834 emit_bcond(MIPS_COND_NE, r_s0, r_zero,
835 b_imm(prog->len, ctx), ctx);
836 emit_reg_move(r_ret, r_zero, ctx);
837
c6610de3
MC		 838 ctx->flags |= SEEN_CALL | SEEN_OFF | SEEN_S0 |
839 SEEN_SKB | SEEN_A;
840
841 emit_load_func(r_s0, (ptr)load_func[load_order],
842 ctx);
843 emit_reg_move(MIPS_R_A0, r_skb, ctx);
844 emit_jalr(MIPS_R_RA, r_s0, ctx);
845 /* Load second argument to delay slot */
846 emit_reg_move(MIPS_R_A1, r_off, ctx);
847 /* Check the error value */
848 if (config_enabled(CONFIG_64BIT)) {
849 /* Get error code from the top 32-bits */
850 emit_dsrl32(r_s0, r_val, 0, ctx);
851 /* Branch to 3 instructions ahead */
852 emit_bcond(MIPS_COND_NE, r_s0, r_zero, 3 << 2,
853 ctx);
854 } else {
855 /* Branch to 3 instructions ahead */
856 emit_bcond(MIPS_COND_NE, r_err, r_zero, 3 << 2,
857 ctx);
858 }
859 emit_nop(ctx);
860 /* We are good */
861 emit_b(b_imm(i + 1, ctx), ctx);
862 emit_jit_reg_move(r_A, r_val, ctx);
863 /* Return with error */
864 emit_b(b_imm(prog->len, ctx), ctx);
865 emit_reg_move(r_ret, r_zero, ctx);
866 break;
a83d081e 867 case BPF_LD | BPF_W | BPF_IND:
c6610de3
MC		 868 /* A <- P[X + k:4] */
869 load_order = 2;
870 goto load_ind;
a83d081e 871 case BPF_LD | BPF_H | BPF_IND:
c6610de3
MC		 872 /* A <- P[X + k:2] */
873 load_order = 1;
874 goto load_ind;
a83d081e 875 case BPF_LD | BPF_B | BPF_IND:
c6610de3
MC		 876 /* A <- P[X + k:1] */
877 load_order = 0;
878load_ind:
879 update_on_xread(ctx);
880 ctx->flags |= SEEN_OFF | SEEN_X;
881 emit_addiu(r_off, r_X, k, ctx);
882 goto load_common;
a83d081e 883 case BPF_LDX | BPF_IMM:
c6610de3
MC		 884 /* X <- k */
885 ctx->flags |= SEEN_X;
886 emit_load_imm(r_X, k, ctx);
887 break;
a83d081e 888 case BPF_LDX | BPF_MEM:
c6610de3
MC		 889 /* X <- M[k] */
890 ctx->flags |= SEEN_X | SEEN_MEM;
891 emit_load(r_X, r_M, SCRATCH_OFF(k), ctx);
892 break;
a83d081e 893 case BPF_LDX | BPF_W | BPF_LEN:
c6610de3
MC		 894 /* X <- len */
895 ctx->flags |= SEEN_X | SEEN_SKB;
896 off = offsetof(struct sk_buff, len);
897 emit_load(r_X, r_skb, off, ctx);
898 break;
a83d081e 899 case BPF_LDX | BPF_B | BPF_MSH:
55393ee5
MC		 900 /* the interpreter will deal with the negative K */
901 if ((int)k < 0)
902 return -ENOTSUPP;
903
c6610de3
MC		 904 /* X <- 4 * (P[k:1] & 0xf) */
905 ctx->flags |= SEEN_X | SEEN_CALL | SEEN_S0 | SEEN_SKB;
906 /* Load offset to a1 */
907 emit_load_func(r_s0, (ptr)jit_get_skb_b, ctx);
908 /*
909 * This may emit two instructions so it may not fit
910 * in the delay slot. So use a0 in the delay slot.
911 */
912 emit_load_imm(MIPS_R_A1, k, ctx);
913 emit_jalr(MIPS_R_RA, r_s0, ctx);
914 emit_reg_move(MIPS_R_A0, r_skb, ctx); /* delay slot */
915 /* Check the error value */
916 if (config_enabled(CONFIG_64BIT)) {
917 /* Top 32-bits of $v0 on 64-bit */
918 emit_dsrl32(r_s0, r_val, 0, ctx);
919 emit_bcond(MIPS_COND_NE, r_s0, r_zero,
920 3 << 2, ctx);
921 } else {
922 emit_bcond(MIPS_COND_NE, r_err, r_zero,
923 3 << 2, ctx);
924 }
925 /* No need for delay slot */
926 /* We are good */
927 /* X <- P[1:K] & 0xf */
928 emit_andi(r_X, r_val, 0xf, ctx);
929 /* X << 2 */
930 emit_b(b_imm(i + 1, ctx), ctx);
931 emit_sll(r_X, r_X, 2, ctx); /* delay slot */
932 /* Return with error */
933 emit_b(b_imm(prog->len, ctx), ctx);
934 emit_load_imm(r_ret, 0, ctx); /* delay slot */
935 break;
a83d081e 936 case BPF_ST:
c6610de3
MC		 937 /* M[k] <- A */
938 ctx->flags |= SEEN_MEM | SEEN_A;
939 emit_store(r_A, r_M, SCRATCH_OFF(k), ctx);
940 break;
a83d081e 941 case BPF_STX:
c6610de3
MC		 942 /* M[k] <- X */
943 ctx->flags |= SEEN_MEM | SEEN_X;
944 emit_store(r_X, r_M, SCRATCH_OFF(k), ctx);
945 break;
a83d081e 946 case BPF_ALU | BPF_ADD | BPF_K:
c6610de3
MC		 947 /* A += K */
948 ctx->flags |= SEEN_A;
949 emit_addiu(r_A, r_A, k, ctx);
950 break;
a83d081e 951 case BPF_ALU | BPF_ADD | BPF_X:
c6610de3
MC		 952 /* A += X */
953 ctx->flags |= SEEN_A | SEEN_X;
954 emit_addu(r_A, r_A, r_X, ctx);
955 break;
a83d081e 956 case BPF_ALU | BPF_SUB | BPF_K:
c6610de3
MC		 957 /* A -= K */
958 ctx->flags |= SEEN_A;
959 emit_addiu(r_A, r_A, -k, ctx);
960 break;
a83d081e 961 case BPF_ALU | BPF_SUB | BPF_X:
c6610de3
MC		 962 /* A -= X */
963 ctx->flags |= SEEN_A | SEEN_X;
964 emit_subu(r_A, r_A, r_X, ctx);
965 break;
a83d081e 966 case BPF_ALU | BPF_MUL | BPF_K:
c6610de3
MC		 967 /* A *= K */
968 /* Load K to scratch register before MUL */
969 ctx->flags |= SEEN_A | SEEN_S0;
970 emit_load_imm(r_s0, k, ctx);
971 emit_mul(r_A, r_A, r_s0, ctx);
972 break;
a83d081e 973 case BPF_ALU | BPF_MUL | BPF_X:
c6610de3
MC		 974 /* A *= X */
975 update_on_xread(ctx);
976 ctx->flags |= SEEN_A | SEEN_X;
977 emit_mul(r_A, r_A, r_X, ctx);
978 break;
a83d081e 979 case BPF_ALU | BPF_DIV | BPF_K:
c6610de3
MC		 980 /* A /= k */
981 if (k == 1)
982 break;
983 if (optimize_div(&k)) {
984 ctx->flags |= SEEN_A;
985 emit_srl(r_A, r_A, k, ctx);
986 break;
987 }
988 ctx->flags |= SEEN_A | SEEN_S0;
989 emit_load_imm(r_s0, k, ctx);
990 emit_div(r_A, r_s0, ctx);
991 break;
a83d081e 992 case BPF_ALU | BPF_MOD | BPF_K:
c6610de3
MC		 993 /* A %= k */
994 if (k == 1 || optimize_div(&k)) {
995 ctx->flags |= SEEN_A;
996 emit_jit_reg_move(r_A, r_zero, ctx);
997 } else {
998 ctx->flags |= SEEN_A | SEEN_S0;
999 emit_load_imm(r_s0, k, ctx);
1000 emit_mod(r_A, r_s0, ctx);
1001 }
1002 break;
a83d081e 1003 case BPF_ALU | BPF_DIV | BPF_X:
c6610de3
MC		 1004 /* A /= X */
1005 update_on_xread(ctx);
1006 ctx->flags |= SEEN_X | SEEN_A;
1007 /* Check if r_X is zero */
1008 emit_bcond(MIPS_COND_EQ, r_X, r_zero,
1009 b_imm(prog->len, ctx), ctx);
1010 emit_load_imm(r_val, 0, ctx); /* delay slot */
1011 emit_div(r_A, r_X, ctx);
1012 break;
a83d081e 1013 case BPF_ALU | BPF_MOD | BPF_X:
c6610de3
MC		 1014 /* A %= X */
1015 update_on_xread(ctx);
1016 ctx->flags |= SEEN_X | SEEN_A;
1017 /* Check if r_X is zero */
1018 emit_bcond(MIPS_COND_EQ, r_X, r_zero,
1019 b_imm(prog->len, ctx), ctx);
1020 emit_load_imm(r_val, 0, ctx); /* delay slot */
1021 emit_mod(r_A, r_X, ctx);
1022 break;
a83d081e 1023 case BPF_ALU | BPF_OR | BPF_K:
c6610de3
MC		 1024 /* A |= K */
1025 ctx->flags |= SEEN_A;
1026 emit_ori(r_A, r_A, k, ctx);
1027 break;
a83d081e 1028 case BPF_ALU | BPF_OR | BPF_X:
c6610de3
MC		 1029 /* A |= X */
1030 update_on_xread(ctx);
1031 ctx->flags |= SEEN_A;
1032 emit_ori(r_A, r_A, r_X, ctx);
1033 break;
a83d081e 1034 case BPF_ALU | BPF_XOR | BPF_K:
c6610de3
MC		 1035 /* A ^= k */
1036 ctx->flags |= SEEN_A;
1037 emit_xori(r_A, r_A, k, ctx);
1038 break;
a83d081e
DB		 1039 case BPF_ANC | SKF_AD_ALU_XOR_X:
1040 case BPF_ALU | BPF_XOR | BPF_X:
c6610de3
MC		 1041 /* A ^= X */
1042 update_on_xread(ctx);
1043 ctx->flags |= SEEN_A;
1044 emit_xor(r_A, r_A, r_X, ctx);
1045 break;
a83d081e 1046 case BPF_ALU | BPF_AND | BPF_K:
c6610de3
MC		 1047 /* A &= K */
1048 ctx->flags |= SEEN_A;
1049 emit_andi(r_A, r_A, k, ctx);
1050 break;
a83d081e 1051 case BPF_ALU | BPF_AND | BPF_X:
c6610de3
MC		 1052 /* A &= X */
1053 update_on_xread(ctx);
1054 ctx->flags |= SEEN_A | SEEN_X;
1055 emit_and(r_A, r_A, r_X, ctx);
1056 break;
a83d081e 1057 case BPF_ALU | BPF_LSH | BPF_K:
c6610de3
MC		 1058 /* A <<= K */
1059 ctx->flags |= SEEN_A;
1060 emit_sll(r_A, r_A, k, ctx);
1061 break;
a83d081e 1062 case BPF_ALU | BPF_LSH | BPF_X:
c6610de3
MC		 1063 /* A <<= X */
1064 ctx->flags |= SEEN_A | SEEN_X;
1065 update_on_xread(ctx);
1066 emit_sllv(r_A, r_A, r_X, ctx);
1067 break;
a83d081e 1068 case BPF_ALU | BPF_RSH | BPF_K:
c6610de3
MC		 1069 /* A >>= K */
1070 ctx->flags |= SEEN_A;
1071 emit_srl(r_A, r_A, k, ctx);
1072 break;
a83d081e 1073 case BPF_ALU | BPF_RSH | BPF_X:
c6610de3
MC		 1074 ctx->flags |= SEEN_A | SEEN_X;
1075 update_on_xread(ctx);
1076 emit_srlv(r_A, r_A, r_X, ctx);
1077 break;
a83d081e 1078 case BPF_ALU | BPF_NEG:
c6610de3
MC		 1079 /* A = -A */
1080 ctx->flags |= SEEN_A;
1081 emit_neg(r_A, ctx);
1082 break;
a83d081e 1083 case BPF_JMP | BPF_JA:
c6610de3
MC		 1084 /* pc += K */
1085 emit_b(b_imm(i + k + 1, ctx), ctx);
1086 emit_nop(ctx);
1087 break;
a83d081e 1088 case BPF_JMP | BPF_JEQ | BPF_K:
c6610de3
MC		 1089 /* pc += ( A == K ) ? pc->jt : pc->jf */
1090 condt = MIPS_COND_EQ | MIPS_COND_K;
1091 goto jmp_cmp;
a83d081e 1092 case BPF_JMP | BPF_JEQ | BPF_X:
c6610de3
MC		 1093 ctx->flags |= SEEN_X;
1094 /* pc += ( A == X ) ? pc->jt : pc->jf */
1095 condt = MIPS_COND_EQ | MIPS_COND_X;
1096 goto jmp_cmp;
a83d081e 1097 case BPF_JMP | BPF_JGE | BPF_K:
c6610de3
MC		 1098 /* pc += ( A >= K ) ? pc->jt : pc->jf */
1099 condt = MIPS_COND_GE | MIPS_COND_K;
1100 goto jmp_cmp;
a83d081e 1101 case BPF_JMP | BPF_JGE | BPF_X:
c6610de3
MC		 1102 ctx->flags |= SEEN_X;
1103 /* pc += ( A >= X ) ? pc->jt : pc->jf */
1104 condt = MIPS_COND_GE | MIPS_COND_X;
1105 goto jmp_cmp;
a83d081e 1106 case BPF_JMP | BPF_JGT | BPF_K:
c6610de3
MC		 1107 /* pc += ( A > K ) ? pc->jt : pc->jf */
1108 condt = MIPS_COND_GT | MIPS_COND_K;
1109 goto jmp_cmp;
a83d081e 1110 case BPF_JMP | BPF_JGT | BPF_X:
c6610de3
MC		 1111 ctx->flags |= SEEN_X;
1112 /* pc += ( A > X ) ? pc->jt : pc->jf */
1113 condt = MIPS_COND_GT | MIPS_COND_X;
1114jmp_cmp:
1115 /* Greater or Equal */
1116 if ((condt & MIPS_COND_GE) ||
1117 (condt & MIPS_COND_GT)) {
1118 if (condt & MIPS_COND_K) { /* K */
1119 ctx->flags |= SEEN_S0 | SEEN_A;
1120 emit_sltiu(r_s0, r_A, k, ctx);
1121 } else { /* X */
1122 ctx->flags |= SEEN_S0 | SEEN_A |
1123 SEEN_X;
1124 emit_sltu(r_s0, r_A, r_X, ctx);
1125 }
1126 /* A < (K|X) ? r_scrach = 1 */
1127 b_off = b_imm(i + inst->jf + 1, ctx);
1ab24a4e 1128 emit_bcond(MIPS_COND_NE, r_s0, r_zero, b_off,
c6610de3
MC		 1129 ctx);
1130 emit_nop(ctx);
1131 /* A > (K|X) ? scratch = 0 */
1132 if (condt & MIPS_COND_GT) {
1133 /* Checking for equality */
1134 ctx->flags |= SEEN_S0 | SEEN_A | SEEN_X;
1135 if (condt & MIPS_COND_K)
1136 emit_load_imm(r_s0, k, ctx);
1137 else
1138 emit_jit_reg_move(r_s0, r_X,
1139 ctx);
1140 b_off = b_imm(i + inst->jf + 1, ctx);
1141 emit_bcond(MIPS_COND_EQ, r_A, r_s0,
1142 b_off, ctx);
1143 emit_nop(ctx);
1144 /* Finally, A > K|X */
1145 b_off = b_imm(i + inst->jt + 1, ctx);
1146 emit_b(b_off, ctx);
1147 emit_nop(ctx);
1148 } else {
1149 /* A >= (K|X) so jump */
1150 b_off = b_imm(i + inst->jt + 1, ctx);
1151 emit_b(b_off, ctx);
1152 emit_nop(ctx);
1153 }
1154 } else {
1155 /* A == K|X */
1156 if (condt & MIPS_COND_K) { /* K */
1157 ctx->flags |= SEEN_S0 | SEEN_A;
1158 emit_load_imm(r_s0, k, ctx);
1159 /* jump true */
1160 b_off = b_imm(i + inst->jt + 1, ctx);
1161 emit_bcond(MIPS_COND_EQ, r_A, r_s0,
1162 b_off, ctx);
1163 emit_nop(ctx);
1164 /* jump false */
1165 b_off = b_imm(i + inst->jf + 1,
1166 ctx);
1167 emit_bcond(MIPS_COND_NE, r_A, r_s0,
1168 b_off, ctx);
1169 emit_nop(ctx);
1170 } else { /* X */
1171 /* jump true */
1172 ctx->flags |= SEEN_A | SEEN_X;
1173 b_off = b_imm(i + inst->jt + 1,
1174 ctx);
1175 emit_bcond(MIPS_COND_EQ, r_A, r_X,
1176 b_off, ctx);
1177 emit_nop(ctx);
1178 /* jump false */
1179 b_off = b_imm(i + inst->jf + 1, ctx);
1180 emit_bcond(MIPS_COND_NE, r_A, r_X,
1181 b_off, ctx);
1182 emit_nop(ctx);
1183 }
1184 }
1185 break;
a83d081e 1186 case BPF_JMP | BPF_JSET | BPF_K:
c6610de3
MC		 1187 ctx->flags |= SEEN_S0 | SEEN_S1 | SEEN_A;
1188 /* pc += (A & K) ? pc -> jt : pc -> jf */
1189 emit_load_imm(r_s1, k, ctx);
1190 emit_and(r_s0, r_A, r_s1, ctx);
1191 /* jump true */
1192 b_off = b_imm(i + inst->jt + 1, ctx);
1193 emit_bcond(MIPS_COND_NE, r_s0, r_zero, b_off, ctx);
1194 emit_nop(ctx);
1195 /* jump false */
1196 b_off = b_imm(i + inst->jf + 1, ctx);
1197 emit_b(b_off, ctx);
1198 emit_nop(ctx);
1199 break;
a83d081e 1200 case BPF_JMP | BPF_JSET | BPF_X:
c6610de3
MC		 1201 ctx->flags |= SEEN_S0 | SEEN_X | SEEN_A;
1202 /* pc += (A & X) ? pc -> jt : pc -> jf */
1203 emit_and(r_s0, r_A, r_X, ctx);
1204 /* jump true */
1205 b_off = b_imm(i + inst->jt + 1, ctx);
1206 emit_bcond(MIPS_COND_NE, r_s0, r_zero, b_off, ctx);
1207 emit_nop(ctx);
1208 /* jump false */
1209 b_off = b_imm(i + inst->jf + 1, ctx);
1210 emit_b(b_off, ctx);
1211 emit_nop(ctx);
1212 break;
a83d081e 1213 case BPF_RET | BPF_A:
c6610de3
MC		 1214 ctx->flags |= SEEN_A;
1215 if (i != prog->len - 1)
1216 /*
1217 * If this is not the last instruction
1218 * then jump to the epilogue
1219 */
1220 emit_b(b_imm(prog->len, ctx), ctx);
1221 emit_reg_move(r_ret, r_A, ctx); /* delay slot */
1222 break;
a83d081e 1223 case BPF_RET | BPF_K:
c6610de3
MC		 1224 /*
1225 * It can emit two instructions so it does not fit on
1226 * the delay slot.
1227 */
1228 emit_load_imm(r_ret, k, ctx);
1229 if (i != prog->len - 1) {
1230 /*
1231 * If this is not the last instruction
1232 * then jump to the epilogue
1233 */
1234 emit_b(b_imm(prog->len, ctx), ctx);
1235 emit_nop(ctx);
1236 }
1237 break;
a83d081e 1238 case BPF_MISC | BPF_TAX:
c6610de3
MC		 1239 /* X = A */
1240 ctx->flags |= SEEN_X | SEEN_A;
1241 emit_jit_reg_move(r_X, r_A, ctx);
1242 break;
a83d081e 1243 case BPF_MISC | BPF_TXA:
c6610de3
MC		 1244 /* A = X */
1245 ctx->flags |= SEEN_A | SEEN_X;
1246 update_on_xread(ctx);
1247 emit_jit_reg_move(r_A, r_X, ctx);
1248 break;
1249 /* AUX */
a83d081e 1250 case BPF_ANC | SKF_AD_PROTOCOL:
c6610de3
MC		 1251 /* A = ntohs(skb->protocol */
1252 ctx->flags |= SEEN_SKB | SEEN_OFF | SEEN_A;
1253 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
1254 protocol) != 2);
1255 off = offsetof(struct sk_buff, protocol);
1256 emit_half_load(r_A, r_skb, off, ctx);
1257#ifdef CONFIG_CPU_LITTLE_ENDIAN
1258 /* This needs little endian fixup */
b4f16c93
RB		 1259 if (cpu_has_mips_r2) {
1260 /* R2 and later have the wsbh instruction */
1261 emit_wsbh(r_A, r_A, ctx);
1262 } else {
c6610de3
MC		 1263 /* Get first byte */
1264 emit_andi(r_tmp_imm, r_A, 0xff, ctx);
1265 /* Shift it */
1266 emit_sll(r_tmp, r_tmp_imm, 8, ctx);
1267 /* Get second byte */
1268 emit_srl(r_tmp_imm, r_A, 8, ctx);
1269 emit_andi(r_tmp_imm, r_tmp_imm, 0xff, ctx);
1270 /* Put everyting together in r_A */
1271 emit_or(r_A, r_tmp, r_tmp_imm, ctx);
c6610de3
MC		 1272 }
1273#endif
1274 break;
a83d081e 1275 case BPF_ANC | SKF_AD_CPU:
c6610de3
MC		 1276 ctx->flags |= SEEN_A | SEEN_OFF;
1277 /* A = current_thread_info()->cpu */
1278 BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info,
1279 cpu) != 4);
1280 off = offsetof(struct thread_info, cpu);
1281 /* $28/gp points to the thread_info struct */
1282 emit_load(r_A, 28, off, ctx);
1283 break;
a83d081e 1284 case BPF_ANC | SKF_AD_IFINDEX:
c6610de3
MC		 1285 /* A = skb->dev->ifindex */
1286 ctx->flags |= SEEN_SKB | SEEN_A | SEEN_S0;
1287 off = offsetof(struct sk_buff, dev);
1288 emit_load(r_s0, r_skb, off, ctx);
1289 /* error (0) in the delay slot */
1290 emit_bcond(MIPS_COND_EQ, r_s0, r_zero,
1291 b_imm(prog->len, ctx), ctx);
1292 emit_reg_move(r_ret, r_zero, ctx);
1293 BUILD_BUG_ON(FIELD_SIZEOF(struct net_device,
1294 ifindex) != 4);
1295 off = offsetof(struct net_device, ifindex);
1296 emit_load(r_A, r_s0, off, ctx);
1297 break;
a83d081e 1298 case BPF_ANC | SKF_AD_MARK:
c6610de3
MC		 1299 ctx->flags |= SEEN_SKB | SEEN_A;
1300 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, mark) != 4);
1301 off = offsetof(struct sk_buff, mark);
1302 emit_load(r_A, r_skb, off, ctx);
1303 break;
a83d081e 1304 case BPF_ANC | SKF_AD_RXHASH:
c6610de3
MC		 1305 ctx->flags |= SEEN_SKB | SEEN_A;
1306 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, hash) != 4);
1307 off = offsetof(struct sk_buff, hash);
1308 emit_load(r_A, r_skb, off, ctx);
1309 break;
a83d081e
DB		 1310 case BPF_ANC | SKF_AD_VLAN_TAG:
1311 case BPF_ANC | SKF_AD_VLAN_TAG_PRESENT:
c6610de3
MC		 1312 ctx->flags |= SEEN_SKB | SEEN_S0 | SEEN_A;
1313 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
1314 vlan_tci) != 2);
1315 off = offsetof(struct sk_buff, vlan_tci);
1316 emit_half_load(r_s0, r_skb, off, ctx);
91a41d7f 1317 if (code == (BPF_ANC | SKF_AD_VLAN_TAG)) {
6e86c59d 1318 emit_andi(r_A, r_s0, (u16)~VLAN_TAG_PRESENT, ctx);
91a41d7f 1319 } else {
9ee1606e 1320 emit_andi(r_A, r_s0, VLAN_TAG_PRESENT, ctx);
91a41d7f
MC		 1321 /* return 1 if present */
1322 emit_sltu(r_A, r_zero, r_A, ctx);
1323 }
c6610de3 1324 break;
a83d081e 1325 case BPF_ANC | SKF_AD_PKTTYPE:
9eebfe47
MC		 1326 ctx->flags |= SEEN_SKB;
1327
c6610de3
MC		 1328 off = pkt_type_offset();
1329
1330 if (off < 0)
1331 return -1;
1332 emit_load_byte(r_tmp, r_skb, off, ctx);
1333 /* Keep only the last 3 bits */
1334 emit_andi(r_A, r_tmp, PKT_TYPE_MAX, ctx);
1335 break;
a83d081e 1336 case BPF_ANC | SKF_AD_QUEUE:
c6610de3
MC		 1337 ctx->flags |= SEEN_SKB | SEEN_A;
1338 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
1339 queue_mapping) != 2);
1340 BUILD_BUG_ON(offsetof(struct sk_buff,
1341 queue_mapping) > 0xff);
1342 off = offsetof(struct sk_buff, queue_mapping);
1343 emit_half_load(r_A, r_skb, off, ctx);
1344 break;
1345 default:
78b95b66
MC		 1346 pr_debug("%s: Unhandled opcode: 0x%02x\n", __FILE__,
1347 inst->code);
c6610de3
MC		 1348 return -1;
1349 }
1350 }
1351
1352 /* compute offsets only during the first pass */
1353 if (ctx->target == NULL)
1354 ctx->offsets[i] = ctx->idx * 4;
1355
1356 return 0;
1357}
1358
1359int bpf_jit_enable __read_mostly;
1360
1361void bpf_jit_compile(struct sk_filter *fp)
1362{
1363 struct jit_ctx ctx;
1364 unsigned int alloc_size, tmp_idx;
1365
1366 if (!bpf_jit_enable)
1367 return;
1368
1369 memset(&ctx, 0, sizeof(ctx));
1370
1371 ctx.offsets = kcalloc(fp->len, sizeof(*ctx.offsets), GFP_KERNEL);
1372 if (ctx.offsets == NULL)
1373 return;
1374
1375 ctx.skf = fp;
1376
1377 if (build_body(&ctx))
1378 goto out;
1379
1380 tmp_idx = ctx.idx;
1381 build_prologue(&ctx);
1382 ctx.prologue_bytes = (ctx.idx - tmp_idx) * 4;
1383 /* just to complete the ctx.idx count */
1384 build_epilogue(&ctx);
1385
1386 alloc_size = 4 * ctx.idx;
1387 ctx.target = module_alloc(alloc_size);
1388 if (ctx.target == NULL)
1389 goto out;
1390
1391 /* Clean it */
1392 memset(ctx.target, 0, alloc_size);
1393
1394 ctx.idx = 0;
1395
1396 /* Generate the actual JIT code */
1397 build_prologue(&ctx);
1398 build_body(&ctx);
1399 build_epilogue(&ctx);
1400
1401 /* Update the icache */
1402 flush_icache_range((ptr)ctx.target, (ptr)(ctx.target + ctx.idx));
1403
1404 if (bpf_jit_enable > 1)
1405 /* Dump JIT code */
1406 bpf_jit_dump(fp->len, alloc_size, 2, ctx.target);
1407
1408 fp->bpf_func = (void *)ctx.target;
1409 fp->jited = 1;
1410
1411out:
1412 kfree(ctx.offsets);
1413}
1414
1415void bpf_jit_free(struct sk_filter *fp)
1416{
1417 if (fp->jited)
1418 module_free(NULL, fp->bpf_func);
1419 kfree(fp);
1420}
Linux 6.x block layer and io_uring tree(s)