Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1994 - 2000 Ralf Baechle | |
7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. | |
8 | * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com | |
9 | * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. | |
10 | */ | |
b868868a | 11 | #include <linux/bug.h> |
1da177e4 | 12 | #include <linux/init.h> |
d9ba5778 | 13 | #include <linux/export.h> |
1da177e4 LT |
14 | #include <linux/signal.h> |
15 | #include <linux/sched.h> | |
631330f5 | 16 | #include <linux/smp.h> |
1da177e4 LT |
17 | #include <linux/kernel.h> |
18 | #include <linux/errno.h> | |
19 | #include <linux/string.h> | |
20 | #include <linux/types.h> | |
21 | #include <linux/pagemap.h> | |
22 | #include <linux/ptrace.h> | |
23 | #include <linux/mman.h> | |
24 | #include <linux/mm.h> | |
57c8a661 | 25 | #include <linux/memblock.h> |
1da177e4 LT |
26 | #include <linux/highmem.h> |
27 | #include <linux/swap.h> | |
3d503753 | 28 | #include <linux/proc_fs.h> |
22a9835c | 29 | #include <linux/pfn.h> |
0f334a3e | 30 | #include <linux/hardirq.h> |
5a0e3ad6 | 31 | #include <linux/gfp.h> |
2f96b8c1 | 32 | #include <linux/kcore.h> |
2aa7687c | 33 | #include <linux/initrd.h> |
1da177e4 LT |
34 | |
35 | #include <asm/bootinfo.h> | |
36 | #include <asm/cachectl.h> | |
37 | #include <asm/cpu.h> | |
38 | #include <asm/dma.h> | |
f8829cae | 39 | #include <asm/kmap_types.h> |
cbd95a89 | 40 | #include <asm/maar.h> |
1da177e4 LT |
41 | #include <asm/mmu_context.h> |
42 | #include <asm/sections.h> | |
43 | #include <asm/pgtable.h> | |
44 | #include <asm/pgalloc.h> | |
45 | #include <asm/tlb.h> | |
f8829cae RB |
46 | #include <asm/fixmap.h> |
47 | ||
1da177e4 LT |
48 | /* |
49 | * We have up to 8 empty zeroed pages so we can map one of the right colour | |
70342287 | 50 | * when needed. This is necessary only on R4000 / R4400 SC and MC versions |
1da177e4 LT |
51 | * where we have to avoid VCED / VECI exceptions for good performance at |
52 | * any price. Since page is never written to after the initialization we | |
53 | * don't have to care about aliases on other CPUs. | |
54 | */ | |
55 | unsigned long empty_zero_page, zero_page_mask; | |
497d2adc | 56 | EXPORT_SYMBOL_GPL(empty_zero_page); |
0b70068e | 57 | EXPORT_SYMBOL(zero_page_mask); |
1da177e4 LT |
58 | |
59 | /* | |
60 | * Not static inline because used by IP27 special magic initialization code | |
61 | */ | |
31605922 | 62 | void setup_zero_pages(void) |
1da177e4 | 63 | { |
31605922 | 64 | unsigned int order, i; |
1da177e4 LT |
65 | struct page *page; |
66 | ||
67 | if (cpu_has_vce) | |
68 | order = 3; | |
69 | else | |
70 | order = 0; | |
71 | ||
72 | empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order); | |
73 | if (!empty_zero_page) | |
74 | panic("Oh boy, that early out of memory?"); | |
75 | ||
99e3b942 | 76 | page = virt_to_page((void *)empty_zero_page); |
8dfcc9ba | 77 | split_page(page, order); |
31605922 JL |
78 | for (i = 0; i < (1 << order); i++, page++) |
79 | mark_page_reserved(page); | |
1da177e4 | 80 | |
31605922 | 81 | zero_page_mask = ((PAGE_SIZE << order) - 1) & PAGE_MASK; |
1da177e4 LT |
82 | } |
83 | ||
e2a9e5ad | 84 | static void *__kmap_pgprot(struct page *page, unsigned long addr, pgprot_t prot) |
f8829cae RB |
85 | { |
86 | enum fixed_addresses idx; | |
87 | unsigned long vaddr, flags, entrylo; | |
88 | unsigned long old_ctx; | |
89 | pte_t pte; | |
90 | int tlbidx; | |
91 | ||
b868868a RB |
92 | BUG_ON(Page_dcache_dirty(page)); |
93 | ||
ce01948e | 94 | preempt_disable(); |
bdb43806 | 95 | pagefault_disable(); |
f8829cae | 96 | idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1); |
0f334a3e | 97 | idx += in_interrupt() ? FIX_N_COLOURS : 0; |
f8829cae | 98 | vaddr = __fix_to_virt(FIX_CMAP_END - idx); |
e2a9e5ad | 99 | pte = mk_pte(page, prot); |
7b2cb64f | 100 | #if defined(CONFIG_XPA) |
c5b36783 | 101 | entrylo = pte_to_entrylo(pte.pte_high); |
7b2cb64f PB |
102 | #elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) |
103 | entrylo = pte.pte_high; | |
f8829cae | 104 | #else |
6dd9344c | 105 | entrylo = pte_to_entrylo(pte_val(pte)); |
f8829cae RB |
106 | #endif |
107 | ||
b633648c | 108 | local_irq_save(flags); |
f8829cae RB |
109 | old_ctx = read_c0_entryhi(); |
110 | write_c0_entryhi(vaddr & (PAGE_MASK << 1)); | |
111 | write_c0_entrylo0(entrylo); | |
112 | write_c0_entrylo1(entrylo); | |
c5b36783 | 113 | #ifdef CONFIG_XPA |
4b6f99d3 JH |
114 | if (cpu_has_xpa) { |
115 | entrylo = (pte.pte_low & _PFNX_MASK); | |
116 | writex_c0_entrylo0(entrylo); | |
117 | writex_c0_entrylo1(entrylo); | |
118 | } | |
c5b36783 | 119 | #endif |
10313980 | 120 | tlbidx = num_wired_entries(); |
f8829cae RB |
121 | write_c0_wired(tlbidx + 1); |
122 | write_c0_index(tlbidx); | |
123 | mtc0_tlbw_hazard(); | |
124 | tlb_write_indexed(); | |
f8829cae RB |
125 | tlbw_use_hazard(); |
126 | write_c0_entryhi(old_ctx); | |
b633648c | 127 | local_irq_restore(flags); |
f8829cae RB |
128 | |
129 | return (void*) vaddr; | |
130 | } | |
131 | ||
e2a9e5ad PB |
132 | void *kmap_coherent(struct page *page, unsigned long addr) |
133 | { | |
134 | return __kmap_pgprot(page, addr, PAGE_KERNEL); | |
135 | } | |
136 | ||
137 | void *kmap_noncoherent(struct page *page, unsigned long addr) | |
138 | { | |
139 | return __kmap_pgprot(page, addr, PAGE_KERNEL_NC); | |
140 | } | |
141 | ||
eacb9d61 | 142 | void kunmap_coherent(void) |
f8829cae | 143 | { |
f8829cae RB |
144 | unsigned int wired; |
145 | unsigned long flags, old_ctx; | |
146 | ||
b633648c | 147 | local_irq_save(flags); |
f8829cae | 148 | old_ctx = read_c0_entryhi(); |
10313980 | 149 | wired = num_wired_entries() - 1; |
f8829cae RB |
150 | write_c0_wired(wired); |
151 | write_c0_index(wired); | |
152 | write_c0_entryhi(UNIQUE_ENTRYHI(wired)); | |
153 | write_c0_entrylo0(0); | |
154 | write_c0_entrylo1(0); | |
155 | mtc0_tlbw_hazard(); | |
156 | tlb_write_indexed(); | |
157 | tlbw_use_hazard(); | |
158 | write_c0_entryhi(old_ctx); | |
b633648c | 159 | local_irq_restore(flags); |
bdb43806 | 160 | pagefault_enable(); |
ce01948e | 161 | preempt_enable(); |
f8829cae RB |
162 | } |
163 | ||
bcd02280 AN |
164 | void copy_user_highpage(struct page *to, struct page *from, |
165 | unsigned long vaddr, struct vm_area_struct *vma) | |
166 | { | |
167 | void *vfrom, *vto; | |
168 | ||
9c02048f | 169 | vto = kmap_atomic(to); |
9a74b3eb | 170 | if (cpu_has_dc_aliases && |
e1534ae9 | 171 | page_mapcount(from) && !Page_dcache_dirty(from)) { |
bcd02280 AN |
172 | vfrom = kmap_coherent(from, vaddr); |
173 | copy_page(vto, vfrom); | |
eacb9d61 | 174 | kunmap_coherent(); |
bcd02280 | 175 | } else { |
9c02048f | 176 | vfrom = kmap_atomic(from); |
bcd02280 | 177 | copy_page(vto, vfrom); |
9c02048f | 178 | kunmap_atomic(vfrom); |
bcd02280 | 179 | } |
39b8d525 | 180 | if ((!cpu_has_ic_fills_f_dc) || |
bcd02280 AN |
181 | pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) |
182 | flush_data_cache_page((unsigned long)vto); | |
9c02048f | 183 | kunmap_atomic(vto); |
bcd02280 AN |
184 | /* Make sure this page is cleared on other CPU's too before using it */ |
185 | smp_wmb(); | |
186 | } | |
187 | ||
f8829cae RB |
188 | void copy_to_user_page(struct vm_area_struct *vma, |
189 | struct page *page, unsigned long vaddr, void *dst, const void *src, | |
190 | unsigned long len) | |
191 | { | |
9a74b3eb | 192 | if (cpu_has_dc_aliases && |
e1534ae9 | 193 | page_mapcount(page) && !Page_dcache_dirty(page)) { |
f8829cae RB |
194 | void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); |
195 | memcpy(vto, src, len); | |
eacb9d61 | 196 | kunmap_coherent(); |
985c30ef | 197 | } else { |
f8829cae | 198 | memcpy(dst, src, len); |
985c30ef RB |
199 | if (cpu_has_dc_aliases) |
200 | SetPageDcacheDirty(page); | |
201 | } | |
b2a3c5be | 202 | if (vma->vm_flags & VM_EXEC) |
f8829cae RB |
203 | flush_cache_page(vma, vaddr, page_to_pfn(page)); |
204 | } | |
205 | ||
f8829cae RB |
206 | void copy_from_user_page(struct vm_area_struct *vma, |
207 | struct page *page, unsigned long vaddr, void *dst, const void *src, | |
208 | unsigned long len) | |
209 | { | |
9a74b3eb | 210 | if (cpu_has_dc_aliases && |
e1534ae9 | 211 | page_mapcount(page) && !Page_dcache_dirty(page)) { |
985c30ef | 212 | void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); |
f8829cae | 213 | memcpy(dst, vfrom, len); |
eacb9d61 | 214 | kunmap_coherent(); |
985c30ef | 215 | } else { |
f8829cae | 216 | memcpy(dst, src, len); |
985c30ef RB |
217 | if (cpu_has_dc_aliases) |
218 | SetPageDcacheDirty(page); | |
219 | } | |
f8829cae | 220 | } |
bf9621aa | 221 | EXPORT_SYMBOL_GPL(copy_from_user_page); |
f8829cae | 222 | |
84fd089a | 223 | void __init fixrange_init(unsigned long start, unsigned long end, |
1da177e4 LT |
224 | pgd_t *pgd_base) |
225 | { | |
b633648c | 226 | #ifdef CONFIG_HIGHMEM |
1da177e4 | 227 | pgd_t *pgd; |
c6e8b587 | 228 | pud_t *pud; |
1da177e4 LT |
229 | pmd_t *pmd; |
230 | pte_t *pte; | |
c6e8b587 | 231 | int i, j, k; |
1da177e4 LT |
232 | unsigned long vaddr; |
233 | ||
234 | vaddr = start; | |
235 | i = __pgd_offset(vaddr); | |
c6e8b587 RB |
236 | j = __pud_offset(vaddr); |
237 | k = __pmd_offset(vaddr); | |
1da177e4 LT |
238 | pgd = pgd_base + i; |
239 | ||
464fd83e | 240 | for ( ; (i < PTRS_PER_PGD) && (vaddr < end); pgd++, i++) { |
c6e8b587 | 241 | pud = (pud_t *)pgd; |
464fd83e | 242 | for ( ; (j < PTRS_PER_PUD) && (vaddr < end); pud++, j++) { |
c6e8b587 | 243 | pmd = (pmd_t *)pud; |
464fd83e | 244 | for (; (k < PTRS_PER_PMD) && (vaddr < end); pmd++, k++) { |
c6e8b587 | 245 | if (pmd_none(*pmd)) { |
e8625dce MR |
246 | pte = (pte_t *) memblock_alloc_low(PAGE_SIZE, |
247 | PAGE_SIZE); | |
f8829cae | 248 | set_pmd(pmd, __pmd((unsigned long)pte)); |
b72b7092 | 249 | BUG_ON(pte != pte_offset_kernel(pmd, 0)); |
c6e8b587 RB |
250 | } |
251 | vaddr += PMD_SIZE; | |
1da177e4 | 252 | } |
c6e8b587 | 253 | k = 0; |
1da177e4 LT |
254 | } |
255 | j = 0; | |
256 | } | |
f8829cae | 257 | #endif |
1da177e4 | 258 | } |
1da177e4 | 259 | |
def3ab5d PB |
260 | unsigned __weak platform_maar_init(unsigned num_pairs) |
261 | { | |
262 | struct maar_config cfg[BOOT_MEM_MAP_MAX]; | |
263 | unsigned i, num_configured, num_cfg = 0; | |
def3ab5d PB |
264 | |
265 | for (i = 0; i < boot_mem_map.nr_map; i++) { | |
266 | switch (boot_mem_map.map[i].type) { | |
267 | case BOOT_MEM_RAM: | |
268 | case BOOT_MEM_INIT_RAM: | |
269 | break; | |
270 | default: | |
271 | continue; | |
272 | } | |
273 | ||
ac7e385f | 274 | /* Round lower up */ |
def3ab5d | 275 | cfg[num_cfg].lower = boot_mem_map.map[i].addr; |
ac7e385f | 276 | cfg[num_cfg].lower = (cfg[num_cfg].lower + 0xffff) & ~0xffff; |
def3ab5d | 277 | |
ac7e385f JH |
278 | /* Round upper down */ |
279 | cfg[num_cfg].upper = boot_mem_map.map[i].addr + | |
280 | boot_mem_map.map[i].size; | |
281 | cfg[num_cfg].upper = (cfg[num_cfg].upper & ~0xffff) - 1; | |
def3ab5d PB |
282 | |
283 | cfg[num_cfg].attrs = MIPS_MAAR_S; | |
284 | num_cfg++; | |
285 | } | |
286 | ||
287 | num_configured = maar_config(cfg, num_cfg, num_pairs); | |
288 | if (num_configured < num_cfg) | |
289 | pr_warn("Not enough MAAR pairs (%u) for all bootmem regions (%u)\n", | |
290 | num_pairs, num_cfg); | |
291 | ||
292 | return num_configured; | |
293 | } | |
294 | ||
e060f6ed | 295 | void maar_init(void) |
def3ab5d PB |
296 | { |
297 | unsigned num_maars, used, i; | |
651ca7f4 | 298 | phys_addr_t lower, upper, attr; |
e060f6ed PB |
299 | static struct { |
300 | struct maar_config cfgs[3]; | |
301 | unsigned used; | |
302 | } recorded = { { { 0 } }, 0 }; | |
def3ab5d PB |
303 | |
304 | if (!cpu_has_maar) | |
305 | return; | |
306 | ||
307 | /* Detect the number of MAARs */ | |
308 | write_c0_maari(~0); | |
309 | back_to_back_c0_hazard(); | |
310 | num_maars = read_c0_maari() + 1; | |
311 | ||
312 | /* MAARs should be in pairs */ | |
313 | WARN_ON(num_maars % 2); | |
314 | ||
e060f6ed PB |
315 | /* Set MAARs using values we recorded already */ |
316 | if (recorded.used) { | |
317 | used = maar_config(recorded.cfgs, recorded.used, num_maars / 2); | |
318 | BUG_ON(used != recorded.used); | |
319 | } else { | |
320 | /* Configure the required MAARs */ | |
321 | used = platform_maar_init(num_maars / 2); | |
322 | } | |
def3ab5d PB |
323 | |
324 | /* Disable any further MAARs */ | |
325 | for (i = (used * 2); i < num_maars; i++) { | |
326 | write_c0_maari(i); | |
327 | back_to_back_c0_hazard(); | |
328 | write_c0_maar(0); | |
329 | back_to_back_c0_hazard(); | |
330 | } | |
651ca7f4 | 331 | |
e060f6ed PB |
332 | if (recorded.used) |
333 | return; | |
334 | ||
651ca7f4 PB |
335 | pr_info("MAAR configuration:\n"); |
336 | for (i = 0; i < num_maars; i += 2) { | |
337 | write_c0_maari(i); | |
338 | back_to_back_c0_hazard(); | |
339 | upper = read_c0_maar(); | |
340 | ||
341 | write_c0_maari(i + 1); | |
342 | back_to_back_c0_hazard(); | |
343 | lower = read_c0_maar(); | |
344 | ||
345 | attr = lower & upper; | |
346 | lower = (lower & MIPS_MAAR_ADDR) << 4; | |
347 | upper = ((upper & MIPS_MAAR_ADDR) << 4) | 0xffff; | |
348 | ||
349 | pr_info(" [%d]: ", i / 2); | |
f359a111 | 350 | if (!(attr & MIPS_MAAR_VL)) { |
651ca7f4 PB |
351 | pr_cont("disabled\n"); |
352 | continue; | |
353 | } | |
354 | ||
355 | pr_cont("%pa-%pa", &lower, &upper); | |
356 | ||
357 | if (attr & MIPS_MAAR_S) | |
358 | pr_cont(" speculate"); | |
359 | ||
360 | pr_cont("\n"); | |
e060f6ed PB |
361 | |
362 | /* Record the setup for use on secondary CPUs */ | |
363 | if (used <= ARRAY_SIZE(recorded.cfgs)) { | |
364 | recorded.cfgs[recorded.used].lower = lower; | |
365 | recorded.cfgs[recorded.used].upper = upper; | |
366 | recorded.cfgs[recorded.used].attrs = attr; | |
367 | recorded.used++; | |
368 | } | |
651ca7f4 | 369 | } |
def3ab5d PB |
370 | } |
371 | ||
b4819b59 | 372 | #ifndef CONFIG_NEED_MULTIPLE_NODES |
61ef2489 | 373 | int page_is_ram(unsigned long pagenr) |
565200a1 AN |
374 | { |
375 | int i; | |
376 | ||
377 | for (i = 0; i < boot_mem_map.nr_map; i++) { | |
378 | unsigned long addr, end; | |
379 | ||
43064c0c DD |
380 | switch (boot_mem_map.map[i].type) { |
381 | case BOOT_MEM_RAM: | |
382 | case BOOT_MEM_INIT_RAM: | |
383 | break; | |
384 | default: | |
565200a1 AN |
385 | /* not usable memory */ |
386 | continue; | |
43064c0c | 387 | } |
565200a1 AN |
388 | |
389 | addr = PFN_UP(boot_mem_map.map[i].addr); | |
390 | end = PFN_DOWN(boot_mem_map.map[i].addr + | |
391 | boot_mem_map.map[i].size); | |
392 | ||
393 | if (pagenr >= addr && pagenr < end) | |
394 | return 1; | |
395 | } | |
396 | ||
397 | return 0; | |
398 | } | |
399 | ||
1da177e4 LT |
400 | void __init paging_init(void) |
401 | { | |
cce335ae | 402 | unsigned long max_zone_pfns[MAX_NR_ZONES]; |
1da177e4 LT |
403 | |
404 | pagetable_init(); | |
405 | ||
406 | #ifdef CONFIG_HIGHMEM | |
407 | kmap_init(); | |
408 | #endif | |
05502339 | 409 | #ifdef CONFIG_ZONE_DMA |
cce335ae | 410 | max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN; |
1da177e4 | 411 | #endif |
cce335ae RB |
412 | #ifdef CONFIG_ZONE_DMA32 |
413 | max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN; | |
414 | #endif | |
415 | max_zone_pfns[ZONE_NORMAL] = max_low_pfn; | |
1da177e4 | 416 | #ifdef CONFIG_HIGHMEM |
cce335ae | 417 | max_zone_pfns[ZONE_HIGHMEM] = highend_pfn; |
cbb8fc07 | 418 | |
cce335ae | 419 | if (cpu_has_dc_aliases && max_low_pfn != highend_pfn) { |
cbb8fc07 | 420 | printk(KERN_WARNING "This processor doesn't support highmem." |
cce335ae RB |
421 | " %ldk highmem ignored\n", |
422 | (highend_pfn - max_low_pfn) << (PAGE_SHIFT - 10)); | |
423 | max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn; | |
cbb8fc07 | 424 | } |
1da177e4 LT |
425 | #endif |
426 | ||
cce335ae | 427 | free_area_init_nodes(max_zone_pfns); |
1da177e4 LT |
428 | } |
429 | ||
3d503753 DJ |
430 | #ifdef CONFIG_64BIT |
431 | static struct kcore_list kcore_kseg0; | |
432 | #endif | |
433 | ||
1132137e | 434 | static inline void mem_init_free_highmem(void) |
1da177e4 | 435 | { |
1132137e JL |
436 | #ifdef CONFIG_HIGHMEM |
437 | unsigned long tmp; | |
1da177e4 | 438 | |
058effe7 PB |
439 | if (cpu_has_dc_aliases) |
440 | return; | |
441 | ||
1132137e JL |
442 | for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) { |
443 | struct page *page = pfn_to_page(tmp); | |
444 | ||
445 | if (!page_is_ram(tmp)) | |
446 | SetPageReserved(page); | |
447 | else | |
448 | free_highmem_page(page); | |
449 | } | |
450 | #endif | |
451 | } | |
452 | ||
453 | void __init mem_init(void) | |
454 | { | |
1da177e4 LT |
455 | #ifdef CONFIG_HIGHMEM |
456 | #ifdef CONFIG_DISCONTIGMEM | |
457 | #error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet" | |
458 | #endif | |
b6da0ffb | 459 | max_mapnr = highend_pfn ? highend_pfn : max_low_pfn; |
1da177e4 | 460 | #else |
565200a1 | 461 | max_mapnr = max_low_pfn; |
1da177e4 LT |
462 | #endif |
463 | high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT); | |
464 | ||
ab9988a3 | 465 | maar_init(); |
c6ffc5ca | 466 | memblock_free_all(); |
31605922 | 467 | setup_zero_pages(); /* Setup zeroed pages. */ |
1132137e JL |
468 | mem_init_free_highmem(); |
469 | mem_init_print_info(NULL); | |
1da177e4 | 470 | |
3d503753 DJ |
471 | #ifdef CONFIG_64BIT |
472 | if ((unsigned long) &_text > (unsigned long) CKSEG0) | |
473 | /* The -4 is a hack so that user tools don't have to handle | |
474 | the overflow. */ | |
c30bb2a2 KH |
475 | kclist_add(&kcore_kseg0, (void *) CKSEG0, |
476 | 0x80000000 - 4, KCORE_TEXT); | |
3d503753 | 477 | #endif |
1da177e4 | 478 | } |
b4819b59 | 479 | #endif /* !CONFIG_NEED_MULTIPLE_NODES */ |
1da177e4 | 480 | |
c44e8d5e | 481 | void free_init_pages(const char *what, unsigned long begin, unsigned long end) |
6fd11a21 | 482 | { |
acd86b86 | 483 | unsigned long pfn; |
6fd11a21 | 484 | |
acd86b86 FBH |
485 | for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) { |
486 | struct page *page = pfn_to_page(pfn); | |
487 | void *addr = phys_to_virt(PFN_PHYS(pfn)); | |
488 | ||
acd86b86 | 489 | memset(addr, POISON_FREE_INITMEM, PAGE_SIZE); |
31605922 | 490 | free_reserved_page(page); |
6fd11a21 RB |
491 | } |
492 | printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10); | |
493 | } | |
494 | ||
1da177e4 LT |
495 | #ifdef CONFIG_BLK_DEV_INITRD |
496 | void free_initrd_mem(unsigned long start, unsigned long end) | |
497 | { | |
11199692 JL |
498 | free_reserved_area((void *)start, (void *)end, POISON_FREE_INITMEM, |
499 | "initrd"); | |
1da177e4 LT |
500 | } |
501 | #endif | |
502 | ||
0893d3fb MC |
503 | void (*free_init_pages_eva)(void *begin, void *end) = NULL; |
504 | ||
bd721ea7 | 505 | void __ref free_initmem(void) |
1da177e4 | 506 | { |
c44e8d5e | 507 | prom_free_prom_memory(); |
0893d3fb MC |
508 | /* |
509 | * Let the platform define a specific function to free the | |
510 | * init section since EVA may have used any possible mapping | |
511 | * between virtual and physical addresses. | |
512 | */ | |
513 | if (free_init_pages_eva) | |
514 | free_init_pages_eva((void *)&__init_begin, (void *)&__init_end); | |
515 | else | |
516 | free_initmem_default(POISON_FREE_INITMEM); | |
1da177e4 | 517 | } |
69a6c312 | 518 | |
82622284 | 519 | #ifndef CONFIG_MIPS_PGD_C0_CONTEXT |
69a6c312 | 520 | unsigned long pgd_current[NR_CPUS]; |
82622284 | 521 | #endif |
9975e77d RB |
522 | |
523 | /* | |
485172b3 DD |
524 | * Align swapper_pg_dir in to 64K, allows its address to be loaded |
525 | * with a single LUI instruction in the TLB handlers. If we used | |
526 | * __aligned(64K), its size would get rounded up to the alignment | |
527 | * size, and waste space. So we place it in its own section and align | |
528 | * it in the linker script. | |
9975e77d | 529 | */ |
2f0b649b | 530 | pgd_t swapper_pg_dir[PTRS_PER_PGD] __section(.bss..swapper_pg_dir); |
3377e227 AB |
531 | #ifndef __PAGETABLE_PUD_FOLDED |
532 | pud_t invalid_pud_table[PTRS_PER_PUD] __page_aligned_bss; | |
533 | #endif | |
325f8a0a | 534 | #ifndef __PAGETABLE_PMD_FOLDED |
485172b3 | 535 | pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned_bss; |
ccf01516 | 536 | EXPORT_SYMBOL_GPL(invalid_pmd_table); |
69a6c312 | 537 | #endif |
485172b3 | 538 | pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss; |
aa4089e6 | 539 | EXPORT_SYMBOL(invalid_pte_table); |