Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com> | |
70342287 | 7 | * Copyright (C) 2000, 2001, 06 Ralf Baechle <ralf@linux-mips.org> |
1da177e4 LT |
8 | * swiped from i386, and cloned for MIPS by Geert, polished by Ralf. |
9 | */ | |
9a88cbb5 | 10 | |
1da177e4 | 11 | #include <linux/types.h> |
9a88cbb5 | 12 | #include <linux/dma-mapping.h> |
1da177e4 LT |
13 | #include <linux/mm.h> |
14 | #include <linux/module.h> | |
4fcc47a0 | 15 | #include <linux/scatterlist.h> |
6e86b0bf | 16 | #include <linux/string.h> |
5a0e3ad6 | 17 | #include <linux/gfp.h> |
e36863a5 | 18 | #include <linux/highmem.h> |
1da177e4 LT |
19 | |
20 | #include <asm/cache.h> | |
21 | #include <asm/io.h> | |
22 | ||
9a88cbb5 RB |
23 | #include <dma-coherence.h> |
24 | ||
b6d92b4a SH |
25 | int coherentio = 0; /* User defined DMA coherency from command line. */ |
26 | EXPORT_SYMBOL_GPL(coherentio); | |
27 | int hw_coherentio = 0; /* Actual hardware supported DMA coherency setting. */ | |
28 | ||
29 | static int __init setcoherentio(char *str) | |
30 | { | |
31 | coherentio = 1; | |
32 | pr_info("Hardware DMA cache coherency (command line)\n"); | |
33 | return 0; | |
34 | } | |
35 | early_param("coherentio", setcoherentio); | |
36 | ||
37 | static int __init setnocoherentio(char *str) | |
38 | { | |
39 | coherentio = 0; | |
40 | pr_info("Software DMA cache coherency (command line)\n"); | |
41 | return 0; | |
42 | } | |
43 | early_param("nocoherentio", setnocoherentio); | |
44 | ||
e36863a5 | 45 | static inline struct page *dma_addr_to_page(struct device *dev, |
3807ef3f | 46 | dma_addr_t dma_addr) |
c9d06962 | 47 | { |
e36863a5 DD |
48 | return pfn_to_page( |
49 | plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT); | |
c9d06962 FBH |
50 | } |
51 | ||
1da177e4 | 52 | /* |
f86f55d3 JQ |
53 | * The affected CPUs below in 'cpu_needs_post_dma_flush()' can |
54 | * speculatively fill random cachelines with stale data at any time, | |
55 | * requiring an extra flush post-DMA. | |
56 | * | |
1da177e4 LT |
57 | * Warning on the terminology - Linux calls an uncached area coherent; |
58 | * MIPS terminology calls memory areas with hardware maintained coherency | |
59 | * coherent. | |
60 | */ | |
f86f55d3 | 61 | static inline int cpu_needs_post_dma_flush(struct device *dev) |
9a88cbb5 RB |
62 | { |
63 | return !plat_device_is_coherent(dev) && | |
10cc3529 | 64 | (current_cpu_type() == CPU_R10000 || |
f86f55d3 JQ |
65 | current_cpu_type() == CPU_R12000 || |
66 | current_cpu_type() == CPU_BMIPS5000); | |
9a88cbb5 RB |
67 | } |
68 | ||
cce335ae RB |
69 | static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp) |
70 | { | |
a2e715a8 RB |
71 | gfp_t dma_flag; |
72 | ||
cce335ae RB |
73 | /* ignore region specifiers */ |
74 | gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM); | |
75 | ||
a2e715a8 | 76 | #ifdef CONFIG_ISA |
cce335ae | 77 | if (dev == NULL) |
a2e715a8 | 78 | dma_flag = __GFP_DMA; |
cce335ae RB |
79 | else |
80 | #endif | |
a2e715a8 | 81 | #if defined(CONFIG_ZONE_DMA32) && defined(CONFIG_ZONE_DMA) |
cce335ae | 82 | if (dev->coherent_dma_mask < DMA_BIT_MASK(32)) |
a2e715a8 RB |
83 | dma_flag = __GFP_DMA; |
84 | else if (dev->coherent_dma_mask < DMA_BIT_MASK(64)) | |
85 | dma_flag = __GFP_DMA32; | |
86 | else | |
87 | #endif | |
88 | #if defined(CONFIG_ZONE_DMA32) && !defined(CONFIG_ZONE_DMA) | |
89 | if (dev->coherent_dma_mask < DMA_BIT_MASK(64)) | |
90 | dma_flag = __GFP_DMA32; | |
91 | else | |
92 | #endif | |
93 | #if defined(CONFIG_ZONE_DMA) && !defined(CONFIG_ZONE_DMA32) | |
94 | if (dev->coherent_dma_mask < DMA_BIT_MASK(64)) | |
95 | dma_flag = __GFP_DMA; | |
cce335ae RB |
96 | else |
97 | #endif | |
a2e715a8 | 98 | dma_flag = 0; |
cce335ae RB |
99 | |
100 | /* Don't invoke OOM killer */ | |
101 | gfp |= __GFP_NORETRY; | |
102 | ||
a2e715a8 | 103 | return gfp | dma_flag; |
cce335ae RB |
104 | } |
105 | ||
1da177e4 | 106 | void *dma_alloc_noncoherent(struct device *dev, size_t size, |
185a8ff5 | 107 | dma_addr_t * dma_handle, gfp_t gfp) |
1da177e4 LT |
108 | { |
109 | void *ret; | |
9a88cbb5 | 110 | |
cce335ae | 111 | gfp = massage_gfp_flags(dev, gfp); |
1da177e4 | 112 | |
1da177e4 LT |
113 | ret = (void *) __get_free_pages(gfp, get_order(size)); |
114 | ||
115 | if (ret != NULL) { | |
116 | memset(ret, 0, size); | |
9a88cbb5 | 117 | *dma_handle = plat_map_dma_mem(dev, ret, size); |
1da177e4 LT |
118 | } |
119 | ||
120 | return ret; | |
121 | } | |
1da177e4 LT |
122 | EXPORT_SYMBOL(dma_alloc_noncoherent); |
123 | ||
48e1fd5a | 124 | static void *mips_dma_alloc_coherent(struct device *dev, size_t size, |
e8d51e54 | 125 | dma_addr_t * dma_handle, gfp_t gfp, struct dma_attrs *attrs) |
1da177e4 LT |
126 | { |
127 | void *ret; | |
128 | ||
f8ac0425 YY |
129 | if (dma_alloc_from_coherent(dev, size, dma_handle, &ret)) |
130 | return ret; | |
131 | ||
cce335ae | 132 | gfp = massage_gfp_flags(dev, gfp); |
9a88cbb5 | 133 | |
9a88cbb5 RB |
134 | ret = (void *) __get_free_pages(gfp, get_order(size)); |
135 | ||
1da177e4 | 136 | if (ret) { |
9a88cbb5 RB |
137 | memset(ret, 0, size); |
138 | *dma_handle = plat_map_dma_mem(dev, ret, size); | |
139 | ||
140 | if (!plat_device_is_coherent(dev)) { | |
141 | dma_cache_wback_inv((unsigned long) ret, size); | |
b6d92b4a SH |
142 | if (!hw_coherentio) |
143 | ret = UNCAC_ADDR(ret); | |
9a88cbb5 | 144 | } |
1da177e4 LT |
145 | } |
146 | ||
147 | return ret; | |
148 | } | |
149 | ||
1da177e4 LT |
150 | |
151 | void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr, | |
152 | dma_addr_t dma_handle) | |
153 | { | |
d3f634b9 | 154 | plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL); |
1da177e4 LT |
155 | free_pages((unsigned long) vaddr, get_order(size)); |
156 | } | |
1da177e4 LT |
157 | EXPORT_SYMBOL(dma_free_noncoherent); |
158 | ||
48e1fd5a | 159 | static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr, |
e8d51e54 | 160 | dma_addr_t dma_handle, struct dma_attrs *attrs) |
1da177e4 LT |
161 | { |
162 | unsigned long addr = (unsigned long) vaddr; | |
f8ac0425 YY |
163 | int order = get_order(size); |
164 | ||
165 | if (dma_release_from_coherent(dev, order, vaddr)) | |
166 | return; | |
1da177e4 | 167 | |
d3f634b9 | 168 | plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL); |
11531ac2 | 169 | |
b6d92b4a | 170 | if (!plat_device_is_coherent(dev) && !hw_coherentio) |
9a88cbb5 RB |
171 | addr = CAC_ADDR(addr); |
172 | ||
1da177e4 LT |
173 | free_pages(addr, get_order(size)); |
174 | } | |
175 | ||
e36863a5 | 176 | static inline void __dma_sync_virtual(void *addr, size_t size, |
1da177e4 LT |
177 | enum dma_data_direction direction) |
178 | { | |
179 | switch (direction) { | |
180 | case DMA_TO_DEVICE: | |
e36863a5 | 181 | dma_cache_wback((unsigned long)addr, size); |
1da177e4 LT |
182 | break; |
183 | ||
184 | case DMA_FROM_DEVICE: | |
e36863a5 | 185 | dma_cache_inv((unsigned long)addr, size); |
1da177e4 LT |
186 | break; |
187 | ||
188 | case DMA_BIDIRECTIONAL: | |
e36863a5 | 189 | dma_cache_wback_inv((unsigned long)addr, size); |
1da177e4 LT |
190 | break; |
191 | ||
192 | default: | |
193 | BUG(); | |
194 | } | |
195 | } | |
196 | ||
e36863a5 DD |
197 | /* |
198 | * A single sg entry may refer to multiple physically contiguous | |
199 | * pages. But we still need to process highmem pages individually. | |
200 | * If highmem is not configured then the bulk of this loop gets | |
201 | * optimized out. | |
202 | */ | |
203 | static inline void __dma_sync(struct page *page, | |
204 | unsigned long offset, size_t size, enum dma_data_direction direction) | |
205 | { | |
206 | size_t left = size; | |
207 | ||
208 | do { | |
209 | size_t len = left; | |
210 | ||
211 | if (PageHighMem(page)) { | |
212 | void *addr; | |
213 | ||
214 | if (offset + len > PAGE_SIZE) { | |
215 | if (offset >= PAGE_SIZE) { | |
216 | page += offset >> PAGE_SHIFT; | |
217 | offset &= ~PAGE_MASK; | |
218 | } | |
219 | len = PAGE_SIZE - offset; | |
220 | } | |
221 | ||
222 | addr = kmap_atomic(page); | |
223 | __dma_sync_virtual(addr + offset, len, direction); | |
224 | kunmap_atomic(addr); | |
225 | } else | |
226 | __dma_sync_virtual(page_address(page) + offset, | |
227 | size, direction); | |
228 | offset = 0; | |
229 | page++; | |
230 | left -= len; | |
231 | } while (left); | |
232 | } | |
233 | ||
48e1fd5a DD |
234 | static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr, |
235 | size_t size, enum dma_data_direction direction, struct dma_attrs *attrs) | |
1da177e4 | 236 | { |
f86f55d3 | 237 | if (cpu_needs_post_dma_flush(dev)) |
e36863a5 DD |
238 | __dma_sync(dma_addr_to_page(dev, dma_addr), |
239 | dma_addr & ~PAGE_MASK, size, direction); | |
1da177e4 | 240 | |
d3f634b9 | 241 | plat_unmap_dma_mem(dev, dma_addr, size, direction); |
1da177e4 LT |
242 | } |
243 | ||
48e1fd5a DD |
244 | static int mips_dma_map_sg(struct device *dev, struct scatterlist *sg, |
245 | int nents, enum dma_data_direction direction, struct dma_attrs *attrs) | |
1da177e4 LT |
246 | { |
247 | int i; | |
248 | ||
1da177e4 | 249 | for (i = 0; i < nents; i++, sg++) { |
e36863a5 DD |
250 | if (!plat_device_is_coherent(dev)) |
251 | __dma_sync(sg_page(sg), sg->offset, sg->length, | |
252 | direction); | |
4954a9a2 J |
253 | #ifdef CONFIG_NEED_SG_DMA_LENGTH |
254 | sg->dma_length = sg->length; | |
255 | #endif | |
e36863a5 DD |
256 | sg->dma_address = plat_map_dma_mem_page(dev, sg_page(sg)) + |
257 | sg->offset; | |
1da177e4 LT |
258 | } |
259 | ||
260 | return nents; | |
261 | } | |
262 | ||
48e1fd5a DD |
263 | static dma_addr_t mips_dma_map_page(struct device *dev, struct page *page, |
264 | unsigned long offset, size_t size, enum dma_data_direction direction, | |
265 | struct dma_attrs *attrs) | |
1da177e4 | 266 | { |
48e1fd5a | 267 | if (!plat_device_is_coherent(dev)) |
e36863a5 | 268 | __dma_sync(page, offset, size, direction); |
1da177e4 | 269 | |
e36863a5 | 270 | return plat_map_dma_mem_page(dev, page) + offset; |
1da177e4 LT |
271 | } |
272 | ||
48e1fd5a DD |
273 | static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sg, |
274 | int nhwentries, enum dma_data_direction direction, | |
275 | struct dma_attrs *attrs) | |
1da177e4 | 276 | { |
1da177e4 LT |
277 | int i; |
278 | ||
1da177e4 | 279 | for (i = 0; i < nhwentries; i++, sg++) { |
9a88cbb5 | 280 | if (!plat_device_is_coherent(dev) && |
e36863a5 DD |
281 | direction != DMA_TO_DEVICE) |
282 | __dma_sync(sg_page(sg), sg->offset, sg->length, | |
283 | direction); | |
d3f634b9 | 284 | plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction); |
1da177e4 LT |
285 | } |
286 | } | |
287 | ||
48e1fd5a DD |
288 | static void mips_dma_sync_single_for_cpu(struct device *dev, |
289 | dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) | |
1da177e4 | 290 | { |
f86f55d3 | 291 | if (cpu_needs_post_dma_flush(dev)) |
e36863a5 DD |
292 | __dma_sync(dma_addr_to_page(dev, dma_handle), |
293 | dma_handle & ~PAGE_MASK, size, direction); | |
1da177e4 LT |
294 | } |
295 | ||
48e1fd5a DD |
296 | static void mips_dma_sync_single_for_device(struct device *dev, |
297 | dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) | |
1da177e4 | 298 | { |
843aef49 | 299 | plat_extra_sync_for_device(dev); |
e36863a5 DD |
300 | if (!plat_device_is_coherent(dev)) |
301 | __dma_sync(dma_addr_to_page(dev, dma_handle), | |
302 | dma_handle & ~PAGE_MASK, size, direction); | |
1da177e4 LT |
303 | } |
304 | ||
48e1fd5a DD |
305 | static void mips_dma_sync_sg_for_cpu(struct device *dev, |
306 | struct scatterlist *sg, int nelems, enum dma_data_direction direction) | |
1da177e4 LT |
307 | { |
308 | int i; | |
42a3b4f2 | 309 | |
1da177e4 | 310 | /* Make sure that gcc doesn't leave the empty loop body. */ |
9a88cbb5 | 311 | for (i = 0; i < nelems; i++, sg++) { |
f86f55d3 | 312 | if (cpu_needs_post_dma_flush(dev)) |
e36863a5 DD |
313 | __dma_sync(sg_page(sg), sg->offset, sg->length, |
314 | direction); | |
9a88cbb5 | 315 | } |
1da177e4 LT |
316 | } |
317 | ||
48e1fd5a DD |
318 | static void mips_dma_sync_sg_for_device(struct device *dev, |
319 | struct scatterlist *sg, int nelems, enum dma_data_direction direction) | |
1da177e4 LT |
320 | { |
321 | int i; | |
322 | ||
1da177e4 | 323 | /* Make sure that gcc doesn't leave the empty loop body. */ |
9a88cbb5 RB |
324 | for (i = 0; i < nelems; i++, sg++) { |
325 | if (!plat_device_is_coherent(dev)) | |
e36863a5 DD |
326 | __dma_sync(sg_page(sg), sg->offset, sg->length, |
327 | direction); | |
9a88cbb5 | 328 | } |
1da177e4 LT |
329 | } |
330 | ||
48e1fd5a | 331 | int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
1da177e4 | 332 | { |
843aef49 | 333 | return plat_dma_mapping_error(dev, dma_addr); |
1da177e4 LT |
334 | } |
335 | ||
48e1fd5a | 336 | int mips_dma_supported(struct device *dev, u64 mask) |
1da177e4 | 337 | { |
843aef49 | 338 | return plat_dma_supported(dev, mask); |
1da177e4 LT |
339 | } |
340 | ||
a3aad4aa | 341 | void dma_cache_sync(struct device *dev, void *vaddr, size_t size, |
48e1fd5a | 342 | enum dma_data_direction direction) |
1da177e4 | 343 | { |
9a88cbb5 | 344 | BUG_ON(direction == DMA_NONE); |
1da177e4 | 345 | |
843aef49 | 346 | plat_extra_sync_for_device(dev); |
9a88cbb5 | 347 | if (!plat_device_is_coherent(dev)) |
e36863a5 | 348 | __dma_sync_virtual(vaddr, size, direction); |
1da177e4 LT |
349 | } |
350 | ||
a3aad4aa RB |
351 | EXPORT_SYMBOL(dma_cache_sync); |
352 | ||
48e1fd5a | 353 | static struct dma_map_ops mips_default_dma_map_ops = { |
e8d51e54 AP |
354 | .alloc = mips_dma_alloc_coherent, |
355 | .free = mips_dma_free_coherent, | |
48e1fd5a DD |
356 | .map_page = mips_dma_map_page, |
357 | .unmap_page = mips_dma_unmap_page, | |
358 | .map_sg = mips_dma_map_sg, | |
359 | .unmap_sg = mips_dma_unmap_sg, | |
360 | .sync_single_for_cpu = mips_dma_sync_single_for_cpu, | |
361 | .sync_single_for_device = mips_dma_sync_single_for_device, | |
362 | .sync_sg_for_cpu = mips_dma_sync_sg_for_cpu, | |
363 | .sync_sg_for_device = mips_dma_sync_sg_for_device, | |
364 | .mapping_error = mips_dma_mapping_error, | |
365 | .dma_supported = mips_dma_supported | |
366 | }; | |
367 | ||
368 | struct dma_map_ops *mips_dma_map_ops = &mips_default_dma_map_ops; | |
369 | EXPORT_SYMBOL(mips_dma_map_ops); | |
370 | ||
371 | #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16) | |
372 | ||
373 | static int __init mips_dma_init(void) | |
374 | { | |
375 | dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES); | |
376 | ||
377 | return 0; | |
378 | } | |
379 | fs_initcall(mips_dma_init); |