Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
641e97f3 | 6 | * Copyright (C) 1994 - 2003, 06, 07 by Ralf Baechle (ralf@linux-mips.org) |
7575a49f | 7 | * Copyright (C) 2007 MIPS Technologies, Inc. |
1da177e4 | 8 | */ |
24e9d0b9 RB |
9 | #include <linux/fs.h> |
10 | #include <linux/fcntl.h> | |
1da177e4 LT |
11 | #include <linux/init.h> |
12 | #include <linux/kernel.h> | |
641e97f3 | 13 | #include <linux/linkage.h> |
1da177e4 LT |
14 | #include <linux/module.h> |
15 | #include <linux/sched.h> | |
dbda6ac0 | 16 | #include <linux/syscalls.h> |
1da177e4 LT |
17 | #include <linux/mm.h> |
18 | ||
19 | #include <asm/cacheflush.h> | |
20 | #include <asm/processor.h> | |
21 | #include <asm/cpu.h> | |
22 | #include <asm/cpu-features.h> | |
23 | ||
24 | /* Cache operations. */ | |
25 | void (*flush_cache_all)(void); | |
26 | void (*__flush_cache_all)(void); | |
27 | void (*flush_cache_mm)(struct mm_struct *mm); | |
28 | void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start, | |
29 | unsigned long end); | |
53de0d47 RB |
30 | void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, |
31 | unsigned long pfn); | |
d4264f18 | 32 | void (*flush_icache_range)(unsigned long start, unsigned long end); |
e0cee3ee | 33 | void (*local_flush_icache_range)(unsigned long start, unsigned long end); |
1da177e4 | 34 | |
9c5a3d72 RB |
35 | void (*__flush_cache_vmap)(void); |
36 | void (*__flush_cache_vunmap)(void); | |
37 | ||
1da177e4 LT |
38 | /* MIPS specific cache operations */ |
39 | void (*flush_cache_sigtramp)(unsigned long addr); | |
7e3bfc7c | 40 | void (*local_flush_data_cache_page)(void * addr); |
1da177e4 LT |
41 | void (*flush_data_cache_page)(unsigned long addr); |
42 | void (*flush_icache_all)(void); | |
43 | ||
9202f325 | 44 | EXPORT_SYMBOL_GPL(local_flush_data_cache_page); |
9ff77c46 RB |
45 | EXPORT_SYMBOL(flush_data_cache_page); |
46 | ||
1da177e4 LT |
47 | #ifdef CONFIG_DMA_NONCOHERENT |
48 | ||
49 | /* DMA cache operations. */ | |
50 | void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size); | |
51 | void (*_dma_cache_wback)(unsigned long start, unsigned long size); | |
52 | void (*_dma_cache_inv)(unsigned long start, unsigned long size); | |
53 | ||
54 | EXPORT_SYMBOL(_dma_cache_wback_inv); | |
1da177e4 LT |
55 | |
56 | #endif /* CONFIG_DMA_NONCOHERENT */ | |
57 | ||
58 | /* | |
59 | * We could optimize the case where the cache argument is not BCACHE but | |
60 | * that seems very atypical use ... | |
61 | */ | |
dbda6ac0 RB |
62 | SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes, |
63 | unsigned int, cache) | |
1da177e4 | 64 | { |
750ccf68 AN |
65 | if (bytes == 0) |
66 | return 0; | |
fe00f943 | 67 | if (!access_ok(VERIFY_WRITE, (void __user *) addr, bytes)) |
1da177e4 LT |
68 | return -EFAULT; |
69 | ||
70 | flush_icache_range(addr, addr + bytes); | |
71 | ||
72 | return 0; | |
73 | } | |
74 | ||
75 | void __flush_dcache_page(struct page *page) | |
76 | { | |
77 | struct address_space *mapping = page_mapping(page); | |
78 | unsigned long addr; | |
79 | ||
585fa724 RB |
80 | if (PageHighMem(page)) |
81 | return; | |
1da177e4 LT |
82 | if (mapping && !mapping_mapped(mapping)) { |
83 | SetPageDcacheDirty(page); | |
84 | return; | |
85 | } | |
86 | ||
87 | /* | |
88 | * We could delay the flush for the !page_mapping case too. But that | |
89 | * case is for exec env/arg pages and those are %99 certainly going to | |
90 | * get faulted into the tlb (and thus flushed) anyways. | |
91 | */ | |
92 | addr = (unsigned long) page_address(page); | |
93 | flush_data_cache_page(addr); | |
94 | } | |
95 | ||
96 | EXPORT_SYMBOL(__flush_dcache_page); | |
97 | ||
7575a49f RB |
98 | void __flush_anon_page(struct page *page, unsigned long vmaddr) |
99 | { | |
9a74b3eb | 100 | unsigned long addr = (unsigned long) page_address(page); |
7575a49f | 101 | |
9a74b3eb RB |
102 | if (pages_do_alias(addr, vmaddr)) { |
103 | if (page_mapped(page) && !Page_dcache_dirty(page)) { | |
104 | void *kaddr; | |
105 | ||
106 | kaddr = kmap_coherent(page, vmaddr); | |
107 | flush_data_cache_page((unsigned long)kaddr); | |
108 | kunmap_coherent(); | |
109 | } else | |
110 | flush_data_cache_page(addr); | |
7575a49f RB |
111 | } |
112 | } | |
113 | ||
114 | EXPORT_SYMBOL(__flush_anon_page); | |
115 | ||
1da177e4 LT |
116 | void __update_cache(struct vm_area_struct *vma, unsigned long address, |
117 | pte_t pte) | |
118 | { | |
119 | struct page *page; | |
120 | unsigned long pfn, addr; | |
585fa724 | 121 | int exec = (vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc; |
1da177e4 LT |
122 | |
123 | pfn = pte_pfn(pte); | |
585fa724 RB |
124 | if (unlikely(!pfn_valid(pfn))) |
125 | return; | |
126 | page = pfn_to_page(pfn); | |
127 | if (page_mapping(page) && Page_dcache_dirty(page)) { | |
128 | addr = (unsigned long) page_address(page); | |
129 | if (exec || pages_do_alias(addr, address & PAGE_MASK)) | |
1da177e4 | 130 | flush_data_cache_page(addr); |
1da177e4 LT |
131 | ClearPageDcacheDirty(page); |
132 | } | |
133 | } | |
134 | ||
35133692 CD |
135 | unsigned long _page_cachable_default; |
136 | EXPORT_SYMBOL_GPL(_page_cachable_default); | |
137 | ||
138 | static inline void setup_protection_map(void) | |
139 | { | |
140 | protection_map[0] = PAGE_NONE; | |
141 | protection_map[1] = PAGE_READONLY; | |
142 | protection_map[2] = PAGE_COPY; | |
143 | protection_map[3] = PAGE_COPY; | |
144 | protection_map[4] = PAGE_READONLY; | |
145 | protection_map[5] = PAGE_READONLY; | |
146 | protection_map[6] = PAGE_COPY; | |
147 | protection_map[7] = PAGE_COPY; | |
148 | protection_map[8] = PAGE_NONE; | |
149 | protection_map[9] = PAGE_READONLY; | |
150 | protection_map[10] = PAGE_SHARED; | |
151 | protection_map[11] = PAGE_SHARED; | |
152 | protection_map[12] = PAGE_READONLY; | |
153 | protection_map[13] = PAGE_READONLY; | |
154 | protection_map[14] = PAGE_SHARED; | |
155 | protection_map[15] = PAGE_SHARED; | |
156 | } | |
1da177e4 | 157 | |
234fcd14 | 158 | void __devinit cpu_cache_init(void) |
1da177e4 | 159 | { |
02cf2119 RB |
160 | if (cpu_has_3k_cache) { |
161 | extern void __weak r3k_cache_init(void); | |
162 | ||
163 | r3k_cache_init(); | |
02cf2119 RB |
164 | } |
165 | if (cpu_has_6k_cache) { | |
166 | extern void __weak r6k_cache_init(void); | |
167 | ||
168 | r6k_cache_init(); | |
1da177e4 | 169 | } |
02cf2119 RB |
170 | if (cpu_has_4k_cache) { |
171 | extern void __weak r4k_cache_init(void); | |
172 | ||
173 | r4k_cache_init(); | |
02cf2119 RB |
174 | } |
175 | if (cpu_has_8k_cache) { | |
176 | extern void __weak r8k_cache_init(void); | |
177 | ||
178 | r8k_cache_init(); | |
02cf2119 RB |
179 | } |
180 | if (cpu_has_tx39_cache) { | |
181 | extern void __weak tx39_cache_init(void); | |
182 | ||
183 | tx39_cache_init(); | |
02cf2119 | 184 | } |
02cf2119 | 185 | |
47d979ec DD |
186 | if (cpu_has_octeon_cache) { |
187 | extern void __weak octeon_cache_init(void); | |
188 | ||
189 | octeon_cache_init(); | |
190 | } | |
191 | ||
35133692 | 192 | setup_protection_map(); |
1da177e4 | 193 | } |
24e9d0b9 RB |
194 | |
195 | int __weak __uncached_access(struct file *file, unsigned long addr) | |
196 | { | |
197 | if (file->f_flags & O_SYNC) | |
198 | return 1; | |
199 | ||
200 | return addr >= __pa(high_memory); | |
201 | } |