[linux-2.6-block.git] / arch / mips / mm / cache.c

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1994 - 2003, 06, 07 by Ralf Baechle (ralf@linux-mips.org)
 * Copyright (C) 2007 MIPS Technologies, Inc.
 */
#include <linux/fs.h>
#include <linux/fcntl.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/linkage.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/syscalls.h>
#include <linux/mm.h>

#include <asm/cacheflush.h>
#include <asm/processor.h>
#include <asm/cpu.h>
#include <asm/cpu-features.h>

/* Cache operations. */
void (*flush_cache_all)(void);
void (*__flush_cache_all)(void);
void (*flush_cache_mm)(struct mm_struct *mm);
void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start,
	unsigned long end);
void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page,
	unsigned long pfn);
void (*flush_icache_range)(unsigned long start, unsigned long end);
void (*local_flush_icache_range)(unsigned long start, unsigned long end);

void (*__flush_cache_vmap)(void);
void (*__flush_cache_vunmap)(void);

void (*__flush_kernel_vmap_range)(unsigned long vaddr, int size);
void (*__invalidate_kernel_vmap_range)(unsigned long vaddr, int size);

EXPORT_SYMBOL_GPL(__flush_kernel_vmap_range);

/* MIPS specific cache operations */
void (*flush_cache_sigtramp)(unsigned long addr);
void (*local_flush_data_cache_page)(void * addr);
void (*flush_data_cache_page)(unsigned long addr);
void (*flush_icache_all)(void);

EXPORT_SYMBOL_GPL(local_flush_data_cache_page);
EXPORT_SYMBOL(flush_data_cache_page);
EXPORT_SYMBOL(flush_icache_all);

#ifdef CONFIG_DMA_NONCOHERENT

/* DMA cache operations. */
void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
void (*_dma_cache_wback)(unsigned long start, unsigned long size);
void (*_dma_cache_inv)(unsigned long start, unsigned long size);

EXPORT_SYMBOL(_dma_cache_wback_inv);

#endif /* CONFIG_DMA_NONCOHERENT */

/*
 * We could optimize the case where the cache argument is not BCACHE but
 * that seems very atypical use ...
 */
SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes,
	unsigned int, cache)
{
	if (bytes == 0)
		return 0;
	if (!access_ok(VERIFY_WRITE, (void __user *) addr, bytes))
		return -EFAULT;

	flush_icache_range(addr, addr + bytes);

	return 0;
}

void __flush_dcache_page(struct page *page)
{
	struct address_space *mapping = page_mapping(page);
	unsigned long addr;

	if (PageHighMem(page))
		return;
	if (mapping && !mapping_mapped(mapping)) {
		SetPageDcacheDirty(page);
		return;
	}

	/*
	 * We could delay the flush for the !page_mapping case too.  But that
	 * case is for exec env/arg pages and those are %99 certainly going to
	 * get faulted into the tlb (and thus flushed) anyways.
	 */
	addr = (unsigned long) page_address(page);
	flush_data_cache_page(addr);
}

EXPORT_SYMBOL(__flush_dcache_page);

void __flush_anon_page(struct page *page, unsigned long vmaddr)
{
	unsigned long addr = (unsigned long) page_address(page);

	if (pages_do_alias(addr, vmaddr)) {
		if (page_mapped(page) && !Page_dcache_dirty(page)) {
			void *kaddr;

			kaddr = kmap_coherent(page, vmaddr);
			flush_data_cache_page((unsigned long)kaddr);
			kunmap_coherent();
		} else
			flush_data_cache_page(addr);
	}
}

EXPORT_SYMBOL(__flush_anon_page);

void __update_cache(struct vm_area_struct *vma, unsigned long address,
	pte_t pte)
{
	struct page *page;
	unsigned long pfn, addr;
	int exec = (vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc;

	pfn = pte_pfn(pte);
	if (unlikely(!pfn_valid(pfn)))
		return;
	page = pfn_to_page(pfn);
	if (page_mapping(page) && Page_dcache_dirty(page)) {
		addr = (unsigned long) page_address(page);
		if (exec || pages_do_alias(addr, address & PAGE_MASK))
			flush_data_cache_page(addr);
		ClearPageDcacheDirty(page);
	}
}

unsigned long _page_cachable_default;
EXPORT_SYMBOL(_page_cachable_default);

static inline void setup_protection_map(void)
{
	if (cpu_has_rixi) {
		protection_map[0]  = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
		protection_map[1]  = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC);
		protection_map[2]  = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
		protection_map[3]  = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC);
		protection_map[4]  = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_READ);
		protection_map[5]  = __pgprot(_page_cachable_default | _PAGE_PRESENT);
		protection_map[6]  = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_READ);
		protection_map[7]  = __pgprot(_page_cachable_default | _PAGE_PRESENT);

		protection_map[8]  = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
		protection_map[9]  = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC);
		protection_map[10] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_WRITE | _PAGE_NO_READ);
		protection_map[11] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_WRITE);
		protection_map[12] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_READ);
		protection_map[13] = __pgprot(_page_cachable_default | _PAGE_PRESENT);
		protection_map[14] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_WRITE  | _PAGE_NO_READ);
		protection_map[15] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_WRITE);

	} else {
		protection_map[0] = PAGE_NONE;
		protection_map[1] = PAGE_READONLY;
		protection_map[2] = PAGE_COPY;
		protection_map[3] = PAGE_COPY;
		protection_map[4] = PAGE_READONLY;
		protection_map[5] = PAGE_READONLY;
		protection_map[6] = PAGE_COPY;
		protection_map[7] = PAGE_COPY;
		protection_map[8] = PAGE_NONE;
		protection_map[9] = PAGE_READONLY;
		protection_map[10] = PAGE_SHARED;
		protection_map[11] = PAGE_SHARED;
		protection_map[12] = PAGE_READONLY;
		protection_map[13] = PAGE_READONLY;
		protection_map[14] = PAGE_SHARED;
		protection_map[15] = PAGE_SHARED;
	}
}

void cpu_cache_init(void)
{
	if (cpu_has_3k_cache) {
		extern void __weak r3k_cache_init(void);

		r3k_cache_init();
	}
	if (cpu_has_6k_cache) {
		extern void __weak r6k_cache_init(void);

		r6k_cache_init();
	}
	if (cpu_has_4k_cache) {
		extern void __weak r4k_cache_init(void);

		r4k_cache_init();
	}
	if (cpu_has_8k_cache) {
		extern void __weak r8k_cache_init(void);

		r8k_cache_init();
	}
	if (cpu_has_tx39_cache) {
		extern void __weak tx39_cache_init(void);

		tx39_cache_init();
	}

	if (cpu_has_octeon_cache) {
		extern void __weak octeon_cache_init(void);

		octeon_cache_init();
	}

	setup_protection_map();
}

int __weak __uncached_access(struct file *file, unsigned long addr)
{
	if (file->f_flags & O_DSYNC)
		return 1;

	return addr >= __pa(high_memory);
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
641e97f3	6	* Copyright (C) 1994 - 2003, 06, 07 by Ralf Baechle (ralf@linux-mips.org)
7575a49f	7	* Copyright (C) 2007 MIPS Technologies, Inc.
1da177e4	8	*/
24e9d0b9 RB	9	#include <linux/fs.h>
24e9d0b9 RB	10	#include <linux/fcntl.h>
1da177e4 LT	11	#include <linux/init.h>
1da177e4 LT	12	#include <linux/kernel.h>
641e97f3	13	#include <linux/linkage.h>
1da177e4 LT	14	#include <linux/module.h>
1da177e4 LT	15	#include <linux/sched.h>
dbda6ac0	16	#include <linux/syscalls.h>
1da177e4 LT	17	#include <linux/mm.h>
	18
	19	#include <asm/cacheflush.h>
	20	#include <asm/processor.h>
	21	#include <asm/cpu.h>
	22	#include <asm/cpu-features.h>
	23
	24	/* Cache operations. */
	25	void (*flush_cache_all)(void);
	26	void (*__flush_cache_all)(void);
	27	void (flush_cache_mm)(struct mm_struct mm);
	28	void (flush_cache_range)(struct vm_area_struct vma, unsigned long start,
	29	unsigned long end);
53de0d47 RB	30	void (flush_cache_page)(struct vm_area_struct vma, unsigned long page,
53de0d47 RB	31	unsigned long pfn);
d4264f18	32	void (*flush_icache_range)(unsigned long start, unsigned long end);
e0cee3ee	33	void (*local_flush_icache_range)(unsigned long start, unsigned long end);
1da177e4	34
9c5a3d72 RB	35	void (*__flush_cache_vmap)(void);
	36	void (*__flush_cache_vunmap)(void);
	37
d9cdc901 RB	38	void (*__flush_kernel_vmap_range)(unsigned long vaddr, int size);
	39	void (*__invalidate_kernel_vmap_range)(unsigned long vaddr, int size);
	40
	41	EXPORT_SYMBOL_GPL(__flush_kernel_vmap_range);
	42
1da177e4 LT	43	/* MIPS specific cache operations */
1da177e4 LT	44	void (*flush_cache_sigtramp)(unsigned long addr);
7e3bfc7c	45	void (local_flush_data_cache_page)(void addr);
1da177e4 LT	46	void (*flush_data_cache_page)(unsigned long addr);
	47	void (*flush_icache_all)(void);
	48
9202f325	49	EXPORT_SYMBOL_GPL(local_flush_data_cache_page);
9ff77c46	50	EXPORT_SYMBOL(flush_data_cache_page);
f2e3656d	51	EXPORT_SYMBOL(flush_icache_all);
9ff77c46	52
1da177e4 LT	53	#ifdef CONFIG_DMA_NONCOHERENT
	54
	55	/* DMA cache operations. */
	56	void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
	57	void (*_dma_cache_wback)(unsigned long start, unsigned long size);
	58	void (*_dma_cache_inv)(unsigned long start, unsigned long size);
	59
	60	EXPORT_SYMBOL(_dma_cache_wback_inv);
1da177e4 LT	61
	62	#endif /* CONFIG_DMA_NONCOHERENT */
	63
	64	/*
	65	* We could optimize the case where the cache argument is not BCACHE but
	66	* that seems very atypical use ...
	67	*/
dbda6ac0 RB	68	SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes,
dbda6ac0 RB	69	unsigned int, cache)
1da177e4	70	{
750ccf68 AN	71	if (bytes == 0)
750ccf68 AN	72	return 0;
fe00f943	73	if (!access_ok(VERIFY_WRITE, (void __user *) addr, bytes))
1da177e4 LT	74	return -EFAULT;
	75
	76	flush_icache_range(addr, addr + bytes);
	77
	78	return 0;
	79	}
	80
	81	void __flush_dcache_page(struct page *page)
	82	{
	83	struct address_space *mapping = page_mapping(page);
	84	unsigned long addr;
	85
585fa724 RB	86	if (PageHighMem(page))
585fa724 RB	87	return;
1da177e4 LT	88	if (mapping && !mapping_mapped(mapping)) {
	89	SetPageDcacheDirty(page);
	90	return;
	91	}
	92
	93	/*
	94	* We could delay the flush for the !page_mapping case too. But that
	95	* case is for exec env/arg pages and those are %99 certainly going to
	96	* get faulted into the tlb (and thus flushed) anyways.
	97	*/
	98	addr = (unsigned long) page_address(page);
	99	flush_data_cache_page(addr);
	100	}
	101
	102	EXPORT_SYMBOL(__flush_dcache_page);
	103
7575a49f RB	104	void __flush_anon_page(struct page *page, unsigned long vmaddr)
7575a49f RB	105	{
9a74b3eb	106	unsigned long addr = (unsigned long) page_address(page);
7575a49f	107
9a74b3eb RB	108	if (pages_do_alias(addr, vmaddr)) {
	109	if (page_mapped(page) && !Page_dcache_dirty(page)) {
	110	void *kaddr;
	111
	112	kaddr = kmap_coherent(page, vmaddr);
	113	flush_data_cache_page((unsigned long)kaddr);
	114	kunmap_coherent();
	115	} else
	116	flush_data_cache_page(addr);
7575a49f RB	117	}
	118	}
	119
	120	EXPORT_SYMBOL(__flush_anon_page);
	121
1da177e4 LT	122	void __update_cache(struct vm_area_struct *vma, unsigned long address,
	123	pte_t pte)
	124	{
	125	struct page *page;
	126	unsigned long pfn, addr;
585fa724	127	int exec = (vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc;
1da177e4 LT	128
1da177e4 LT	129	pfn = pte_pfn(pte);
585fa724 RB	130	if (unlikely(!pfn_valid(pfn)))
	131	return;
	132	page = pfn_to_page(pfn);
	133	if (page_mapping(page) && Page_dcache_dirty(page)) {
	134	addr = (unsigned long) page_address(page);
	135	if (exec \|\| pages_do_alias(addr, address & PAGE_MASK))
1da177e4	136	flush_data_cache_page(addr);
1da177e4 LT	137	ClearPageDcacheDirty(page);
	138	}
	139	}
	140
35133692	141	unsigned long _page_cachable_default;
7b3e543d	142	EXPORT_SYMBOL(_page_cachable_default);
35133692 CD	143
	144	static inline void setup_protection_map(void)
	145	{
05857c64	146	if (cpu_has_rixi) {
6dd9344c DD	147	protection_map[0] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_NO_READ);
	148	protection_map[1] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);
	149	protection_map[2] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_NO_READ);
	150	protection_map[3] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);
	151	protection_map[4] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_READ);
	152	protection_map[5] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
	153	protection_map[6] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_READ);
	154	protection_map[7] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
	155
	156	protection_map[8] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_NO_READ);
	157	protection_map[9] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);
	158	protection_map[10] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_WRITE \| _PAGE_NO_READ);
	159	protection_map[11] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_WRITE);
	160	protection_map[12] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_READ);
	161	protection_map[13] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
	162	protection_map[14] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_WRITE \| _PAGE_NO_READ);
	163	protection_map[15] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_WRITE);
	164
	165	} else {
	166	protection_map[0] = PAGE_NONE;
	167	protection_map[1] = PAGE_READONLY;
	168	protection_map[2] = PAGE_COPY;
	169	protection_map[3] = PAGE_COPY;
	170	protection_map[4] = PAGE_READONLY;
	171	protection_map[5] = PAGE_READONLY;
	172	protection_map[6] = PAGE_COPY;
	173	protection_map[7] = PAGE_COPY;
	174	protection_map[8] = PAGE_NONE;
	175	protection_map[9] = PAGE_READONLY;
	176	protection_map[10] = PAGE_SHARED;
	177	protection_map[11] = PAGE_SHARED;
	178	protection_map[12] = PAGE_READONLY;
	179	protection_map[13] = PAGE_READONLY;
	180	protection_map[14] = PAGE_SHARED;
	181	protection_map[15] = PAGE_SHARED;
	182	}
35133692	183	}
1da177e4	184
078a55fc	185	void cpu_cache_init(void)
1da177e4	186	{
02cf2119 RB	187	if (cpu_has_3k_cache) {
	188	extern void __weak r3k_cache_init(void);
	189
	190	r3k_cache_init();
02cf2119 RB	191	}
	192	if (cpu_has_6k_cache) {
	193	extern void __weak r6k_cache_init(void);
	194
	195	r6k_cache_init();
1da177e4	196	}
02cf2119 RB	197	if (cpu_has_4k_cache) {
	198	extern void __weak r4k_cache_init(void);
	199
	200	r4k_cache_init();
02cf2119 RB	201	}
	202	if (cpu_has_8k_cache) {
	203	extern void __weak r8k_cache_init(void);
	204
	205	r8k_cache_init();
02cf2119 RB	206	}
	207	if (cpu_has_tx39_cache) {
	208	extern void __weak tx39_cache_init(void);
	209
	210	tx39_cache_init();
02cf2119	211	}
02cf2119	212
47d979ec DD	213	if (cpu_has_octeon_cache) {
	214	extern void __weak octeon_cache_init(void);
	215
	216	octeon_cache_init();
	217	}
	218
35133692	219	setup_protection_map();
1da177e4	220	}
24e9d0b9 RB	221
	222	int __weak __uncached_access(struct file *file, unsigned long addr)
	223	{
6b2f3d1f	224	if (file->f_flags & O_DSYNC)
24e9d0b9 RB	225	return 1;
	226
	227	return addr >= __pa(high_memory);
	228	}