projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
MIPS: KVM: Add vcpu_get_regs/vcpu_set_regs callback
[linux-2.6-block.git] / arch / mips / kvm / mips.c
CommitLineData
669e846e
SL		 1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * KVM/MIPS: MIPS specific KVM APIs
7 *
8 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
9 * Authors: Sanjay Lal <sanjayl@kymasys.com>
d116e812 10 */
669e846e
SL		 11
12#include <linux/errno.h>
13#include <linux/err.h>
14#include <linux/module.h>
15#include <linux/vmalloc.h>
16#include <linux/fs.h>
17#include <linux/bootmem.h>
f798217d 18#include <asm/fpu.h>
669e846e
SL		 19#include <asm/page.h>
20#include <asm/cacheflush.h>
21#include <asm/mmu_context.h>
c4c6f2ca 22#include <asm/pgtable.h>
669e846e
SL		 23
24#include <linux/kvm_host.h>
25
d7d5b05f
DCZ		 26#include "interrupt.h"
27#include "commpage.h"
669e846e
SL		 28
29#define CREATE_TRACE_POINTS
30#include "trace.h"
31
32#ifndef VECTORSPACING
33#define VECTORSPACING 0x100 /* for EI/VI mode */
34#endif
35
d116e812 36#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x)
669e846e 37struct kvm_stats_debugfs_item debugfs_entries[] = {
d116e812
DCZ		 38 { "wait", VCPU_STAT(wait_exits), KVM_STAT_VCPU },
39 { "cache", VCPU_STAT(cache_exits), KVM_STAT_VCPU },
40 { "signal", VCPU_STAT(signal_exits), KVM_STAT_VCPU },
41 { "interrupt", VCPU_STAT(int_exits), KVM_STAT_VCPU },
42 { "cop_unsuable", VCPU_STAT(cop_unusable_exits), KVM_STAT_VCPU },
43 { "tlbmod", VCPU_STAT(tlbmod_exits), KVM_STAT_VCPU },
44 { "tlbmiss_ld", VCPU_STAT(tlbmiss_ld_exits), KVM_STAT_VCPU },
45 { "tlbmiss_st", VCPU_STAT(tlbmiss_st_exits), KVM_STAT_VCPU },
46 { "addrerr_st", VCPU_STAT(addrerr_st_exits), KVM_STAT_VCPU },
47 { "addrerr_ld", VCPU_STAT(addrerr_ld_exits), KVM_STAT_VCPU },
48 { "syscall", VCPU_STAT(syscall_exits), KVM_STAT_VCPU },
49 { "resvd_inst", VCPU_STAT(resvd_inst_exits), KVM_STAT_VCPU },
50 { "break_inst", VCPU_STAT(break_inst_exits), KVM_STAT_VCPU },
0a560427 51 { "trap_inst", VCPU_STAT(trap_inst_exits), KVM_STAT_VCPU },
d116e812 52 { "flush_dcache", VCPU_STAT(flush_dcache_exits), KVM_STAT_VCPU },
f7819512 53 { "halt_successful_poll", VCPU_STAT(halt_successful_poll), KVM_STAT_VCPU },
d116e812 54 { "halt_wakeup", VCPU_STAT(halt_wakeup), KVM_STAT_VCPU },
669e846e
SL		 55 {NULL}
56};
57
58static int kvm_mips_reset_vcpu(struct kvm_vcpu *vcpu)
59{
60 int i;
d116e812 61
669e846e
SL		 62 for_each_possible_cpu(i) {
63 vcpu->arch.guest_kernel_asid[i] = 0;
64 vcpu->arch.guest_user_asid[i] = 0;
65 }
d116e812 66
669e846e
SL		 67 return 0;
68}
69
d116e812
DCZ		 70/*
71 * XXXKYMA: We are simulatoring a processor that has the WII bit set in
72 * Config7, so we are "runnable" if interrupts are pending
669e846e
SL		 73 */
74int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
75{
76 return !!(vcpu->arch.pending_exceptions);
77}
78
79int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
80{
81 return 1;
82}
83
13a34e06 84int kvm_arch_hardware_enable(void)
669e846e
SL		 85{
86 return 0;
87}
88
669e846e
SL		 89int kvm_arch_hardware_setup(void)
90{
91 return 0;
92}
93
669e846e
SL		 94void kvm_arch_check_processor_compat(void *rtn)
95{
d98403a5 96 *(int *)rtn = 0;
669e846e
SL		 97}
98
99static void kvm_mips_init_tlbs(struct kvm *kvm)
100{
101 unsigned long wired;
102
d116e812
DCZ		 103 /*
104 * Add a wired entry to the TLB, it is used to map the commpage to
105 * the Guest kernel
106 */
669e846e
SL		 107 wired = read_c0_wired();
108 write_c0_wired(wired + 1);
109 mtc0_tlbw_hazard();
110 kvm->arch.commpage_tlb = wired;
111
112 kvm_debug("[%d] commpage TLB: %d\n", smp_processor_id(),
113 kvm->arch.commpage_tlb);
114}
115
116static void kvm_mips_init_vm_percpu(void *arg)
117{
118 struct kvm *kvm = (struct kvm *)arg;
119
120 kvm_mips_init_tlbs(kvm);
121 kvm_mips_callbacks->vm_init(kvm);
122
123}
124
125int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
126{
127 if (atomic_inc_return(&kvm_mips_instance) == 1) {
6e95bfd2
JH		 128 kvm_debug("%s: 1st KVM instance, setup host TLB parameters\n",
129 __func__);
669e846e
SL		 130 on_each_cpu(kvm_mips_init_vm_percpu, kvm, 1);
131 }
132
669e846e
SL		 133 return 0;
134}
135
136void kvm_mips_free_vcpus(struct kvm *kvm)
137{
138 unsigned int i;
139 struct kvm_vcpu *vcpu;
140
141 /* Put the pages we reserved for the guest pmap */
142 for (i = 0; i < kvm->arch.guest_pmap_npages; i++) {
143 if (kvm->arch.guest_pmap[i] != KVM_INVALID_PAGE)
144 kvm_mips_release_pfn_clean(kvm->arch.guest_pmap[i]);
145 }
c6c0a663 146 kfree(kvm->arch.guest_pmap);
669e846e
SL		 147
148 kvm_for_each_vcpu(i, vcpu, kvm) {
149 kvm_arch_vcpu_free(vcpu);
150 }
151
152 mutex_lock(&kvm->lock);
153
154 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
155 kvm->vcpus[i] = NULL;
156
157 atomic_set(&kvm->online_vcpus, 0);
158
159 mutex_unlock(&kvm->lock);
160}
161
669e846e
SL		 162static void kvm_mips_uninit_tlbs(void *arg)
163{
164 /* Restore wired count */
165 write_c0_wired(0);
166 mtc0_tlbw_hazard();
167 /* Clear out all the TLBs */
168 kvm_local_flush_tlb_all();
169}
170
171void kvm_arch_destroy_vm(struct kvm *kvm)
172{
173 kvm_mips_free_vcpus(kvm);
174
175 /* If this is the last instance, restore wired count */
176 if (atomic_dec_return(&kvm_mips_instance) == 0) {
6e95bfd2
JH		 177 kvm_debug("%s: last KVM instance, restoring TLB parameters\n",
178 __func__);
669e846e
SL		 179 on_each_cpu(kvm_mips_uninit_tlbs, NULL, 1);
180 }
181}
182
d116e812
DCZ		 183long kvm_arch_dev_ioctl(struct file *filp, unsigned int ioctl,
184 unsigned long arg)
669e846e 185{
ed829857 186 return -ENOIOCTLCMD;
669e846e
SL		 187}
188
5587027c
AK		 189int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
190 unsigned long npages)
669e846e
SL		 191{
192 return 0;
193}
194
195int kvm_arch_prepare_memory_region(struct kvm *kvm,
d116e812
DCZ		 196 struct kvm_memory_slot *memslot,
197 struct kvm_userspace_memory_region *mem,
198 enum kvm_mr_change change)
669e846e
SL		 199{
200 return 0;
201}
202
203void kvm_arch_commit_memory_region(struct kvm *kvm,
d116e812
DCZ		 204 struct kvm_userspace_memory_region *mem,
205 const struct kvm_memory_slot *old,
206 enum kvm_mr_change change)
669e846e
SL		 207{
208 unsigned long npages = 0;
d98403a5 209 int i;
669e846e
SL		 210
211 kvm_debug("%s: kvm: %p slot: %d, GPA: %llx, size: %llx, QVA: %llx\n",
212 __func__, kvm, mem->slot, mem->guest_phys_addr,
213 mem->memory_size, mem->userspace_addr);
214
215 /* Setup Guest PMAP table */
216 if (!kvm->arch.guest_pmap) {
217 if (mem->slot == 0)
218 npages = mem->memory_size >> PAGE_SHIFT;
219
220 if (npages) {
221 kvm->arch.guest_pmap_npages = npages;
222 kvm->arch.guest_pmap =
223 kzalloc(npages * sizeof(unsigned long), GFP_KERNEL);
224
225 if (!kvm->arch.guest_pmap) {
226 kvm_err("Failed to allocate guest PMAP");
d98403a5 227 return;
669e846e
SL		 228 }
229
6e95bfd2
JH		 230 kvm_debug("Allocated space for Guest PMAP Table (%ld pages) @ %p\n",
231 npages, kvm->arch.guest_pmap);
669e846e
SL		 232
233 /* Now setup the page table */
d116e812 234 for (i = 0; i < npages; i++)
669e846e 235 kvm->arch.guest_pmap[i] = KVM_INVALID_PAGE;
669e846e
SL		 236 }
237 }
669e846e
SL		 238}
239
669e846e
SL		 240struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
241{
669e846e
SL		 242 int err, size, offset;
243 void *gebase;
244 int i;
245
246 struct kvm_vcpu *vcpu = kzalloc(sizeof(struct kvm_vcpu), GFP_KERNEL);
247
248 if (!vcpu) {
249 err = -ENOMEM;
250 goto out;
251 }
252
253 err = kvm_vcpu_init(vcpu, kvm, id);
254
255 if (err)
256 goto out_free_cpu;
257
6e95bfd2 258 kvm_debug("kvm @ %p: create cpu %d at %p\n", kvm, id, vcpu);
669e846e 259
d116e812
DCZ		 260 /*
261 * Allocate space for host mode exception handlers that handle
669e846e
SL		 262 * guest mode exits
263 */
d116e812 264 if (cpu_has_veic || cpu_has_vint)
669e846e 265 size = 0x200 + VECTORSPACING * 64;
d116e812 266 else
7006e2df 267 size = 0x4000;
669e846e
SL		 268
269 /* Save Linux EBASE */
270 vcpu->arch.host_ebase = (void *)read_c0_ebase();
271
272 gebase = kzalloc(ALIGN(size, PAGE_SIZE), GFP_KERNEL);
273
274 if (!gebase) {
275 err = -ENOMEM;
276 goto out_free_cpu;
277 }
6e95bfd2
JH		 278 kvm_debug("Allocated %d bytes for KVM Exception Handlers @ %p\n",
279 ALIGN(size, PAGE_SIZE), gebase);
669e846e
SL		 280
281 /* Save new ebase */
282 vcpu->arch.guest_ebase = gebase;
283
284 /* Copy L1 Guest Exception handler to correct offset */
285
286 /* TLB Refill, EXL = 0 */
287 memcpy(gebase, mips32_exception,
288 mips32_exceptionEnd - mips32_exception);
289
290 /* General Exception Entry point */
291 memcpy(gebase + 0x180, mips32_exception,
292 mips32_exceptionEnd - mips32_exception);
293
294 /* For vectored interrupts poke the exception code @ all offsets 0-7 */
295 for (i = 0; i < 8; i++) {
296 kvm_debug("L1 Vectored handler @ %p\n",
297 gebase + 0x200 + (i * VECTORSPACING));
298 memcpy(gebase + 0x200 + (i * VECTORSPACING), mips32_exception,
299 mips32_exceptionEnd - mips32_exception);
300 }
301
302 /* General handler, relocate to unmapped space for sanity's sake */
303 offset = 0x2000;
6e95bfd2
JH		 304 kvm_debug("Installing KVM Exception handlers @ %p, %#x bytes\n",
305 gebase + offset,
306 mips32_GuestExceptionEnd - mips32_GuestException);
669e846e
SL		 307
308 memcpy(gebase + offset, mips32_GuestException,
309 mips32_GuestExceptionEnd - mips32_GuestException);
310
311 /* Invalidate the icache for these ranges */
facaaec1
JH		 312 local_flush_icache_range((unsigned long)gebase,
313 (unsigned long)gebase + ALIGN(size, PAGE_SIZE));
669e846e 314
d116e812
DCZ		 315 /*
316 * Allocate comm page for guest kernel, a TLB will be reserved for
317 * mapping GVA @ 0xFFFF8000 to this page
318 */
669e846e
SL		 319 vcpu->arch.kseg0_commpage = kzalloc(PAGE_SIZE << 1, GFP_KERNEL);
320
321 if (!vcpu->arch.kseg0_commpage) {
322 err = -ENOMEM;
323 goto out_free_gebase;
324 }
325
6e95bfd2 326 kvm_debug("Allocated COMM page @ %p\n", vcpu->arch.kseg0_commpage);
669e846e
SL		 327 kvm_mips_commpage_init(vcpu);
328
329 /* Init */
330 vcpu->arch.last_sched_cpu = -1;
331
332 /* Start off the timer */
e30492bb 333 kvm_mips_init_count(vcpu);
669e846e
SL		 334
335 return vcpu;
336
337out_free_gebase:
338 kfree(gebase);
339
340out_free_cpu:
341 kfree(vcpu);
342
343out:
344 return ERR_PTR(err);
345}
346
347void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
348{
349 hrtimer_cancel(&vcpu->arch.comparecount_timer);
350
351 kvm_vcpu_uninit(vcpu);
352
353 kvm_mips_dump_stats(vcpu);
354
c6c0a663
JH		 355 kfree(vcpu->arch.guest_ebase);
356 kfree(vcpu->arch.kseg0_commpage);
8c9eb041 357 kfree(vcpu);
669e846e
SL		 358}
359
360void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
361{
362 kvm_arch_vcpu_free(vcpu);
363}
364
d116e812
DCZ		 365int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
366 struct kvm_guest_debug *dbg)
669e846e 367{
ed829857 368 return -ENOIOCTLCMD;
669e846e
SL		 369}
370
371int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
372{
373 int r = 0;
374 sigset_t sigsaved;
375
376 if (vcpu->sigset_active)
377 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
378
379 if (vcpu->mmio_needed) {
380 if (!vcpu->mmio_is_write)
381 kvm_mips_complete_mmio_load(vcpu, run);
382 vcpu->mmio_needed = 0;
383 }
384
f798217d
JH		 385 lose_fpu(1);
386
044f0f03 387 local_irq_disable();
669e846e
SL		 388 /* Check if we have any exceptions/interrupts pending */
389 kvm_mips_deliver_interrupts(vcpu,
390 kvm_read_c0_guest_cause(vcpu->arch.cop0));
391
669e846e
SL		 392 kvm_guest_enter();
393
c4c6f2ca
JH		 394 /* Disable hardware page table walking while in guest */
395 htw_stop();
396
669e846e
SL		 397 r = __kvm_mips_vcpu_run(run, vcpu);
398
c4c6f2ca
JH		 399 /* Re-enable HTW before enabling interrupts */
400 htw_start();
401
669e846e
SL		 402 kvm_guest_exit();
403 local_irq_enable();
404
405 if (vcpu->sigset_active)
406 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
407
408 return r;
409}
410
d116e812
DCZ		 411int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
412 struct kvm_mips_interrupt *irq)
669e846e
SL		 413{
414 int intr = (int)irq->irq;
415 struct kvm_vcpu *dvcpu = NULL;
416
417 if (intr == 3 || intr == -3 || intr == 4 || intr == -4)
418 kvm_debug("%s: CPU: %d, INTR: %d\n", __func__, irq->cpu,
419 (int)intr);
420
421 if (irq->cpu == -1)
422 dvcpu = vcpu;
423 else
424 dvcpu = vcpu->kvm->vcpus[irq->cpu];
425
426 if (intr == 2 || intr == 3 || intr == 4) {
427 kvm_mips_callbacks->queue_io_int(dvcpu, irq);
428
429 } else if (intr == -2 || intr == -3 || intr == -4) {
430 kvm_mips_callbacks->dequeue_io_int(dvcpu, irq);
431 } else {
432 kvm_err("%s: invalid interrupt ioctl (%d:%d)\n", __func__,
433 irq->cpu, irq->irq);
434 return -EINVAL;
435 }
436
437 dvcpu->arch.wait = 0;
438
d116e812 439 if (waitqueue_active(&dvcpu->wq))
669e846e 440 wake_up_interruptible(&dvcpu->wq);
669e846e
SL		 441
442 return 0;
443}
444
d116e812
DCZ		 445int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
446 struct kvm_mp_state *mp_state)
669e846e 447{
ed829857 448 return -ENOIOCTLCMD;
669e846e
SL		 449}
450
d116e812
DCZ		 451int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
452 struct kvm_mp_state *mp_state)
669e846e 453{
ed829857 454 return -ENOIOCTLCMD;
669e846e
SL		 455}
456
4c73fb2b
DD		 457static u64 kvm_mips_get_one_regs[] = {
458 KVM_REG_MIPS_R0,
459 KVM_REG_MIPS_R1,
460 KVM_REG_MIPS_R2,
461 KVM_REG_MIPS_R3,
462 KVM_REG_MIPS_R4,
463 KVM_REG_MIPS_R5,
464 KVM_REG_MIPS_R6,
465 KVM_REG_MIPS_R7,
466 KVM_REG_MIPS_R8,
467 KVM_REG_MIPS_R9,
468 KVM_REG_MIPS_R10,
469 KVM_REG_MIPS_R11,
470 KVM_REG_MIPS_R12,
471 KVM_REG_MIPS_R13,
472 KVM_REG_MIPS_R14,
473 KVM_REG_MIPS_R15,
474 KVM_REG_MIPS_R16,
475 KVM_REG_MIPS_R17,
476 KVM_REG_MIPS_R18,
477 KVM_REG_MIPS_R19,
478 KVM_REG_MIPS_R20,
479 KVM_REG_MIPS_R21,
480 KVM_REG_MIPS_R22,
481 KVM_REG_MIPS_R23,
482 KVM_REG_MIPS_R24,
483 KVM_REG_MIPS_R25,
484 KVM_REG_MIPS_R26,
485 KVM_REG_MIPS_R27,
486 KVM_REG_MIPS_R28,
487 KVM_REG_MIPS_R29,
488 KVM_REG_MIPS_R30,
489 KVM_REG_MIPS_R31,
490
491 KVM_REG_MIPS_HI,
492 KVM_REG_MIPS_LO,
493 KVM_REG_MIPS_PC,
494
495 KVM_REG_MIPS_CP0_INDEX,
496 KVM_REG_MIPS_CP0_CONTEXT,
7767b7d2 497 KVM_REG_MIPS_CP0_USERLOCAL,
4c73fb2b
DD		 498 KVM_REG_MIPS_CP0_PAGEMASK,
499 KVM_REG_MIPS_CP0_WIRED,
16fd5c1d 500 KVM_REG_MIPS_CP0_HWRENA,
4c73fb2b 501 KVM_REG_MIPS_CP0_BADVADDR,
f8be02da 502 KVM_REG_MIPS_CP0_COUNT,
4c73fb2b 503 KVM_REG_MIPS_CP0_ENTRYHI,
f8be02da 504 KVM_REG_MIPS_CP0_COMPARE,
4c73fb2b
DD		 505 KVM_REG_MIPS_CP0_STATUS,
506 KVM_REG_MIPS_CP0_CAUSE,
fb6df0cd 507 KVM_REG_MIPS_CP0_EPC,
1068eaaf 508 KVM_REG_MIPS_CP0_PRID,
4c73fb2b
DD		 509 KVM_REG_MIPS_CP0_CONFIG,
510 KVM_REG_MIPS_CP0_CONFIG1,
511 KVM_REG_MIPS_CP0_CONFIG2,
512 KVM_REG_MIPS_CP0_CONFIG3,
c771607a
JH		 513 KVM_REG_MIPS_CP0_CONFIG4,
514 KVM_REG_MIPS_CP0_CONFIG5,
4c73fb2b 515 KVM_REG_MIPS_CP0_CONFIG7,
f8239342
JH		 516 KVM_REG_MIPS_CP0_ERROREPC,
517
518 KVM_REG_MIPS_COUNT_CTL,
519 KVM_REG_MIPS_COUNT_RESUME,
f74a8e22 520 KVM_REG_MIPS_COUNT_HZ,
4c73fb2b
DD		 521};
522
523static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,
524 const struct kvm_one_reg *reg)
525{
4c73fb2b 526 struct mips_coproc *cop0 = vcpu->arch.cop0;
f8be02da 527 int ret;
4c73fb2b
DD		 528 s64 v;
529
530 switch (reg->id) {
531 case KVM_REG_MIPS_R0 ... KVM_REG_MIPS_R31:
532 v = (long)vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0];
533 break;
534 case KVM_REG_MIPS_HI:
535 v = (long)vcpu->arch.hi;
536 break;
537 case KVM_REG_MIPS_LO:
538 v = (long)vcpu->arch.lo;
539 break;
540 case KVM_REG_MIPS_PC:
541 v = (long)vcpu->arch.pc;
542 break;
543
544 case KVM_REG_MIPS_CP0_INDEX:
545 v = (long)kvm_read_c0_guest_index(cop0);
546 break;
547 case KVM_REG_MIPS_CP0_CONTEXT:
548 v = (long)kvm_read_c0_guest_context(cop0);
549 break;
7767b7d2
JH		 550 case KVM_REG_MIPS_CP0_USERLOCAL:
551 v = (long)kvm_read_c0_guest_userlocal(cop0);
552 break;
4c73fb2b
DD		 553 case KVM_REG_MIPS_CP0_PAGEMASK:
554 v = (long)kvm_read_c0_guest_pagemask(cop0);
555 break;
556 case KVM_REG_MIPS_CP0_WIRED:
557 v = (long)kvm_read_c0_guest_wired(cop0);
558 break;
16fd5c1d
JH		 559 case KVM_REG_MIPS_CP0_HWRENA:
560 v = (long)kvm_read_c0_guest_hwrena(cop0);
561 break;
4c73fb2b
DD		 562 case KVM_REG_MIPS_CP0_BADVADDR:
563 v = (long)kvm_read_c0_guest_badvaddr(cop0);
564 break;
565 case KVM_REG_MIPS_CP0_ENTRYHI:
566 v = (long)kvm_read_c0_guest_entryhi(cop0);
567 break;
f8be02da
JH		 568 case KVM_REG_MIPS_CP0_COMPARE:
569 v = (long)kvm_read_c0_guest_compare(cop0);
570 break;
4c73fb2b
DD		 571 case KVM_REG_MIPS_CP0_STATUS:
572 v = (long)kvm_read_c0_guest_status(cop0);
573 break;
574 case KVM_REG_MIPS_CP0_CAUSE:
575 v = (long)kvm_read_c0_guest_cause(cop0);
576 break;
fb6df0cd
JH		 577 case KVM_REG_MIPS_CP0_EPC:
578 v = (long)kvm_read_c0_guest_epc(cop0);
579 break;
1068eaaf
JH		 580 case KVM_REG_MIPS_CP0_PRID:
581 v = (long)kvm_read_c0_guest_prid(cop0);
582 break;
4c73fb2b
DD		 583 case KVM_REG_MIPS_CP0_CONFIG:
584 v = (long)kvm_read_c0_guest_config(cop0);
585 break;
586 case KVM_REG_MIPS_CP0_CONFIG1:
587 v = (long)kvm_read_c0_guest_config1(cop0);
588 break;
589 case KVM_REG_MIPS_CP0_CONFIG2:
590 v = (long)kvm_read_c0_guest_config2(cop0);
591 break;
592 case KVM_REG_MIPS_CP0_CONFIG3:
593 v = (long)kvm_read_c0_guest_config3(cop0);
594 break;
c771607a
JH		 595 case KVM_REG_MIPS_CP0_CONFIG4:
596 v = (long)kvm_read_c0_guest_config4(cop0);
597 break;
598 case KVM_REG_MIPS_CP0_CONFIG5:
599 v = (long)kvm_read_c0_guest_config5(cop0);
600 break;
4c73fb2b
DD		 601 case KVM_REG_MIPS_CP0_CONFIG7:
602 v = (long)kvm_read_c0_guest_config7(cop0);
603 break;
e93d4c15
JH		 604 case KVM_REG_MIPS_CP0_ERROREPC:
605 v = (long)kvm_read_c0_guest_errorepc(cop0);
606 break;
f8be02da
JH		 607 /* registers to be handled specially */
608 case KVM_REG_MIPS_CP0_COUNT:
f8239342
JH		 609 case KVM_REG_MIPS_COUNT_CTL:
610 case KVM_REG_MIPS_COUNT_RESUME:
f74a8e22 611 case KVM_REG_MIPS_COUNT_HZ:
f8be02da
JH		 612 ret = kvm_mips_callbacks->get_one_reg(vcpu, reg, &v);
613 if (ret)
614 return ret;
615 break;
4c73fb2b
DD		 616 default:
617 return -EINVAL;
618 }
681865d4
DD		 619 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
620 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
d116e812 621
681865d4
DD		 622 return put_user(v, uaddr64);
623 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
624 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
625 u32 v32 = (u32)v;
d116e812 626
681865d4
DD		 627 return put_user(v32, uaddr32);
628 } else {
629 return -EINVAL;
630 }
4c73fb2b
DD		 631}
632
633static int kvm_mips_set_reg(struct kvm_vcpu *vcpu,
634 const struct kvm_one_reg *reg)
635{
4c73fb2b
DD		 636 struct mips_coproc *cop0 = vcpu->arch.cop0;
637 u64 v;
638
681865d4
DD		 639 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
640 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
641
642 if (get_user(v, uaddr64) != 0)
643 return -EFAULT;
644 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
645 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
646 s32 v32;
647
648 if (get_user(v32, uaddr32) != 0)
649 return -EFAULT;
650 v = (s64)v32;
651 } else {
652 return -EINVAL;
653 }
4c73fb2b
DD		 654
655 switch (reg->id) {
656 case KVM_REG_MIPS_R0:
657 /* Silently ignore requests to set $0 */
658 break;
659 case KVM_REG_MIPS_R1 ... KVM_REG_MIPS_R31:
660 vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0] = v;
661 break;
662 case KVM_REG_MIPS_HI:
663 vcpu->arch.hi = v;
664 break;
665 case KVM_REG_MIPS_LO:
666 vcpu->arch.lo = v;
667 break;
668 case KVM_REG_MIPS_PC:
669 vcpu->arch.pc = v;
670 break;
671
672 case KVM_REG_MIPS_CP0_INDEX:
673 kvm_write_c0_guest_index(cop0, v);
674 break;
675 case KVM_REG_MIPS_CP0_CONTEXT:
676 kvm_write_c0_guest_context(cop0, v);
677 break;
7767b7d2
JH		 678 case KVM_REG_MIPS_CP0_USERLOCAL:
679 kvm_write_c0_guest_userlocal(cop0, v);
680 break;
4c73fb2b
DD		 681 case KVM_REG_MIPS_CP0_PAGEMASK:
682 kvm_write_c0_guest_pagemask(cop0, v);
683 break;
684 case KVM_REG_MIPS_CP0_WIRED:
685 kvm_write_c0_guest_wired(cop0, v);
686 break;
16fd5c1d
JH		 687 case KVM_REG_MIPS_CP0_HWRENA:
688 kvm_write_c0_guest_hwrena(cop0, v);
689 break;
4c73fb2b
DD		 690 case KVM_REG_MIPS_CP0_BADVADDR:
691 kvm_write_c0_guest_badvaddr(cop0, v);
692 break;
693 case KVM_REG_MIPS_CP0_ENTRYHI:
694 kvm_write_c0_guest_entryhi(cop0, v);
695 break;
696 case KVM_REG_MIPS_CP0_STATUS:
697 kvm_write_c0_guest_status(cop0, v);
698 break;
fb6df0cd
JH		 699 case KVM_REG_MIPS_CP0_EPC:
700 kvm_write_c0_guest_epc(cop0, v);
701 break;
1068eaaf
JH		 702 case KVM_REG_MIPS_CP0_PRID:
703 kvm_write_c0_guest_prid(cop0, v);
704 break;
4c73fb2b
DD		 705 case KVM_REG_MIPS_CP0_ERROREPC:
706 kvm_write_c0_guest_errorepc(cop0, v);
707 break;
f8be02da
JH		 708 /* registers to be handled specially */
709 case KVM_REG_MIPS_CP0_COUNT:
710 case KVM_REG_MIPS_CP0_COMPARE:
e30492bb 711 case KVM_REG_MIPS_CP0_CAUSE:
c771607a
JH		 712 case KVM_REG_MIPS_CP0_CONFIG:
713 case KVM_REG_MIPS_CP0_CONFIG1:
714 case KVM_REG_MIPS_CP0_CONFIG2:
715 case KVM_REG_MIPS_CP0_CONFIG3:
716 case KVM_REG_MIPS_CP0_CONFIG4:
717 case KVM_REG_MIPS_CP0_CONFIG5:
f8239342
JH		 718 case KVM_REG_MIPS_COUNT_CTL:
719 case KVM_REG_MIPS_COUNT_RESUME:
f74a8e22 720 case KVM_REG_MIPS_COUNT_HZ:
f8be02da 721 return kvm_mips_callbacks->set_one_reg(vcpu, reg, v);
4c73fb2b
DD		 722 default:
723 return -EINVAL;
724 }
725 return 0;
726}
727
d116e812
DCZ		 728long kvm_arch_vcpu_ioctl(struct file *filp, unsigned int ioctl,
729 unsigned long arg)
669e846e
SL		 730{
731 struct kvm_vcpu *vcpu = filp->private_data;
732 void __user *argp = (void __user *)arg;
733 long r;
669e846e
SL		 734
735 switch (ioctl) {
4c73fb2b
DD		 736 case KVM_SET_ONE_REG:
737 case KVM_GET_ONE_REG: {
738 struct kvm_one_reg reg;
d116e812 739
4c73fb2b
DD		 740 if (copy_from_user(&reg, argp, sizeof(reg)))
741 return -EFAULT;
742 if (ioctl == KVM_SET_ONE_REG)
743 return kvm_mips_set_reg(vcpu, &reg);
744 else
745 return kvm_mips_get_reg(vcpu, &reg);
746 }
747 case KVM_GET_REG_LIST: {
748 struct kvm_reg_list __user *user_list = argp;
749 u64 __user *reg_dest;
750 struct kvm_reg_list reg_list;
751 unsigned n;
752
753 if (copy_from_user(&reg_list, user_list, sizeof(reg_list)))
754 return -EFAULT;
755 n = reg_list.n;
756 reg_list.n = ARRAY_SIZE(kvm_mips_get_one_regs);
757 if (copy_to_user(user_list, &reg_list, sizeof(reg_list)))
758 return -EFAULT;
759 if (n < reg_list.n)
760 return -E2BIG;
761 reg_dest = user_list->reg;
762 if (copy_to_user(reg_dest, kvm_mips_get_one_regs,
763 sizeof(kvm_mips_get_one_regs)))
764 return -EFAULT;
765 return 0;
766 }
669e846e
SL		 767 case KVM_NMI:
768 /* Treat the NMI as a CPU reset */
769 r = kvm_mips_reset_vcpu(vcpu);
770 break;
771 case KVM_INTERRUPT:
772 {
773 struct kvm_mips_interrupt irq;
d116e812 774
669e846e
SL		 775 r = -EFAULT;
776 if (copy_from_user(&irq, argp, sizeof(irq)))
777 goto out;
778
669e846e
SL		 779 kvm_debug("[%d] %s: irq: %d\n", vcpu->vcpu_id, __func__,
780 irq.irq);
781
782 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
783 break;
784 }
785 default:
4c73fb2b 786 r = -ENOIOCTLCMD;
669e846e
SL		 787 }
788
789out:
790 return r;
791}
792
d116e812 793/* Get (and clear) the dirty memory log for a memory slot. */
669e846e
SL		 794int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
795{
796 struct kvm_memory_slot *memslot;
797 unsigned long ga, ga_end;
798 int is_dirty = 0;
799 int r;
800 unsigned long n;
801
802 mutex_lock(&kvm->slots_lock);
803
804 r = kvm_get_dirty_log(kvm, log, &is_dirty);
805 if (r)
806 goto out;
807
808 /* If nothing is dirty, don't bother messing with page tables. */
809 if (is_dirty) {
810 memslot = &kvm->memslots->memslots[log->slot];
811
812 ga = memslot->base_gfn << PAGE_SHIFT;
813 ga_end = ga + (memslot->npages << PAGE_SHIFT);
814
6ad78a5c
DCZ		 815 kvm_info("%s: dirty, ga: %#lx, ga_end %#lx\n", __func__, ga,
816 ga_end);
669e846e
SL		 817
818 n = kvm_dirty_bitmap_bytes(memslot);
819 memset(memslot->dirty_bitmap, 0, n);
820 }
821
822 r = 0;
823out:
824 mutex_unlock(&kvm->slots_lock);
825 return r;
826
827}
828
829long kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
830{
831 long r;
832
833 switch (ioctl) {
834 default:
ed829857 835 r = -ENOIOCTLCMD;
669e846e
SL		 836 }
837
838 return r;
839}
840
841int kvm_arch_init(void *opaque)
842{
669e846e
SL		 843 if (kvm_mips_callbacks) {
844 kvm_err("kvm: module already exists\n");
845 return -EEXIST;
846 }
847
d98403a5 848 return kvm_mips_emulation_init(&kvm_mips_callbacks);
669e846e
SL		 849}
850
851void kvm_arch_exit(void)
852{
853 kvm_mips_callbacks = NULL;
854}
855
d116e812
DCZ		 856int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
857 struct kvm_sregs *sregs)
669e846e 858{
ed829857 859 return -ENOIOCTLCMD;
669e846e
SL		 860}
861
d116e812
DCZ		 862int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
863 struct kvm_sregs *sregs)
669e846e 864{
ed829857 865 return -ENOIOCTLCMD;
669e846e
SL		 866}
867
31928aa5 868void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
669e846e 869{
669e846e
SL		 870}
871
872int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
873{
ed829857 874 return -ENOIOCTLCMD;
669e846e
SL		 875}
876
877int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
878{
ed829857 879 return -ENOIOCTLCMD;
669e846e
SL		 880}
881
882int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
883{
884 return VM_FAULT_SIGBUS;
885}
886
784aa3d7 887int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
669e846e
SL		 888{
889 int r;
890
891 switch (ext) {
4c73fb2b
DD		 892 case KVM_CAP_ONE_REG:
893 r = 1;
894 break;
669e846e
SL		 895 case KVM_CAP_COALESCED_MMIO:
896 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
897 break;
898 default:
899 r = 0;
900 break;
901 }
902 return r;
669e846e
SL		 903}
904
905int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
906{
907 return kvm_mips_pending_timer(vcpu);
908}
909
910int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu)
911{
912 int i;
913 struct mips_coproc *cop0;
914
915 if (!vcpu)
916 return -1;
917
6ad78a5c
DCZ		 918 kvm_debug("VCPU Register Dump:\n");
919 kvm_debug("\tpc = 0x%08lx\n", vcpu->arch.pc);
920 kvm_debug("\texceptions: %08lx\n", vcpu->arch.pending_exceptions);
669e846e
SL		 921
922 for (i = 0; i < 32; i += 4) {
6ad78a5c 923 kvm_debug("\tgpr%02d: %08lx %08lx %08lx %08lx\n", i,
669e846e
SL		 924 vcpu->arch.gprs[i],
925 vcpu->arch.gprs[i + 1],
926 vcpu->arch.gprs[i + 2], vcpu->arch.gprs[i + 3]);
927 }
6ad78a5c
DCZ		 928 kvm_debug("\thi: 0x%08lx\n", vcpu->arch.hi);
929 kvm_debug("\tlo: 0x%08lx\n", vcpu->arch.lo);
669e846e
SL		 930
931 cop0 = vcpu->arch.cop0;
6ad78a5c
DCZ		 932 kvm_debug("\tStatus: 0x%08lx, Cause: 0x%08lx\n",
933 kvm_read_c0_guest_status(cop0),
934 kvm_read_c0_guest_cause(cop0));
669e846e 935
6ad78a5c 936 kvm_debug("\tEPC: 0x%08lx\n", kvm_read_c0_guest_epc(cop0));
669e846e
SL		 937
938 return 0;
939}
940
941int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
942{
943 int i;
944
8d17dd04 945 for (i = 1; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
bf32ebf6 946 vcpu->arch.gprs[i] = regs->gpr[i];
8d17dd04 947 vcpu->arch.gprs[0] = 0; /* zero is special, and cannot be set. */
669e846e
SL		 948 vcpu->arch.hi = regs->hi;
949 vcpu->arch.lo = regs->lo;
950 vcpu->arch.pc = regs->pc;
951
4c73fb2b 952 return 0;
669e846e
SL		 953}
954
955int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
956{
957 int i;
958
8d17dd04 959 for (i = 0; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
bf32ebf6 960 regs->gpr[i] = vcpu->arch.gprs[i];
669e846e
SL		 961
962 regs->hi = vcpu->arch.hi;
963 regs->lo = vcpu->arch.lo;
964 regs->pc = vcpu->arch.pc;
965
4c73fb2b 966 return 0;
669e846e
SL		 967}
968
0fae34f4 969static void kvm_mips_comparecount_func(unsigned long data)
669e846e
SL		 970{
971 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
972
973 kvm_mips_callbacks->queue_timer_int(vcpu);
974
975 vcpu->arch.wait = 0;
d116e812 976 if (waitqueue_active(&vcpu->wq))
669e846e 977 wake_up_interruptible(&vcpu->wq);
669e846e
SL		 978}
979
d116e812 980/* low level hrtimer wake routine */
0fae34f4 981static enum hrtimer_restart kvm_mips_comparecount_wakeup(struct hrtimer *timer)
669e846e
SL		 982{
983 struct kvm_vcpu *vcpu;
984
985 vcpu = container_of(timer, struct kvm_vcpu, arch.comparecount_timer);
986 kvm_mips_comparecount_func((unsigned long) vcpu);
e30492bb 987 return kvm_mips_count_timeout(vcpu);
669e846e
SL		 988}
989
990int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
991{
992 kvm_mips_callbacks->vcpu_init(vcpu);
993 hrtimer_init(&vcpu->arch.comparecount_timer, CLOCK_MONOTONIC,
994 HRTIMER_MODE_REL);
995 vcpu->arch.comparecount_timer.function = kvm_mips_comparecount_wakeup;
669e846e
SL		 996 return 0;
997}
998
d116e812
DCZ		 999int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1000 struct kvm_translation *tr)
669e846e
SL		 1001{
1002 return 0;
1003}
1004
1005/* Initial guest state */
1006int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1007{
1008 return kvm_mips_callbacks->vcpu_setup(vcpu);
1009}
1010
d116e812 1011static void kvm_mips_set_c0_status(void)
669e846e
SL		 1012{
1013 uint32_t status = read_c0_status();
1014
669e846e
SL		 1015 if (cpu_has_dsp)
1016 status |= (ST0_MX);
1017
1018 write_c0_status(status);
1019 ehb();
1020}
1021
1022/*
1023 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
1024 */
1025int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
1026{
1027 uint32_t cause = vcpu->arch.host_cp0_cause;
1028 uint32_t exccode = (cause >> CAUSEB_EXCCODE) & 0x1f;
1029 uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
1030 unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
1031 enum emulation_result er = EMULATE_DONE;
1032 int ret = RESUME_GUEST;
1033
c4c6f2ca
JH		 1034 /* re-enable HTW before enabling interrupts */
1035 htw_start();
1036
669e846e
SL		 1037 /* Set a default exit reason */
1038 run->exit_reason = KVM_EXIT_UNKNOWN;
1039 run->ready_for_interrupt_injection = 1;
1040
d116e812
DCZ		 1041 /*
1042 * Set the appropriate status bits based on host CPU features,
1043 * before we hit the scheduler
1044 */
669e846e
SL		 1045 kvm_mips_set_c0_status();
1046
1047 local_irq_enable();
1048
1049 kvm_debug("kvm_mips_handle_exit: cause: %#x, PC: %p, kvm_run: %p, kvm_vcpu: %p\n",
1050 cause, opc, run, vcpu);
1051
d116e812
DCZ		 1052 /*
1053 * Do a privilege check, if in UM most of these exit conditions end up
669e846e
SL		 1054 * causing an exception to be delivered to the Guest Kernel
1055 */
1056 er = kvm_mips_check_privilege(cause, opc, run, vcpu);
1057 if (er == EMULATE_PRIV_FAIL) {
1058 goto skip_emul;
1059 } else if (er == EMULATE_FAIL) {
1060 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1061 ret = RESUME_HOST;
1062 goto skip_emul;
1063 }
1064
1065 switch (exccode) {
1066 case T_INT:
1067 kvm_debug("[%d]T_INT @ %p\n", vcpu->vcpu_id, opc);
1068
1069 ++vcpu->stat.int_exits;
1070 trace_kvm_exit(vcpu, INT_EXITS);
1071
d116e812 1072 if (need_resched())
669e846e 1073 cond_resched();
669e846e
SL		 1074
1075 ret = RESUME_GUEST;
1076 break;
1077
1078 case T_COP_UNUSABLE:
1079 kvm_debug("T_COP_UNUSABLE: @ PC: %p\n", opc);
1080
1081 ++vcpu->stat.cop_unusable_exits;
1082 trace_kvm_exit(vcpu, COP_UNUSABLE_EXITS);
1083 ret = kvm_mips_callbacks->handle_cop_unusable(vcpu);
1084 /* XXXKYMA: Might need to return to user space */
d116e812 1085 if (run->exit_reason == KVM_EXIT_IRQ_WINDOW_OPEN)
669e846e 1086 ret = RESUME_HOST;
669e846e
SL		 1087 break;
1088
1089 case T_TLB_MOD:
1090 ++vcpu->stat.tlbmod_exits;
1091 trace_kvm_exit(vcpu, TLBMOD_EXITS);
1092 ret = kvm_mips_callbacks->handle_tlb_mod(vcpu);
1093 break;
1094
1095 case T_TLB_ST_MISS:
d116e812
DCZ		 1096 kvm_debug("TLB ST fault: cause %#x, status %#lx, PC: %p, BadVaddr: %#lx\n",
1097 cause, kvm_read_c0_guest_status(vcpu->arch.cop0), opc,
1098 badvaddr);
669e846e
SL		 1099
1100 ++vcpu->stat.tlbmiss_st_exits;
1101 trace_kvm_exit(vcpu, TLBMISS_ST_EXITS);
1102 ret = kvm_mips_callbacks->handle_tlb_st_miss(vcpu);
1103 break;
1104
1105 case T_TLB_LD_MISS:
1106 kvm_debug("TLB LD fault: cause %#x, PC: %p, BadVaddr: %#lx\n",
1107 cause, opc, badvaddr);
1108
1109 ++vcpu->stat.tlbmiss_ld_exits;
1110 trace_kvm_exit(vcpu, TLBMISS_LD_EXITS);
1111 ret = kvm_mips_callbacks->handle_tlb_ld_miss(vcpu);
1112 break;
1113
1114 case T_ADDR_ERR_ST:
1115 ++vcpu->stat.addrerr_st_exits;
1116 trace_kvm_exit(vcpu, ADDRERR_ST_EXITS);
1117 ret = kvm_mips_callbacks->handle_addr_err_st(vcpu);
1118 break;
1119
1120 case T_ADDR_ERR_LD:
1121 ++vcpu->stat.addrerr_ld_exits;
1122 trace_kvm_exit(vcpu, ADDRERR_LD_EXITS);
1123 ret = kvm_mips_callbacks->handle_addr_err_ld(vcpu);
1124 break;
1125
1126 case T_SYSCALL:
1127 ++vcpu->stat.syscall_exits;
1128 trace_kvm_exit(vcpu, SYSCALL_EXITS);
1129 ret = kvm_mips_callbacks->handle_syscall(vcpu);
1130 break;
1131
1132 case T_RES_INST:
1133 ++vcpu->stat.resvd_inst_exits;
1134 trace_kvm_exit(vcpu, RESVD_INST_EXITS);
1135 ret = kvm_mips_callbacks->handle_res_inst(vcpu);
1136 break;
1137
1138 case T_BREAK:
1139 ++vcpu->stat.break_inst_exits;
1140 trace_kvm_exit(vcpu, BREAK_INST_EXITS);
1141 ret = kvm_mips_callbacks->handle_break(vcpu);
1142 break;
1143
0a560427
JH		 1144 case T_TRAP:
1145 ++vcpu->stat.trap_inst_exits;
1146 trace_kvm_exit(vcpu, TRAP_INST_EXITS);
1147 ret = kvm_mips_callbacks->handle_trap(vcpu);
1148 break;
1149
98119ad5
JH		 1150 case T_MSADIS:
1151 ret = kvm_mips_callbacks->handle_msa_disabled(vcpu);
1152 break;
1153
669e846e 1154 default:
d116e812
DCZ		 1155 kvm_err("Exception Code: %d, not yet handled, @ PC: %p, inst: 0x%08x BadVaddr: %#lx Status: %#lx\n",
1156 exccode, opc, kvm_get_inst(opc, vcpu), badvaddr,
1157 kvm_read_c0_guest_status(vcpu->arch.cop0));
669e846e
SL		 1158 kvm_arch_vcpu_dump_regs(vcpu);
1159 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1160 ret = RESUME_HOST;
1161 break;
1162
1163 }
1164
1165skip_emul:
1166 local_irq_disable();
1167
1168 if (er == EMULATE_DONE && !(ret & RESUME_HOST))
1169 kvm_mips_deliver_interrupts(vcpu, cause);
1170
1171 if (!(ret & RESUME_HOST)) {
d116e812 1172 /* Only check for signals if not already exiting to userspace */
669e846e
SL		 1173 if (signal_pending(current)) {
1174 run->exit_reason = KVM_EXIT_INTR;
1175 ret = (-EINTR << 2) | RESUME_HOST;
1176 ++vcpu->stat.signal_exits;
1177 trace_kvm_exit(vcpu, SIGNAL_EXITS);
1178 }
1179 }
1180
c4c6f2ca
JH		 1181 /* Disable HTW before returning to guest or host */
1182 htw_stop();
1183
669e846e
SL		 1184 return ret;
1185}
1186
1187int __init kvm_mips_init(void)
1188{
1189 int ret;
1190
1191 ret = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1192
1193 if (ret)
1194 return ret;
1195
d116e812
DCZ		 1196 /*
1197 * On MIPS, kernel modules are executed from "mapped space", which
1198 * requires TLBs. The TLB handling code is statically linked with
d7d5b05f 1199 * the rest of the kernel (tlb.c) to avoid the possibility of
d116e812
DCZ		 1200 * double faulting. The issue is that the TLB code references
1201 * routines that are part of the the KVM module, which are only
1202 * available once the module is loaded.
669e846e
SL		 1203 */
1204 kvm_mips_gfn_to_pfn = gfn_to_pfn;
1205 kvm_mips_release_pfn_clean = kvm_release_pfn_clean;
1206 kvm_mips_is_error_pfn = is_error_pfn;
1207
669e846e
SL		 1208 return 0;
1209}
1210
1211void __exit kvm_mips_exit(void)
1212{
1213 kvm_exit();
1214
1215 kvm_mips_gfn_to_pfn = NULL;
1216 kvm_mips_release_pfn_clean = NULL;
1217 kvm_mips_is_error_pfn = NULL;
669e846e
SL		 1218}
1219
1220module_init(kvm_mips_init);
1221module_exit(kvm_mips_exit);
1222
1223EXPORT_TRACEPOINT_SYMBOL(kvm_exit);
Linux 6.x block layer and io_uring tree(s)