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MIPS: KVM: Add FP exception handling
[linux-2.6-block.git] / arch / mips / kvm / mips.c
CommitLineData
669e846e
SL		 1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * KVM/MIPS: MIPS specific KVM APIs
7 *
8 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
9 * Authors: Sanjay Lal <sanjayl@kymasys.com>
d116e812 10 */
669e846e
SL		 11
12#include <linux/errno.h>
13#include <linux/err.h>
98e91b84 14#include <linux/kdebug.h>
669e846e
SL		 15#include <linux/module.h>
16#include <linux/vmalloc.h>
17#include <linux/fs.h>
18#include <linux/bootmem.h>
f798217d 19#include <asm/fpu.h>
669e846e
SL		 20#include <asm/page.h>
21#include <asm/cacheflush.h>
22#include <asm/mmu_context.h>
c4c6f2ca 23#include <asm/pgtable.h>
669e846e
SL		 24
25#include <linux/kvm_host.h>
26
d7d5b05f
DCZ		 27#include "interrupt.h"
28#include "commpage.h"
669e846e
SL		 29
30#define CREATE_TRACE_POINTS
31#include "trace.h"
32
33#ifndef VECTORSPACING
34#define VECTORSPACING 0x100 /* for EI/VI mode */
35#endif
36
d116e812 37#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x)
669e846e 38struct kvm_stats_debugfs_item debugfs_entries[] = {
d116e812
DCZ		 39 { "wait", VCPU_STAT(wait_exits), KVM_STAT_VCPU },
40 { "cache", VCPU_STAT(cache_exits), KVM_STAT_VCPU },
41 { "signal", VCPU_STAT(signal_exits), KVM_STAT_VCPU },
42 { "interrupt", VCPU_STAT(int_exits), KVM_STAT_VCPU },
43 { "cop_unsuable", VCPU_STAT(cop_unusable_exits), KVM_STAT_VCPU },
44 { "tlbmod", VCPU_STAT(tlbmod_exits), KVM_STAT_VCPU },
45 { "tlbmiss_ld", VCPU_STAT(tlbmiss_ld_exits), KVM_STAT_VCPU },
46 { "tlbmiss_st", VCPU_STAT(tlbmiss_st_exits), KVM_STAT_VCPU },
47 { "addrerr_st", VCPU_STAT(addrerr_st_exits), KVM_STAT_VCPU },
48 { "addrerr_ld", VCPU_STAT(addrerr_ld_exits), KVM_STAT_VCPU },
49 { "syscall", VCPU_STAT(syscall_exits), KVM_STAT_VCPU },
50 { "resvd_inst", VCPU_STAT(resvd_inst_exits), KVM_STAT_VCPU },
51 { "break_inst", VCPU_STAT(break_inst_exits), KVM_STAT_VCPU },
0a560427 52 { "trap_inst", VCPU_STAT(trap_inst_exits), KVM_STAT_VCPU },
1c0cd66a 53 { "fpe", VCPU_STAT(fpe_exits), KVM_STAT_VCPU },
d116e812 54 { "flush_dcache", VCPU_STAT(flush_dcache_exits), KVM_STAT_VCPU },
f7819512 55 { "halt_successful_poll", VCPU_STAT(halt_successful_poll), KVM_STAT_VCPU },
d116e812 56 { "halt_wakeup", VCPU_STAT(halt_wakeup), KVM_STAT_VCPU },
669e846e
SL		 57 {NULL}
58};
59
60static int kvm_mips_reset_vcpu(struct kvm_vcpu *vcpu)
61{
62 int i;
d116e812 63
669e846e
SL		 64 for_each_possible_cpu(i) {
65 vcpu->arch.guest_kernel_asid[i] = 0;
66 vcpu->arch.guest_user_asid[i] = 0;
67 }
d116e812 68
669e846e
SL		 69 return 0;
70}
71
d116e812
DCZ		 72/*
73 * XXXKYMA: We are simulatoring a processor that has the WII bit set in
74 * Config7, so we are "runnable" if interrupts are pending
669e846e
SL		 75 */
76int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
77{
78 return !!(vcpu->arch.pending_exceptions);
79}
80
81int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
82{
83 return 1;
84}
85
13a34e06 86int kvm_arch_hardware_enable(void)
669e846e
SL		 87{
88 return 0;
89}
90
669e846e
SL		 91int kvm_arch_hardware_setup(void)
92{
93 return 0;
94}
95
669e846e
SL		 96void kvm_arch_check_processor_compat(void *rtn)
97{
d98403a5 98 *(int *)rtn = 0;
669e846e
SL		 99}
100
101static void kvm_mips_init_tlbs(struct kvm *kvm)
102{
103 unsigned long wired;
104
d116e812
DCZ		 105 /*
106 * Add a wired entry to the TLB, it is used to map the commpage to
107 * the Guest kernel
108 */
669e846e
SL		 109 wired = read_c0_wired();
110 write_c0_wired(wired + 1);
111 mtc0_tlbw_hazard();
112 kvm->arch.commpage_tlb = wired;
113
114 kvm_debug("[%d] commpage TLB: %d\n", smp_processor_id(),
115 kvm->arch.commpage_tlb);
116}
117
118static void kvm_mips_init_vm_percpu(void *arg)
119{
120 struct kvm *kvm = (struct kvm *)arg;
121
122 kvm_mips_init_tlbs(kvm);
123 kvm_mips_callbacks->vm_init(kvm);
124
125}
126
127int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
128{
129 if (atomic_inc_return(&kvm_mips_instance) == 1) {
6e95bfd2
JH		 130 kvm_debug("%s: 1st KVM instance, setup host TLB parameters\n",
131 __func__);
669e846e
SL		 132 on_each_cpu(kvm_mips_init_vm_percpu, kvm, 1);
133 }
134
669e846e
SL		 135 return 0;
136}
137
138void kvm_mips_free_vcpus(struct kvm *kvm)
139{
140 unsigned int i;
141 struct kvm_vcpu *vcpu;
142
143 /* Put the pages we reserved for the guest pmap */
144 for (i = 0; i < kvm->arch.guest_pmap_npages; i++) {
145 if (kvm->arch.guest_pmap[i] != KVM_INVALID_PAGE)
146 kvm_mips_release_pfn_clean(kvm->arch.guest_pmap[i]);
147 }
c6c0a663 148 kfree(kvm->arch.guest_pmap);
669e846e
SL		 149
150 kvm_for_each_vcpu(i, vcpu, kvm) {
151 kvm_arch_vcpu_free(vcpu);
152 }
153
154 mutex_lock(&kvm->lock);
155
156 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
157 kvm->vcpus[i] = NULL;
158
159 atomic_set(&kvm->online_vcpus, 0);
160
161 mutex_unlock(&kvm->lock);
162}
163
669e846e
SL		 164static void kvm_mips_uninit_tlbs(void *arg)
165{
166 /* Restore wired count */
167 write_c0_wired(0);
168 mtc0_tlbw_hazard();
169 /* Clear out all the TLBs */
170 kvm_local_flush_tlb_all();
171}
172
173void kvm_arch_destroy_vm(struct kvm *kvm)
174{
175 kvm_mips_free_vcpus(kvm);
176
177 /* If this is the last instance, restore wired count */
178 if (atomic_dec_return(&kvm_mips_instance) == 0) {
6e95bfd2
JH		 179 kvm_debug("%s: last KVM instance, restoring TLB parameters\n",
180 __func__);
669e846e
SL		 181 on_each_cpu(kvm_mips_uninit_tlbs, NULL, 1);
182 }
183}
184
d116e812
DCZ		 185long kvm_arch_dev_ioctl(struct file *filp, unsigned int ioctl,
186 unsigned long arg)
669e846e 187{
ed829857 188 return -ENOIOCTLCMD;
669e846e
SL		 189}
190
5587027c
AK		 191int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
192 unsigned long npages)
669e846e
SL		 193{
194 return 0;
195}
196
197int kvm_arch_prepare_memory_region(struct kvm *kvm,
d116e812
DCZ		 198 struct kvm_memory_slot *memslot,
199 struct kvm_userspace_memory_region *mem,
200 enum kvm_mr_change change)
669e846e
SL		 201{
202 return 0;
203}
204
205void kvm_arch_commit_memory_region(struct kvm *kvm,
d116e812
DCZ		 206 struct kvm_userspace_memory_region *mem,
207 const struct kvm_memory_slot *old,
208 enum kvm_mr_change change)
669e846e
SL		 209{
210 unsigned long npages = 0;
d98403a5 211 int i;
669e846e
SL		 212
213 kvm_debug("%s: kvm: %p slot: %d, GPA: %llx, size: %llx, QVA: %llx\n",
214 __func__, kvm, mem->slot, mem->guest_phys_addr,
215 mem->memory_size, mem->userspace_addr);
216
217 /* Setup Guest PMAP table */
218 if (!kvm->arch.guest_pmap) {
219 if (mem->slot == 0)
220 npages = mem->memory_size >> PAGE_SHIFT;
221
222 if (npages) {
223 kvm->arch.guest_pmap_npages = npages;
224 kvm->arch.guest_pmap =
225 kzalloc(npages * sizeof(unsigned long), GFP_KERNEL);
226
227 if (!kvm->arch.guest_pmap) {
228 kvm_err("Failed to allocate guest PMAP");
d98403a5 229 return;
669e846e
SL		 230 }
231
6e95bfd2
JH		 232 kvm_debug("Allocated space for Guest PMAP Table (%ld pages) @ %p\n",
233 npages, kvm->arch.guest_pmap);
669e846e
SL		 234
235 /* Now setup the page table */
d116e812 236 for (i = 0; i < npages; i++)
669e846e 237 kvm->arch.guest_pmap[i] = KVM_INVALID_PAGE;
669e846e
SL		 238 }
239 }
669e846e
SL		 240}
241
669e846e
SL		 242struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
243{
669e846e
SL		 244 int err, size, offset;
245 void *gebase;
246 int i;
247
248 struct kvm_vcpu *vcpu = kzalloc(sizeof(struct kvm_vcpu), GFP_KERNEL);
249
250 if (!vcpu) {
251 err = -ENOMEM;
252 goto out;
253 }
254
255 err = kvm_vcpu_init(vcpu, kvm, id);
256
257 if (err)
258 goto out_free_cpu;
259
6e95bfd2 260 kvm_debug("kvm @ %p: create cpu %d at %p\n", kvm, id, vcpu);
669e846e 261
d116e812
DCZ		 262 /*
263 * Allocate space for host mode exception handlers that handle
669e846e
SL		 264 * guest mode exits
265 */
d116e812 266 if (cpu_has_veic || cpu_has_vint)
669e846e 267 size = 0x200 + VECTORSPACING * 64;
d116e812 268 else
7006e2df 269 size = 0x4000;
669e846e
SL		 270
271 /* Save Linux EBASE */
272 vcpu->arch.host_ebase = (void *)read_c0_ebase();
273
274 gebase = kzalloc(ALIGN(size, PAGE_SIZE), GFP_KERNEL);
275
276 if (!gebase) {
277 err = -ENOMEM;
278 goto out_free_cpu;
279 }
6e95bfd2
JH		 280 kvm_debug("Allocated %d bytes for KVM Exception Handlers @ %p\n",
281 ALIGN(size, PAGE_SIZE), gebase);
669e846e
SL		 282
283 /* Save new ebase */
284 vcpu->arch.guest_ebase = gebase;
285
286 /* Copy L1 Guest Exception handler to correct offset */
287
288 /* TLB Refill, EXL = 0 */
289 memcpy(gebase, mips32_exception,
290 mips32_exceptionEnd - mips32_exception);
291
292 /* General Exception Entry point */
293 memcpy(gebase + 0x180, mips32_exception,
294 mips32_exceptionEnd - mips32_exception);
295
296 /* For vectored interrupts poke the exception code @ all offsets 0-7 */
297 for (i = 0; i < 8; i++) {
298 kvm_debug("L1 Vectored handler @ %p\n",
299 gebase + 0x200 + (i * VECTORSPACING));
300 memcpy(gebase + 0x200 + (i * VECTORSPACING), mips32_exception,
301 mips32_exceptionEnd - mips32_exception);
302 }
303
304 /* General handler, relocate to unmapped space for sanity's sake */
305 offset = 0x2000;
6e95bfd2
JH		 306 kvm_debug("Installing KVM Exception handlers @ %p, %#x bytes\n",
307 gebase + offset,
308 mips32_GuestExceptionEnd - mips32_GuestException);
669e846e
SL		 309
310 memcpy(gebase + offset, mips32_GuestException,
311 mips32_GuestExceptionEnd - mips32_GuestException);
312
313 /* Invalidate the icache for these ranges */
facaaec1
JH		 314 local_flush_icache_range((unsigned long)gebase,
315 (unsigned long)gebase + ALIGN(size, PAGE_SIZE));
669e846e 316
d116e812
DCZ		 317 /*
318 * Allocate comm page for guest kernel, a TLB will be reserved for
319 * mapping GVA @ 0xFFFF8000 to this page
320 */
669e846e
SL		 321 vcpu->arch.kseg0_commpage = kzalloc(PAGE_SIZE << 1, GFP_KERNEL);
322
323 if (!vcpu->arch.kseg0_commpage) {
324 err = -ENOMEM;
325 goto out_free_gebase;
326 }
327
6e95bfd2 328 kvm_debug("Allocated COMM page @ %p\n", vcpu->arch.kseg0_commpage);
669e846e
SL		 329 kvm_mips_commpage_init(vcpu);
330
331 /* Init */
332 vcpu->arch.last_sched_cpu = -1;
333
334 /* Start off the timer */
e30492bb 335 kvm_mips_init_count(vcpu);
669e846e
SL		 336
337 return vcpu;
338
339out_free_gebase:
340 kfree(gebase);
341
342out_free_cpu:
343 kfree(vcpu);
344
345out:
346 return ERR_PTR(err);
347}
348
349void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
350{
351 hrtimer_cancel(&vcpu->arch.comparecount_timer);
352
353 kvm_vcpu_uninit(vcpu);
354
355 kvm_mips_dump_stats(vcpu);
356
c6c0a663
JH		 357 kfree(vcpu->arch.guest_ebase);
358 kfree(vcpu->arch.kseg0_commpage);
8c9eb041 359 kfree(vcpu);
669e846e
SL		 360}
361
362void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
363{
364 kvm_arch_vcpu_free(vcpu);
365}
366
d116e812
DCZ		 367int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
368 struct kvm_guest_debug *dbg)
669e846e 369{
ed829857 370 return -ENOIOCTLCMD;
669e846e
SL		 371}
372
373int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
374{
375 int r = 0;
376 sigset_t sigsaved;
377
378 if (vcpu->sigset_active)
379 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
380
381 if (vcpu->mmio_needed) {
382 if (!vcpu->mmio_is_write)
383 kvm_mips_complete_mmio_load(vcpu, run);
384 vcpu->mmio_needed = 0;
385 }
386
f798217d
JH		 387 lose_fpu(1);
388
044f0f03 389 local_irq_disable();
669e846e
SL		 390 /* Check if we have any exceptions/interrupts pending */
391 kvm_mips_deliver_interrupts(vcpu,
392 kvm_read_c0_guest_cause(vcpu->arch.cop0));
393
669e846e
SL		 394 kvm_guest_enter();
395
c4c6f2ca
JH		 396 /* Disable hardware page table walking while in guest */
397 htw_stop();
398
669e846e
SL		 399 r = __kvm_mips_vcpu_run(run, vcpu);
400
c4c6f2ca
JH		 401 /* Re-enable HTW before enabling interrupts */
402 htw_start();
403
669e846e
SL		 404 kvm_guest_exit();
405 local_irq_enable();
406
407 if (vcpu->sigset_active)
408 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
409
410 return r;
411}
412
d116e812
DCZ		 413int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
414 struct kvm_mips_interrupt *irq)
669e846e
SL		 415{
416 int intr = (int)irq->irq;
417 struct kvm_vcpu *dvcpu = NULL;
418
419 if (intr == 3 || intr == -3 || intr == 4 || intr == -4)
420 kvm_debug("%s: CPU: %d, INTR: %d\n", __func__, irq->cpu,
421 (int)intr);
422
423 if (irq->cpu == -1)
424 dvcpu = vcpu;
425 else
426 dvcpu = vcpu->kvm->vcpus[irq->cpu];
427
428 if (intr == 2 || intr == 3 || intr == 4) {
429 kvm_mips_callbacks->queue_io_int(dvcpu, irq);
430
431 } else if (intr == -2 || intr == -3 || intr == -4) {
432 kvm_mips_callbacks->dequeue_io_int(dvcpu, irq);
433 } else {
434 kvm_err("%s: invalid interrupt ioctl (%d:%d)\n", __func__,
435 irq->cpu, irq->irq);
436 return -EINVAL;
437 }
438
439 dvcpu->arch.wait = 0;
440
d116e812 441 if (waitqueue_active(&dvcpu->wq))
669e846e 442 wake_up_interruptible(&dvcpu->wq);
669e846e
SL		 443
444 return 0;
445}
446
d116e812
DCZ		 447int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
448 struct kvm_mp_state *mp_state)
669e846e 449{
ed829857 450 return -ENOIOCTLCMD;
669e846e
SL		 451}
452
d116e812
DCZ		 453int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
454 struct kvm_mp_state *mp_state)
669e846e 455{
ed829857 456 return -ENOIOCTLCMD;
669e846e
SL		 457}
458
4c73fb2b
DD		 459static u64 kvm_mips_get_one_regs[] = {
460 KVM_REG_MIPS_R0,
461 KVM_REG_MIPS_R1,
462 KVM_REG_MIPS_R2,
463 KVM_REG_MIPS_R3,
464 KVM_REG_MIPS_R4,
465 KVM_REG_MIPS_R5,
466 KVM_REG_MIPS_R6,
467 KVM_REG_MIPS_R7,
468 KVM_REG_MIPS_R8,
469 KVM_REG_MIPS_R9,
470 KVM_REG_MIPS_R10,
471 KVM_REG_MIPS_R11,
472 KVM_REG_MIPS_R12,
473 KVM_REG_MIPS_R13,
474 KVM_REG_MIPS_R14,
475 KVM_REG_MIPS_R15,
476 KVM_REG_MIPS_R16,
477 KVM_REG_MIPS_R17,
478 KVM_REG_MIPS_R18,
479 KVM_REG_MIPS_R19,
480 KVM_REG_MIPS_R20,
481 KVM_REG_MIPS_R21,
482 KVM_REG_MIPS_R22,
483 KVM_REG_MIPS_R23,
484 KVM_REG_MIPS_R24,
485 KVM_REG_MIPS_R25,
486 KVM_REG_MIPS_R26,
487 KVM_REG_MIPS_R27,
488 KVM_REG_MIPS_R28,
489 KVM_REG_MIPS_R29,
490 KVM_REG_MIPS_R30,
491 KVM_REG_MIPS_R31,
492
493 KVM_REG_MIPS_HI,
494 KVM_REG_MIPS_LO,
495 KVM_REG_MIPS_PC,
496
497 KVM_REG_MIPS_CP0_INDEX,
498 KVM_REG_MIPS_CP0_CONTEXT,
7767b7d2 499 KVM_REG_MIPS_CP0_USERLOCAL,
4c73fb2b
DD		 500 KVM_REG_MIPS_CP0_PAGEMASK,
501 KVM_REG_MIPS_CP0_WIRED,
16fd5c1d 502 KVM_REG_MIPS_CP0_HWRENA,
4c73fb2b 503 KVM_REG_MIPS_CP0_BADVADDR,
f8be02da 504 KVM_REG_MIPS_CP0_COUNT,
4c73fb2b 505 KVM_REG_MIPS_CP0_ENTRYHI,
f8be02da 506 KVM_REG_MIPS_CP0_COMPARE,
4c73fb2b
DD		 507 KVM_REG_MIPS_CP0_STATUS,
508 KVM_REG_MIPS_CP0_CAUSE,
fb6df0cd 509 KVM_REG_MIPS_CP0_EPC,
1068eaaf 510 KVM_REG_MIPS_CP0_PRID,
4c73fb2b
DD		 511 KVM_REG_MIPS_CP0_CONFIG,
512 KVM_REG_MIPS_CP0_CONFIG1,
513 KVM_REG_MIPS_CP0_CONFIG2,
514 KVM_REG_MIPS_CP0_CONFIG3,
c771607a
JH		 515 KVM_REG_MIPS_CP0_CONFIG4,
516 KVM_REG_MIPS_CP0_CONFIG5,
4c73fb2b 517 KVM_REG_MIPS_CP0_CONFIG7,
f8239342
JH		 518 KVM_REG_MIPS_CP0_ERROREPC,
519
520 KVM_REG_MIPS_COUNT_CTL,
521 KVM_REG_MIPS_COUNT_RESUME,
f74a8e22 522 KVM_REG_MIPS_COUNT_HZ,
4c73fb2b
DD		 523};
524
525static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,
526 const struct kvm_one_reg *reg)
527{
4c73fb2b 528 struct mips_coproc *cop0 = vcpu->arch.cop0;
f8be02da 529 int ret;
4c73fb2b
DD		 530 s64 v;
531
532 switch (reg->id) {
533 case KVM_REG_MIPS_R0 ... KVM_REG_MIPS_R31:
534 v = (long)vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0];
535 break;
536 case KVM_REG_MIPS_HI:
537 v = (long)vcpu->arch.hi;
538 break;
539 case KVM_REG_MIPS_LO:
540 v = (long)vcpu->arch.lo;
541 break;
542 case KVM_REG_MIPS_PC:
543 v = (long)vcpu->arch.pc;
544 break;
545
546 case KVM_REG_MIPS_CP0_INDEX:
547 v = (long)kvm_read_c0_guest_index(cop0);
548 break;
549 case KVM_REG_MIPS_CP0_CONTEXT:
550 v = (long)kvm_read_c0_guest_context(cop0);
551 break;
7767b7d2
JH		 552 case KVM_REG_MIPS_CP0_USERLOCAL:
553 v = (long)kvm_read_c0_guest_userlocal(cop0);
554 break;
4c73fb2b
DD		 555 case KVM_REG_MIPS_CP0_PAGEMASK:
556 v = (long)kvm_read_c0_guest_pagemask(cop0);
557 break;
558 case KVM_REG_MIPS_CP0_WIRED:
559 v = (long)kvm_read_c0_guest_wired(cop0);
560 break;
16fd5c1d
JH		 561 case KVM_REG_MIPS_CP0_HWRENA:
562 v = (long)kvm_read_c0_guest_hwrena(cop0);
563 break;
4c73fb2b
DD		 564 case KVM_REG_MIPS_CP0_BADVADDR:
565 v = (long)kvm_read_c0_guest_badvaddr(cop0);
566 break;
567 case KVM_REG_MIPS_CP0_ENTRYHI:
568 v = (long)kvm_read_c0_guest_entryhi(cop0);
569 break;
f8be02da
JH		 570 case KVM_REG_MIPS_CP0_COMPARE:
571 v = (long)kvm_read_c0_guest_compare(cop0);
572 break;
4c73fb2b
DD		 573 case KVM_REG_MIPS_CP0_STATUS:
574 v = (long)kvm_read_c0_guest_status(cop0);
575 break;
576 case KVM_REG_MIPS_CP0_CAUSE:
577 v = (long)kvm_read_c0_guest_cause(cop0);
578 break;
fb6df0cd
JH		 579 case KVM_REG_MIPS_CP0_EPC:
580 v = (long)kvm_read_c0_guest_epc(cop0);
581 break;
1068eaaf
JH		 582 case KVM_REG_MIPS_CP0_PRID:
583 v = (long)kvm_read_c0_guest_prid(cop0);
584 break;
4c73fb2b
DD		 585 case KVM_REG_MIPS_CP0_CONFIG:
586 v = (long)kvm_read_c0_guest_config(cop0);
587 break;
588 case KVM_REG_MIPS_CP0_CONFIG1:
589 v = (long)kvm_read_c0_guest_config1(cop0);
590 break;
591 case KVM_REG_MIPS_CP0_CONFIG2:
592 v = (long)kvm_read_c0_guest_config2(cop0);
593 break;
594 case KVM_REG_MIPS_CP0_CONFIG3:
595 v = (long)kvm_read_c0_guest_config3(cop0);
596 break;
c771607a
JH		 597 case KVM_REG_MIPS_CP0_CONFIG4:
598 v = (long)kvm_read_c0_guest_config4(cop0);
599 break;
600 case KVM_REG_MIPS_CP0_CONFIG5:
601 v = (long)kvm_read_c0_guest_config5(cop0);
602 break;
4c73fb2b
DD		 603 case KVM_REG_MIPS_CP0_CONFIG7:
604 v = (long)kvm_read_c0_guest_config7(cop0);
605 break;
e93d4c15
JH		 606 case KVM_REG_MIPS_CP0_ERROREPC:
607 v = (long)kvm_read_c0_guest_errorepc(cop0);
608 break;
f8be02da
JH		 609 /* registers to be handled specially */
610 case KVM_REG_MIPS_CP0_COUNT:
f8239342
JH		 611 case KVM_REG_MIPS_COUNT_CTL:
612 case KVM_REG_MIPS_COUNT_RESUME:
f74a8e22 613 case KVM_REG_MIPS_COUNT_HZ:
f8be02da
JH		 614 ret = kvm_mips_callbacks->get_one_reg(vcpu, reg, &v);
615 if (ret)
616 return ret;
617 break;
4c73fb2b
DD		 618 default:
619 return -EINVAL;
620 }
681865d4
DD		 621 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
622 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
d116e812 623
681865d4
DD		 624 return put_user(v, uaddr64);
625 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
626 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
627 u32 v32 = (u32)v;
d116e812 628
681865d4
DD		 629 return put_user(v32, uaddr32);
630 } else {
631 return -EINVAL;
632 }
4c73fb2b
DD		 633}
634
635static int kvm_mips_set_reg(struct kvm_vcpu *vcpu,
636 const struct kvm_one_reg *reg)
637{
4c73fb2b
DD		 638 struct mips_coproc *cop0 = vcpu->arch.cop0;
639 u64 v;
640
681865d4
DD		 641 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
642 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
643
644 if (get_user(v, uaddr64) != 0)
645 return -EFAULT;
646 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
647 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
648 s32 v32;
649
650 if (get_user(v32, uaddr32) != 0)
651 return -EFAULT;
652 v = (s64)v32;
653 } else {
654 return -EINVAL;
655 }
4c73fb2b
DD		 656
657 switch (reg->id) {
658 case KVM_REG_MIPS_R0:
659 /* Silently ignore requests to set $0 */
660 break;
661 case KVM_REG_MIPS_R1 ... KVM_REG_MIPS_R31:
662 vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0] = v;
663 break;
664 case KVM_REG_MIPS_HI:
665 vcpu->arch.hi = v;
666 break;
667 case KVM_REG_MIPS_LO:
668 vcpu->arch.lo = v;
669 break;
670 case KVM_REG_MIPS_PC:
671 vcpu->arch.pc = v;
672 break;
673
674 case KVM_REG_MIPS_CP0_INDEX:
675 kvm_write_c0_guest_index(cop0, v);
676 break;
677 case KVM_REG_MIPS_CP0_CONTEXT:
678 kvm_write_c0_guest_context(cop0, v);
679 break;
7767b7d2
JH		 680 case KVM_REG_MIPS_CP0_USERLOCAL:
681 kvm_write_c0_guest_userlocal(cop0, v);
682 break;
4c73fb2b
DD		 683 case KVM_REG_MIPS_CP0_PAGEMASK:
684 kvm_write_c0_guest_pagemask(cop0, v);
685 break;
686 case KVM_REG_MIPS_CP0_WIRED:
687 kvm_write_c0_guest_wired(cop0, v);
688 break;
16fd5c1d
JH		 689 case KVM_REG_MIPS_CP0_HWRENA:
690 kvm_write_c0_guest_hwrena(cop0, v);
691 break;
4c73fb2b
DD		 692 case KVM_REG_MIPS_CP0_BADVADDR:
693 kvm_write_c0_guest_badvaddr(cop0, v);
694 break;
695 case KVM_REG_MIPS_CP0_ENTRYHI:
696 kvm_write_c0_guest_entryhi(cop0, v);
697 break;
698 case KVM_REG_MIPS_CP0_STATUS:
699 kvm_write_c0_guest_status(cop0, v);
700 break;
fb6df0cd
JH		 701 case KVM_REG_MIPS_CP0_EPC:
702 kvm_write_c0_guest_epc(cop0, v);
703 break;
1068eaaf
JH		 704 case KVM_REG_MIPS_CP0_PRID:
705 kvm_write_c0_guest_prid(cop0, v);
706 break;
4c73fb2b
DD		 707 case KVM_REG_MIPS_CP0_ERROREPC:
708 kvm_write_c0_guest_errorepc(cop0, v);
709 break;
f8be02da
JH		 710 /* registers to be handled specially */
711 case KVM_REG_MIPS_CP0_COUNT:
712 case KVM_REG_MIPS_CP0_COMPARE:
e30492bb 713 case KVM_REG_MIPS_CP0_CAUSE:
c771607a
JH		 714 case KVM_REG_MIPS_CP0_CONFIG:
715 case KVM_REG_MIPS_CP0_CONFIG1:
716 case KVM_REG_MIPS_CP0_CONFIG2:
717 case KVM_REG_MIPS_CP0_CONFIG3:
718 case KVM_REG_MIPS_CP0_CONFIG4:
719 case KVM_REG_MIPS_CP0_CONFIG5:
f8239342
JH		 720 case KVM_REG_MIPS_COUNT_CTL:
721 case KVM_REG_MIPS_COUNT_RESUME:
f74a8e22 722 case KVM_REG_MIPS_COUNT_HZ:
f8be02da 723 return kvm_mips_callbacks->set_one_reg(vcpu, reg, v);
4c73fb2b
DD		 724 default:
725 return -EINVAL;
726 }
727 return 0;
728}
729
d116e812
DCZ		 730long kvm_arch_vcpu_ioctl(struct file *filp, unsigned int ioctl,
731 unsigned long arg)
669e846e
SL		 732{
733 struct kvm_vcpu *vcpu = filp->private_data;
734 void __user *argp = (void __user *)arg;
735 long r;
669e846e
SL		 736
737 switch (ioctl) {
4c73fb2b
DD		 738 case KVM_SET_ONE_REG:
739 case KVM_GET_ONE_REG: {
740 struct kvm_one_reg reg;
d116e812 741
4c73fb2b
DD		 742 if (copy_from_user(&reg, argp, sizeof(reg)))
743 return -EFAULT;
744 if (ioctl == KVM_SET_ONE_REG)
745 return kvm_mips_set_reg(vcpu, &reg);
746 else
747 return kvm_mips_get_reg(vcpu, &reg);
748 }
749 case KVM_GET_REG_LIST: {
750 struct kvm_reg_list __user *user_list = argp;
751 u64 __user *reg_dest;
752 struct kvm_reg_list reg_list;
753 unsigned n;
754
755 if (copy_from_user(&reg_list, user_list, sizeof(reg_list)))
756 return -EFAULT;
757 n = reg_list.n;
758 reg_list.n = ARRAY_SIZE(kvm_mips_get_one_regs);
759 if (copy_to_user(user_list, &reg_list, sizeof(reg_list)))
760 return -EFAULT;
761 if (n < reg_list.n)
762 return -E2BIG;
763 reg_dest = user_list->reg;
764 if (copy_to_user(reg_dest, kvm_mips_get_one_regs,
765 sizeof(kvm_mips_get_one_regs)))
766 return -EFAULT;
767 return 0;
768 }
669e846e
SL		 769 case KVM_NMI:
770 /* Treat the NMI as a CPU reset */
771 r = kvm_mips_reset_vcpu(vcpu);
772 break;
773 case KVM_INTERRUPT:
774 {
775 struct kvm_mips_interrupt irq;
d116e812 776
669e846e
SL		 777 r = -EFAULT;
778 if (copy_from_user(&irq, argp, sizeof(irq)))
779 goto out;
780
669e846e
SL		 781 kvm_debug("[%d] %s: irq: %d\n", vcpu->vcpu_id, __func__,
782 irq.irq);
783
784 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
785 break;
786 }
787 default:
4c73fb2b 788 r = -ENOIOCTLCMD;
669e846e
SL		 789 }
790
791out:
792 return r;
793}
794
d116e812 795/* Get (and clear) the dirty memory log for a memory slot. */
669e846e
SL		 796int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
797{
798 struct kvm_memory_slot *memslot;
799 unsigned long ga, ga_end;
800 int is_dirty = 0;
801 int r;
802 unsigned long n;
803
804 mutex_lock(&kvm->slots_lock);
805
806 r = kvm_get_dirty_log(kvm, log, &is_dirty);
807 if (r)
808 goto out;
809
810 /* If nothing is dirty, don't bother messing with page tables. */
811 if (is_dirty) {
812 memslot = &kvm->memslots->memslots[log->slot];
813
814 ga = memslot->base_gfn << PAGE_SHIFT;
815 ga_end = ga + (memslot->npages << PAGE_SHIFT);
816
6ad78a5c
DCZ		 817 kvm_info("%s: dirty, ga: %#lx, ga_end %#lx\n", __func__, ga,
818 ga_end);
669e846e
SL		 819
820 n = kvm_dirty_bitmap_bytes(memslot);
821 memset(memslot->dirty_bitmap, 0, n);
822 }
823
824 r = 0;
825out:
826 mutex_unlock(&kvm->slots_lock);
827 return r;
828
829}
830
831long kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
832{
833 long r;
834
835 switch (ioctl) {
836 default:
ed829857 837 r = -ENOIOCTLCMD;
669e846e
SL		 838 }
839
840 return r;
841}
842
843int kvm_arch_init(void *opaque)
844{
669e846e
SL		 845 if (kvm_mips_callbacks) {
846 kvm_err("kvm: module already exists\n");
847 return -EEXIST;
848 }
849
d98403a5 850 return kvm_mips_emulation_init(&kvm_mips_callbacks);
669e846e
SL		 851}
852
853void kvm_arch_exit(void)
854{
855 kvm_mips_callbacks = NULL;
856}
857
d116e812
DCZ		 858int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
859 struct kvm_sregs *sregs)
669e846e 860{
ed829857 861 return -ENOIOCTLCMD;
669e846e
SL		 862}
863
d116e812
DCZ		 864int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
865 struct kvm_sregs *sregs)
669e846e 866{
ed829857 867 return -ENOIOCTLCMD;
669e846e
SL		 868}
869
31928aa5 870void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
669e846e 871{
669e846e
SL		 872}
873
874int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
875{
ed829857 876 return -ENOIOCTLCMD;
669e846e
SL		 877}
878
879int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
880{
ed829857 881 return -ENOIOCTLCMD;
669e846e
SL		 882}
883
884int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
885{
886 return VM_FAULT_SIGBUS;
887}
888
784aa3d7 889int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
669e846e
SL		 890{
891 int r;
892
893 switch (ext) {
4c73fb2b
DD		 894 case KVM_CAP_ONE_REG:
895 r = 1;
896 break;
669e846e
SL		 897 case KVM_CAP_COALESCED_MMIO:
898 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
899 break;
900 default:
901 r = 0;
902 break;
903 }
904 return r;
669e846e
SL		 905}
906
907int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
908{
909 return kvm_mips_pending_timer(vcpu);
910}
911
912int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu)
913{
914 int i;
915 struct mips_coproc *cop0;
916
917 if (!vcpu)
918 return -1;
919
6ad78a5c
DCZ		 920 kvm_debug("VCPU Register Dump:\n");
921 kvm_debug("\tpc = 0x%08lx\n", vcpu->arch.pc);
922 kvm_debug("\texceptions: %08lx\n", vcpu->arch.pending_exceptions);
669e846e
SL		 923
924 for (i = 0; i < 32; i += 4) {
6ad78a5c 925 kvm_debug("\tgpr%02d: %08lx %08lx %08lx %08lx\n", i,
669e846e
SL		 926 vcpu->arch.gprs[i],
927 vcpu->arch.gprs[i + 1],
928 vcpu->arch.gprs[i + 2], vcpu->arch.gprs[i + 3]);
929 }
6ad78a5c
DCZ		 930 kvm_debug("\thi: 0x%08lx\n", vcpu->arch.hi);
931 kvm_debug("\tlo: 0x%08lx\n", vcpu->arch.lo);
669e846e
SL		 932
933 cop0 = vcpu->arch.cop0;
6ad78a5c
DCZ		 934 kvm_debug("\tStatus: 0x%08lx, Cause: 0x%08lx\n",
935 kvm_read_c0_guest_status(cop0),
936 kvm_read_c0_guest_cause(cop0));
669e846e 937
6ad78a5c 938 kvm_debug("\tEPC: 0x%08lx\n", kvm_read_c0_guest_epc(cop0));
669e846e
SL		 939
940 return 0;
941}
942
943int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
944{
945 int i;
946
8d17dd04 947 for (i = 1; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
bf32ebf6 948 vcpu->arch.gprs[i] = regs->gpr[i];
8d17dd04 949 vcpu->arch.gprs[0] = 0; /* zero is special, and cannot be set. */
669e846e
SL		 950 vcpu->arch.hi = regs->hi;
951 vcpu->arch.lo = regs->lo;
952 vcpu->arch.pc = regs->pc;
953
4c73fb2b 954 return 0;
669e846e
SL		 955}
956
957int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
958{
959 int i;
960
8d17dd04 961 for (i = 0; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
bf32ebf6 962 regs->gpr[i] = vcpu->arch.gprs[i];
669e846e
SL		 963
964 regs->hi = vcpu->arch.hi;
965 regs->lo = vcpu->arch.lo;
966 regs->pc = vcpu->arch.pc;
967
4c73fb2b 968 return 0;
669e846e
SL		 969}
970
0fae34f4 971static void kvm_mips_comparecount_func(unsigned long data)
669e846e
SL		 972{
973 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
974
975 kvm_mips_callbacks->queue_timer_int(vcpu);
976
977 vcpu->arch.wait = 0;
d116e812 978 if (waitqueue_active(&vcpu->wq))
669e846e 979 wake_up_interruptible(&vcpu->wq);
669e846e
SL		 980}
981
d116e812 982/* low level hrtimer wake routine */
0fae34f4 983static enum hrtimer_restart kvm_mips_comparecount_wakeup(struct hrtimer *timer)
669e846e
SL		 984{
985 struct kvm_vcpu *vcpu;
986
987 vcpu = container_of(timer, struct kvm_vcpu, arch.comparecount_timer);
988 kvm_mips_comparecount_func((unsigned long) vcpu);
e30492bb 989 return kvm_mips_count_timeout(vcpu);
669e846e
SL		 990}
991
992int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
993{
994 kvm_mips_callbacks->vcpu_init(vcpu);
995 hrtimer_init(&vcpu->arch.comparecount_timer, CLOCK_MONOTONIC,
996 HRTIMER_MODE_REL);
997 vcpu->arch.comparecount_timer.function = kvm_mips_comparecount_wakeup;
669e846e
SL		 998 return 0;
999}
1000
d116e812
DCZ		 1001int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1002 struct kvm_translation *tr)
669e846e
SL		 1003{
1004 return 0;
1005}
1006
1007/* Initial guest state */
1008int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1009{
1010 return kvm_mips_callbacks->vcpu_setup(vcpu);
1011}
1012
d116e812 1013static void kvm_mips_set_c0_status(void)
669e846e
SL		 1014{
1015 uint32_t status = read_c0_status();
1016
669e846e
SL		 1017 if (cpu_has_dsp)
1018 status |= (ST0_MX);
1019
1020 write_c0_status(status);
1021 ehb();
1022}
1023
1024/*
1025 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
1026 */
1027int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
1028{
1029 uint32_t cause = vcpu->arch.host_cp0_cause;
1030 uint32_t exccode = (cause >> CAUSEB_EXCCODE) & 0x1f;
1031 uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
1032 unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
1033 enum emulation_result er = EMULATE_DONE;
1034 int ret = RESUME_GUEST;
1035
c4c6f2ca
JH		 1036 /* re-enable HTW before enabling interrupts */
1037 htw_start();
1038
669e846e
SL		 1039 /* Set a default exit reason */
1040 run->exit_reason = KVM_EXIT_UNKNOWN;
1041 run->ready_for_interrupt_injection = 1;
1042
d116e812
DCZ		 1043 /*
1044 * Set the appropriate status bits based on host CPU features,
1045 * before we hit the scheduler
1046 */
669e846e
SL		 1047 kvm_mips_set_c0_status();
1048
1049 local_irq_enable();
1050
1051 kvm_debug("kvm_mips_handle_exit: cause: %#x, PC: %p, kvm_run: %p, kvm_vcpu: %p\n",
1052 cause, opc, run, vcpu);
1053
d116e812
DCZ		 1054 /*
1055 * Do a privilege check, if in UM most of these exit conditions end up
669e846e
SL		 1056 * causing an exception to be delivered to the Guest Kernel
1057 */
1058 er = kvm_mips_check_privilege(cause, opc, run, vcpu);
1059 if (er == EMULATE_PRIV_FAIL) {
1060 goto skip_emul;
1061 } else if (er == EMULATE_FAIL) {
1062 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1063 ret = RESUME_HOST;
1064 goto skip_emul;
1065 }
1066
1067 switch (exccode) {
1068 case T_INT:
1069 kvm_debug("[%d]T_INT @ %p\n", vcpu->vcpu_id, opc);
1070
1071 ++vcpu->stat.int_exits;
1072 trace_kvm_exit(vcpu, INT_EXITS);
1073
d116e812 1074 if (need_resched())
669e846e 1075 cond_resched();
669e846e
SL		 1076
1077 ret = RESUME_GUEST;
1078 break;
1079
1080 case T_COP_UNUSABLE:
1081 kvm_debug("T_COP_UNUSABLE: @ PC: %p\n", opc);
1082
1083 ++vcpu->stat.cop_unusable_exits;
1084 trace_kvm_exit(vcpu, COP_UNUSABLE_EXITS);
1085 ret = kvm_mips_callbacks->handle_cop_unusable(vcpu);
1086 /* XXXKYMA: Might need to return to user space */
d116e812 1087 if (run->exit_reason == KVM_EXIT_IRQ_WINDOW_OPEN)
669e846e 1088 ret = RESUME_HOST;
669e846e
SL		 1089 break;
1090
1091 case T_TLB_MOD:
1092 ++vcpu->stat.tlbmod_exits;
1093 trace_kvm_exit(vcpu, TLBMOD_EXITS);
1094 ret = kvm_mips_callbacks->handle_tlb_mod(vcpu);
1095 break;
1096
1097 case T_TLB_ST_MISS:
d116e812
DCZ		 1098 kvm_debug("TLB ST fault: cause %#x, status %#lx, PC: %p, BadVaddr: %#lx\n",
1099 cause, kvm_read_c0_guest_status(vcpu->arch.cop0), opc,
1100 badvaddr);
669e846e
SL		 1101
1102 ++vcpu->stat.tlbmiss_st_exits;
1103 trace_kvm_exit(vcpu, TLBMISS_ST_EXITS);
1104 ret = kvm_mips_callbacks->handle_tlb_st_miss(vcpu);
1105 break;
1106
1107 case T_TLB_LD_MISS:
1108 kvm_debug("TLB LD fault: cause %#x, PC: %p, BadVaddr: %#lx\n",
1109 cause, opc, badvaddr);
1110
1111 ++vcpu->stat.tlbmiss_ld_exits;
1112 trace_kvm_exit(vcpu, TLBMISS_LD_EXITS);
1113 ret = kvm_mips_callbacks->handle_tlb_ld_miss(vcpu);
1114 break;
1115
1116 case T_ADDR_ERR_ST:
1117 ++vcpu->stat.addrerr_st_exits;
1118 trace_kvm_exit(vcpu, ADDRERR_ST_EXITS);
1119 ret = kvm_mips_callbacks->handle_addr_err_st(vcpu);
1120 break;
1121
1122 case T_ADDR_ERR_LD:
1123 ++vcpu->stat.addrerr_ld_exits;
1124 trace_kvm_exit(vcpu, ADDRERR_LD_EXITS);
1125 ret = kvm_mips_callbacks->handle_addr_err_ld(vcpu);
1126 break;
1127
1128 case T_SYSCALL:
1129 ++vcpu->stat.syscall_exits;
1130 trace_kvm_exit(vcpu, SYSCALL_EXITS);
1131 ret = kvm_mips_callbacks->handle_syscall(vcpu);
1132 break;
1133
1134 case T_RES_INST:
1135 ++vcpu->stat.resvd_inst_exits;
1136 trace_kvm_exit(vcpu, RESVD_INST_EXITS);
1137 ret = kvm_mips_callbacks->handle_res_inst(vcpu);
1138 break;
1139
1140 case T_BREAK:
1141 ++vcpu->stat.break_inst_exits;
1142 trace_kvm_exit(vcpu, BREAK_INST_EXITS);
1143 ret = kvm_mips_callbacks->handle_break(vcpu);
1144 break;
1145
0a560427
JH		 1146 case T_TRAP:
1147 ++vcpu->stat.trap_inst_exits;
1148 trace_kvm_exit(vcpu, TRAP_INST_EXITS);
1149 ret = kvm_mips_callbacks->handle_trap(vcpu);
1150 break;
1151
1c0cd66a
JH		 1152 case T_FPE:
1153 ++vcpu->stat.fpe_exits;
1154 trace_kvm_exit(vcpu, FPE_EXITS);
1155 ret = kvm_mips_callbacks->handle_fpe(vcpu);
1156 break;
1157
98119ad5
JH		 1158 case T_MSADIS:
1159 ret = kvm_mips_callbacks->handle_msa_disabled(vcpu);
1160 break;
1161
669e846e 1162 default:
d116e812
DCZ		 1163 kvm_err("Exception Code: %d, not yet handled, @ PC: %p, inst: 0x%08x BadVaddr: %#lx Status: %#lx\n",
1164 exccode, opc, kvm_get_inst(opc, vcpu), badvaddr,
1165 kvm_read_c0_guest_status(vcpu->arch.cop0));
669e846e
SL		 1166 kvm_arch_vcpu_dump_regs(vcpu);
1167 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1168 ret = RESUME_HOST;
1169 break;
1170
1171 }
1172
1173skip_emul:
1174 local_irq_disable();
1175
1176 if (er == EMULATE_DONE && !(ret & RESUME_HOST))
1177 kvm_mips_deliver_interrupts(vcpu, cause);
1178
1179 if (!(ret & RESUME_HOST)) {
d116e812 1180 /* Only check for signals if not already exiting to userspace */
669e846e
SL		 1181 if (signal_pending(current)) {
1182 run->exit_reason = KVM_EXIT_INTR;
1183 ret = (-EINTR << 2) | RESUME_HOST;
1184 ++vcpu->stat.signal_exits;
1185 trace_kvm_exit(vcpu, SIGNAL_EXITS);
1186 }
1187 }
1188
98e91b84
JH		 1189 if (ret == RESUME_GUEST) {
1190 /*
1191 * If FPU is enabled (i.e. the guest's FPU context is live),
1192 * restore FCR31.
1193 *
1194 * This should be before returning to the guest exception
1195 * vector, as it may well cause an FP exception if there are
1196 * pending exception bits unmasked. (see
1197 * kvm_mips_csr_die_notifier() for how that is handled).
1198 */
1199 if (kvm_mips_guest_has_fpu(&vcpu->arch) &&
1200 read_c0_status() & ST0_CU1)
1201 __kvm_restore_fcsr(&vcpu->arch);
1202 }
1203
c4c6f2ca
JH		 1204 /* Disable HTW before returning to guest or host */
1205 htw_stop();
1206
669e846e
SL		 1207 return ret;
1208}
1209
98e91b84
JH		 1210/* Enable FPU for guest and restore context */
1211void kvm_own_fpu(struct kvm_vcpu *vcpu)
1212{
1213 struct mips_coproc *cop0 = vcpu->arch.cop0;
1214 unsigned int sr, cfg5;
1215
1216 preempt_disable();
1217
1218 /*
1219 * Enable FPU for guest
1220 * We set FR and FRE according to guest context
1221 */
1222 sr = kvm_read_c0_guest_status(cop0);
1223 change_c0_status(ST0_CU1 | ST0_FR, sr);
1224 if (cpu_has_fre) {
1225 cfg5 = kvm_read_c0_guest_config5(cop0);
1226 change_c0_config5(MIPS_CONF5_FRE, cfg5);
1227 }
1228 enable_fpu_hazard();
1229
1230 /* If guest FPU state not active, restore it now */
1231 if (!(vcpu->arch.fpu_inuse & KVM_MIPS_FPU_FPU)) {
1232 __kvm_restore_fpu(&vcpu->arch);
1233 vcpu->arch.fpu_inuse |= KVM_MIPS_FPU_FPU;
1234 }
1235
1236 preempt_enable();
1237}
1238
1239/* Drop FPU without saving it */
1240void kvm_drop_fpu(struct kvm_vcpu *vcpu)
1241{
1242 preempt_disable();
1243 if (vcpu->arch.fpu_inuse & KVM_MIPS_FPU_FPU) {
1244 clear_c0_status(ST0_CU1 | ST0_FR);
1245 vcpu->arch.fpu_inuse &= ~KVM_MIPS_FPU_FPU;
1246 }
1247 preempt_enable();
1248}
1249
1250/* Save and disable FPU */
1251void kvm_lose_fpu(struct kvm_vcpu *vcpu)
1252{
1253 /*
1254 * FPU gets disabled in root context (hardware) when it is disabled in
1255 * guest context (software), but the register state in the hardware may
1256 * still be in use. This is why we explicitly re-enable the hardware
1257 * before saving.
1258 */
1259
1260 preempt_disable();
1261 if (vcpu->arch.fpu_inuse & KVM_MIPS_FPU_FPU) {
1262 set_c0_status(ST0_CU1);
1263 enable_fpu_hazard();
1264
1265 __kvm_save_fpu(&vcpu->arch);
1266 vcpu->arch.fpu_inuse &= ~KVM_MIPS_FPU_FPU;
1267
1268 /* Disable FPU */
1269 clear_c0_status(ST0_CU1 | ST0_FR);
1270 }
1271 preempt_enable();
1272}
1273
1274/*
1275 * Step over a specific ctc1 to FCSR which is used to restore guest FCSR state
1276 * and may trigger a "harmless" FP exception if cause bits are set in the value
1277 * being written.
1278 */
1279static int kvm_mips_csr_die_notify(struct notifier_block *self,
1280 unsigned long cmd, void *ptr)
1281{
1282 struct die_args *args = (struct die_args *)ptr;
1283 struct pt_regs *regs = args->regs;
1284 unsigned long pc;
1285
1286 /* Only interested in FPE */
1287 if (cmd != DIE_FP)
1288 return NOTIFY_DONE;
1289
1290 /* Return immediately if guest context isn't active */
1291 if (!(current->flags & PF_VCPU))
1292 return NOTIFY_DONE;
1293
1294 /* Should never get here from user mode */
1295 BUG_ON(user_mode(regs));
1296
1297 pc = instruction_pointer(regs);
1298 switch (cmd) {
1299 case DIE_FP:
1300 /* match 2nd instruction in __kvm_restore_fcsr */
1301 if (pc != (unsigned long)&__kvm_restore_fcsr + 4)
1302 return NOTIFY_DONE;
1303 break;
1304 }
1305
1306 /* Move PC forward a little and continue executing */
1307 instruction_pointer(regs) += 4;
1308
1309 return NOTIFY_STOP;
1310}
1311
1312static struct notifier_block kvm_mips_csr_die_notifier = {
1313 .notifier_call = kvm_mips_csr_die_notify,
1314};
1315
669e846e
SL		 1316int __init kvm_mips_init(void)
1317{
1318 int ret;
1319
1320 ret = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1321
1322 if (ret)
1323 return ret;
1324
98e91b84
JH		 1325 register_die_notifier(&kvm_mips_csr_die_notifier);
1326
d116e812
DCZ		 1327 /*
1328 * On MIPS, kernel modules are executed from "mapped space", which
1329 * requires TLBs. The TLB handling code is statically linked with
d7d5b05f 1330 * the rest of the kernel (tlb.c) to avoid the possibility of
d116e812
DCZ		 1331 * double faulting. The issue is that the TLB code references
1332 * routines that are part of the the KVM module, which are only
1333 * available once the module is loaded.
669e846e
SL		 1334 */
1335 kvm_mips_gfn_to_pfn = gfn_to_pfn;
1336 kvm_mips_release_pfn_clean = kvm_release_pfn_clean;
1337 kvm_mips_is_error_pfn = is_error_pfn;
1338
669e846e
SL		 1339 return 0;
1340}
1341
1342void __exit kvm_mips_exit(void)
1343{
1344 kvm_exit();
1345
1346 kvm_mips_gfn_to_pfn = NULL;
1347 kvm_mips_release_pfn_clean = NULL;
1348 kvm_mips_is_error_pfn = NULL;
98e91b84
JH		 1349
1350 unregister_die_notifier(&kvm_mips_csr_die_notifier);
669e846e
SL		 1351}
1352
1353module_init(kvm_mips_init);
1354module_exit(kvm_mips_exit);
1355
1356EXPORT_TRACEPOINT_SYMBOL(kvm_exit);
Linux 6.x block layer and io_uring tree(s)