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mips/kvm: Use KVM_REG_MIPS and proper size indicators for *_ONE_REG
[linux-2.6-block.git] / arch / mips / kvm / kvm_mips.c
CommitLineData
669e846e
SL		 1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * KVM/MIPS: MIPS specific KVM APIs
7 *
8 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
9 * Authors: Sanjay Lal <sanjayl@kymasys.com>
10*/
11
12#include <linux/errno.h>
13#include <linux/err.h>
14#include <linux/module.h>
15#include <linux/vmalloc.h>
16#include <linux/fs.h>
17#include <linux/bootmem.h>
18#include <asm/page.h>
19#include <asm/cacheflush.h>
20#include <asm/mmu_context.h>
21
22#include <linux/kvm_host.h>
23
24#include "kvm_mips_int.h"
25#include "kvm_mips_comm.h"
26
27#define CREATE_TRACE_POINTS
28#include "trace.h"
29
30#ifndef VECTORSPACING
31#define VECTORSPACING 0x100 /* for EI/VI mode */
32#endif
33
34#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
35struct kvm_stats_debugfs_item debugfs_entries[] = {
36 { "wait", VCPU_STAT(wait_exits) },
37 { "cache", VCPU_STAT(cache_exits) },
38 { "signal", VCPU_STAT(signal_exits) },
39 { "interrupt", VCPU_STAT(int_exits) },
40 { "cop_unsuable", VCPU_STAT(cop_unusable_exits) },
41 { "tlbmod", VCPU_STAT(tlbmod_exits) },
42 { "tlbmiss_ld", VCPU_STAT(tlbmiss_ld_exits) },
43 { "tlbmiss_st", VCPU_STAT(tlbmiss_st_exits) },
44 { "addrerr_st", VCPU_STAT(addrerr_st_exits) },
45 { "addrerr_ld", VCPU_STAT(addrerr_ld_exits) },
46 { "syscall", VCPU_STAT(syscall_exits) },
47 { "resvd_inst", VCPU_STAT(resvd_inst_exits) },
48 { "break_inst", VCPU_STAT(break_inst_exits) },
49 { "flush_dcache", VCPU_STAT(flush_dcache_exits) },
50 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
51 {NULL}
52};
53
54static int kvm_mips_reset_vcpu(struct kvm_vcpu *vcpu)
55{
56 int i;
57 for_each_possible_cpu(i) {
58 vcpu->arch.guest_kernel_asid[i] = 0;
59 vcpu->arch.guest_user_asid[i] = 0;
60 }
61 return 0;
62}
63
64gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
65{
66 return gfn;
67}
68
69/* XXXKYMA: We are simulatoring a processor that has the WII bit set in Config7, so we
70 * are "runnable" if interrupts are pending
71 */
72int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
73{
74 return !!(vcpu->arch.pending_exceptions);
75}
76
77int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
78{
79 return 1;
80}
81
82int kvm_arch_hardware_enable(void *garbage)
83{
84 return 0;
85}
86
87void kvm_arch_hardware_disable(void *garbage)
88{
89}
90
91int kvm_arch_hardware_setup(void)
92{
93 return 0;
94}
95
96void kvm_arch_hardware_unsetup(void)
97{
98}
99
100void kvm_arch_check_processor_compat(void *rtn)
101{
102 int *r = (int *)rtn;
103 *r = 0;
104 return;
105}
106
107static void kvm_mips_init_tlbs(struct kvm *kvm)
108{
109 unsigned long wired;
110
111 /* Add a wired entry to the TLB, it is used to map the commpage to the Guest kernel */
112 wired = read_c0_wired();
113 write_c0_wired(wired + 1);
114 mtc0_tlbw_hazard();
115 kvm->arch.commpage_tlb = wired;
116
117 kvm_debug("[%d] commpage TLB: %d\n", smp_processor_id(),
118 kvm->arch.commpage_tlb);
119}
120
121static void kvm_mips_init_vm_percpu(void *arg)
122{
123 struct kvm *kvm = (struct kvm *)arg;
124
125 kvm_mips_init_tlbs(kvm);
126 kvm_mips_callbacks->vm_init(kvm);
127
128}
129
130int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
131{
132 if (atomic_inc_return(&kvm_mips_instance) == 1) {
133 kvm_info("%s: 1st KVM instance, setup host TLB parameters\n",
134 __func__);
135 on_each_cpu(kvm_mips_init_vm_percpu, kvm, 1);
136 }
137
138
139 return 0;
140}
141
142void kvm_mips_free_vcpus(struct kvm *kvm)
143{
144 unsigned int i;
145 struct kvm_vcpu *vcpu;
146
147 /* Put the pages we reserved for the guest pmap */
148 for (i = 0; i < kvm->arch.guest_pmap_npages; i++) {
149 if (kvm->arch.guest_pmap[i] != KVM_INVALID_PAGE)
150 kvm_mips_release_pfn_clean(kvm->arch.guest_pmap[i]);
151 }
152
153 if (kvm->arch.guest_pmap)
154 kfree(kvm->arch.guest_pmap);
155
156 kvm_for_each_vcpu(i, vcpu, kvm) {
157 kvm_arch_vcpu_free(vcpu);
158 }
159
160 mutex_lock(&kvm->lock);
161
162 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
163 kvm->vcpus[i] = NULL;
164
165 atomic_set(&kvm->online_vcpus, 0);
166
167 mutex_unlock(&kvm->lock);
168}
169
170void kvm_arch_sync_events(struct kvm *kvm)
171{
172}
173
174static void kvm_mips_uninit_tlbs(void *arg)
175{
176 /* Restore wired count */
177 write_c0_wired(0);
178 mtc0_tlbw_hazard();
179 /* Clear out all the TLBs */
180 kvm_local_flush_tlb_all();
181}
182
183void kvm_arch_destroy_vm(struct kvm *kvm)
184{
185 kvm_mips_free_vcpus(kvm);
186
187 /* If this is the last instance, restore wired count */
188 if (atomic_dec_return(&kvm_mips_instance) == 0) {
189 kvm_info("%s: last KVM instance, restoring TLB parameters\n",
190 __func__);
191 on_each_cpu(kvm_mips_uninit_tlbs, NULL, 1);
192 }
193}
194
195long
196kvm_arch_dev_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
197{
ed829857 198 return -ENOIOCTLCMD;
669e846e
SL		 199}
200
201void kvm_arch_free_memslot(struct kvm_memory_slot *free,
202 struct kvm_memory_slot *dont)
203{
204}
205
206int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages)
207{
208 return 0;
209}
210
211int kvm_arch_prepare_memory_region(struct kvm *kvm,
daf799cc
LT		 212 struct kvm_memory_slot *memslot,
213 struct kvm_userspace_memory_region *mem,
214 enum kvm_mr_change change)
669e846e
SL		 215{
216 return 0;
217}
218
219void kvm_arch_commit_memory_region(struct kvm *kvm,
daf799cc
LT		 220 struct kvm_userspace_memory_region *mem,
221 const struct kvm_memory_slot *old,
222 enum kvm_mr_change change)
669e846e
SL		 223{
224 unsigned long npages = 0;
225 int i, err = 0;
226
227 kvm_debug("%s: kvm: %p slot: %d, GPA: %llx, size: %llx, QVA: %llx\n",
228 __func__, kvm, mem->slot, mem->guest_phys_addr,
229 mem->memory_size, mem->userspace_addr);
230
231 /* Setup Guest PMAP table */
232 if (!kvm->arch.guest_pmap) {
233 if (mem->slot == 0)
234 npages = mem->memory_size >> PAGE_SHIFT;
235
236 if (npages) {
237 kvm->arch.guest_pmap_npages = npages;
238 kvm->arch.guest_pmap =
239 kzalloc(npages * sizeof(unsigned long), GFP_KERNEL);
240
241 if (!kvm->arch.guest_pmap) {
242 kvm_err("Failed to allocate guest PMAP");
243 err = -ENOMEM;
244 goto out;
245 }
246
247 kvm_info
248 ("Allocated space for Guest PMAP Table (%ld pages) @ %p\n",
249 npages, kvm->arch.guest_pmap);
250
251 /* Now setup the page table */
252 for (i = 0; i < npages; i++) {
253 kvm->arch.guest_pmap[i] = KVM_INVALID_PAGE;
254 }
255 }
256 }
257out:
258 return;
259}
260
261void kvm_arch_flush_shadow_all(struct kvm *kvm)
262{
263}
264
265void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
266 struct kvm_memory_slot *slot)
267{
268}
269
270void kvm_arch_flush_shadow(struct kvm *kvm)
271{
272}
273
274struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id)
275{
276 extern char mips32_exception[], mips32_exceptionEnd[];
277 extern char mips32_GuestException[], mips32_GuestExceptionEnd[];
278 int err, size, offset;
279 void *gebase;
280 int i;
281
282 struct kvm_vcpu *vcpu = kzalloc(sizeof(struct kvm_vcpu), GFP_KERNEL);
283
284 if (!vcpu) {
285 err = -ENOMEM;
286 goto out;
287 }
288
289 err = kvm_vcpu_init(vcpu, kvm, id);
290
291 if (err)
292 goto out_free_cpu;
293
294 kvm_info("kvm @ %p: create cpu %d at %p\n", kvm, id, vcpu);
295
296 /* Allocate space for host mode exception handlers that handle
297 * guest mode exits
298 */
299 if (cpu_has_veic || cpu_has_vint) {
300 size = 0x200 + VECTORSPACING * 64;
301 } else {
302 size = 0x200;
303 }
304
305 /* Save Linux EBASE */
306 vcpu->arch.host_ebase = (void *)read_c0_ebase();
307
308 gebase = kzalloc(ALIGN(size, PAGE_SIZE), GFP_KERNEL);
309
310 if (!gebase) {
311 err = -ENOMEM;
312 goto out_free_cpu;
313 }
314 kvm_info("Allocated %d bytes for KVM Exception Handlers @ %p\n",
315 ALIGN(size, PAGE_SIZE), gebase);
316
317 /* Save new ebase */
318 vcpu->arch.guest_ebase = gebase;
319
320 /* Copy L1 Guest Exception handler to correct offset */
321
322 /* TLB Refill, EXL = 0 */
323 memcpy(gebase, mips32_exception,
324 mips32_exceptionEnd - mips32_exception);
325
326 /* General Exception Entry point */
327 memcpy(gebase + 0x180, mips32_exception,
328 mips32_exceptionEnd - mips32_exception);
329
330 /* For vectored interrupts poke the exception code @ all offsets 0-7 */
331 for (i = 0; i < 8; i++) {
332 kvm_debug("L1 Vectored handler @ %p\n",
333 gebase + 0x200 + (i * VECTORSPACING));
334 memcpy(gebase + 0x200 + (i * VECTORSPACING), mips32_exception,
335 mips32_exceptionEnd - mips32_exception);
336 }
337
338 /* General handler, relocate to unmapped space for sanity's sake */
339 offset = 0x2000;
340 kvm_info("Installing KVM Exception handlers @ %p, %#x bytes\n",
341 gebase + offset,
342 mips32_GuestExceptionEnd - mips32_GuestException);
343
344 memcpy(gebase + offset, mips32_GuestException,
345 mips32_GuestExceptionEnd - mips32_GuestException);
346
347 /* Invalidate the icache for these ranges */
348 mips32_SyncICache((unsigned long) gebase, ALIGN(size, PAGE_SIZE));
349
350 /* Allocate comm page for guest kernel, a TLB will be reserved for mapping GVA @ 0xFFFF8000 to this page */
351 vcpu->arch.kseg0_commpage = kzalloc(PAGE_SIZE << 1, GFP_KERNEL);
352
353 if (!vcpu->arch.kseg0_commpage) {
354 err = -ENOMEM;
355 goto out_free_gebase;
356 }
357
358 kvm_info("Allocated COMM page @ %p\n", vcpu->arch.kseg0_commpage);
359 kvm_mips_commpage_init(vcpu);
360
361 /* Init */
362 vcpu->arch.last_sched_cpu = -1;
363
364 /* Start off the timer */
365 kvm_mips_emulate_count(vcpu);
366
367 return vcpu;
368
369out_free_gebase:
370 kfree(gebase);
371
372out_free_cpu:
373 kfree(vcpu);
374
375out:
376 return ERR_PTR(err);
377}
378
379void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
380{
381 hrtimer_cancel(&vcpu->arch.comparecount_timer);
382
383 kvm_vcpu_uninit(vcpu);
384
385 kvm_mips_dump_stats(vcpu);
386
387 if (vcpu->arch.guest_ebase)
388 kfree(vcpu->arch.guest_ebase);
389
390 if (vcpu->arch.kseg0_commpage)
391 kfree(vcpu->arch.kseg0_commpage);
392
393}
394
395void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
396{
397 kvm_arch_vcpu_free(vcpu);
398}
399
400int
401kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
402 struct kvm_guest_debug *dbg)
403{
ed829857 404 return -ENOIOCTLCMD;
669e846e
SL		 405}
406
407int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
408{
409 int r = 0;
410 sigset_t sigsaved;
411
412 if (vcpu->sigset_active)
413 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
414
415 if (vcpu->mmio_needed) {
416 if (!vcpu->mmio_is_write)
417 kvm_mips_complete_mmio_load(vcpu, run);
418 vcpu->mmio_needed = 0;
419 }
420
421 /* Check if we have any exceptions/interrupts pending */
422 kvm_mips_deliver_interrupts(vcpu,
423 kvm_read_c0_guest_cause(vcpu->arch.cop0));
424
425 local_irq_disable();
426 kvm_guest_enter();
427
428 r = __kvm_mips_vcpu_run(run, vcpu);
429
430 kvm_guest_exit();
431 local_irq_enable();
432
433 if (vcpu->sigset_active)
434 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
435
436 return r;
437}
438
439int
440kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_mips_interrupt *irq)
441{
442 int intr = (int)irq->irq;
443 struct kvm_vcpu *dvcpu = NULL;
444
445 if (intr == 3 || intr == -3 || intr == 4 || intr == -4)
446 kvm_debug("%s: CPU: %d, INTR: %d\n", __func__, irq->cpu,
447 (int)intr);
448
449 if (irq->cpu == -1)
450 dvcpu = vcpu;
451 else
452 dvcpu = vcpu->kvm->vcpus[irq->cpu];
453
454 if (intr == 2 || intr == 3 || intr == 4) {
455 kvm_mips_callbacks->queue_io_int(dvcpu, irq);
456
457 } else if (intr == -2 || intr == -3 || intr == -4) {
458 kvm_mips_callbacks->dequeue_io_int(dvcpu, irq);
459 } else {
460 kvm_err("%s: invalid interrupt ioctl (%d:%d)\n", __func__,
461 irq->cpu, irq->irq);
462 return -EINVAL;
463 }
464
465 dvcpu->arch.wait = 0;
466
467 if (waitqueue_active(&dvcpu->wq)) {
468 wake_up_interruptible(&dvcpu->wq);
469 }
470
471 return 0;
472}
473
474int
475kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
476 struct kvm_mp_state *mp_state)
477{
ed829857 478 return -ENOIOCTLCMD;
669e846e
SL		 479}
480
481int
482kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
483 struct kvm_mp_state *mp_state)
484{
ed829857 485 return -ENOIOCTLCMD;
669e846e
SL		 486}
487
681865d4
DD		 488#define MIPS_CP0_32(_R, _S) \
489 (KVM_REG_MIPS | KVM_REG_SIZE_U32 | 0x10000 | (8 * (_R) + (_S)))
490
491#define MIPS_CP0_64(_R, _S) \
492 (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 0x10000 | (8 * (_R) + (_S)))
493
494#define KVM_REG_MIPS_CP0_INDEX MIPS_CP0_32(0, 0)
495#define KVM_REG_MIPS_CP0_ENTRYLO0 MIPS_CP0_64(2, 0)
496#define KVM_REG_MIPS_CP0_ENTRYLO1 MIPS_CP0_64(3, 0)
497#define KVM_REG_MIPS_CP0_CONTEXT MIPS_CP0_64(4, 0)
498#define KVM_REG_MIPS_CP0_USERLOCAL MIPS_CP0_64(4, 2)
499#define KVM_REG_MIPS_CP0_PAGEMASK MIPS_CP0_32(5, 0)
500#define KVM_REG_MIPS_CP0_PAGEGRAIN MIPS_CP0_32(5, 1)
501#define KVM_REG_MIPS_CP0_WIRED MIPS_CP0_32(6, 0)
502#define KVM_REG_MIPS_CP0_HWRENA MIPS_CP0_32(7, 0)
503#define KVM_REG_MIPS_CP0_BADVADDR MIPS_CP0_64(8, 0)
504#define KVM_REG_MIPS_CP0_COUNT MIPS_CP0_32(9, 0)
505#define KVM_REG_MIPS_CP0_ENTRYHI MIPS_CP0_64(10, 0)
506#define KVM_REG_MIPS_CP0_COMPARE MIPS_CP0_32(11, 0)
507#define KVM_REG_MIPS_CP0_STATUS MIPS_CP0_32(12, 0)
508#define KVM_REG_MIPS_CP0_CAUSE MIPS_CP0_32(13, 0)
509#define KVM_REG_MIPS_CP0_EBASE MIPS_CP0_64(15, 1)
510#define KVM_REG_MIPS_CP0_CONFIG MIPS_CP0_32(16, 0)
511#define KVM_REG_MIPS_CP0_CONFIG1 MIPS_CP0_32(16, 1)
512#define KVM_REG_MIPS_CP0_CONFIG2 MIPS_CP0_32(16, 2)
513#define KVM_REG_MIPS_CP0_CONFIG3 MIPS_CP0_32(16, 3)
514#define KVM_REG_MIPS_CP0_CONFIG7 MIPS_CP0_32(16, 7)
515#define KVM_REG_MIPS_CP0_XCONTEXT MIPS_CP0_64(20, 0)
516#define KVM_REG_MIPS_CP0_ERROREPC MIPS_CP0_64(30, 0)
4c73fb2b
DD		 517
518static u64 kvm_mips_get_one_regs[] = {
519 KVM_REG_MIPS_R0,
520 KVM_REG_MIPS_R1,
521 KVM_REG_MIPS_R2,
522 KVM_REG_MIPS_R3,
523 KVM_REG_MIPS_R4,
524 KVM_REG_MIPS_R5,
525 KVM_REG_MIPS_R6,
526 KVM_REG_MIPS_R7,
527 KVM_REG_MIPS_R8,
528 KVM_REG_MIPS_R9,
529 KVM_REG_MIPS_R10,
530 KVM_REG_MIPS_R11,
531 KVM_REG_MIPS_R12,
532 KVM_REG_MIPS_R13,
533 KVM_REG_MIPS_R14,
534 KVM_REG_MIPS_R15,
535 KVM_REG_MIPS_R16,
536 KVM_REG_MIPS_R17,
537 KVM_REG_MIPS_R18,
538 KVM_REG_MIPS_R19,
539 KVM_REG_MIPS_R20,
540 KVM_REG_MIPS_R21,
541 KVM_REG_MIPS_R22,
542 KVM_REG_MIPS_R23,
543 KVM_REG_MIPS_R24,
544 KVM_REG_MIPS_R25,
545 KVM_REG_MIPS_R26,
546 KVM_REG_MIPS_R27,
547 KVM_REG_MIPS_R28,
548 KVM_REG_MIPS_R29,
549 KVM_REG_MIPS_R30,
550 KVM_REG_MIPS_R31,
551
552 KVM_REG_MIPS_HI,
553 KVM_REG_MIPS_LO,
554 KVM_REG_MIPS_PC,
555
556 KVM_REG_MIPS_CP0_INDEX,
557 KVM_REG_MIPS_CP0_CONTEXT,
558 KVM_REG_MIPS_CP0_PAGEMASK,
559 KVM_REG_MIPS_CP0_WIRED,
560 KVM_REG_MIPS_CP0_BADVADDR,
561 KVM_REG_MIPS_CP0_ENTRYHI,
562 KVM_REG_MIPS_CP0_STATUS,
563 KVM_REG_MIPS_CP0_CAUSE,
564 /* EPC set via kvm_regs, et al. */
565 KVM_REG_MIPS_CP0_CONFIG,
566 KVM_REG_MIPS_CP0_CONFIG1,
567 KVM_REG_MIPS_CP0_CONFIG2,
568 KVM_REG_MIPS_CP0_CONFIG3,
569 KVM_REG_MIPS_CP0_CONFIG7,
570 KVM_REG_MIPS_CP0_ERROREPC
571};
572
573static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,
574 const struct kvm_one_reg *reg)
575{
4c73fb2b
DD		 576 struct mips_coproc *cop0 = vcpu->arch.cop0;
577 s64 v;
578
579 switch (reg->id) {
580 case KVM_REG_MIPS_R0 ... KVM_REG_MIPS_R31:
581 v = (long)vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0];
582 break;
583 case KVM_REG_MIPS_HI:
584 v = (long)vcpu->arch.hi;
585 break;
586 case KVM_REG_MIPS_LO:
587 v = (long)vcpu->arch.lo;
588 break;
589 case KVM_REG_MIPS_PC:
590 v = (long)vcpu->arch.pc;
591 break;
592
593 case KVM_REG_MIPS_CP0_INDEX:
594 v = (long)kvm_read_c0_guest_index(cop0);
595 break;
596 case KVM_REG_MIPS_CP0_CONTEXT:
597 v = (long)kvm_read_c0_guest_context(cop0);
598 break;
599 case KVM_REG_MIPS_CP0_PAGEMASK:
600 v = (long)kvm_read_c0_guest_pagemask(cop0);
601 break;
602 case KVM_REG_MIPS_CP0_WIRED:
603 v = (long)kvm_read_c0_guest_wired(cop0);
604 break;
605 case KVM_REG_MIPS_CP0_BADVADDR:
606 v = (long)kvm_read_c0_guest_badvaddr(cop0);
607 break;
608 case KVM_REG_MIPS_CP0_ENTRYHI:
609 v = (long)kvm_read_c0_guest_entryhi(cop0);
610 break;
611 case KVM_REG_MIPS_CP0_STATUS:
612 v = (long)kvm_read_c0_guest_status(cop0);
613 break;
614 case KVM_REG_MIPS_CP0_CAUSE:
615 v = (long)kvm_read_c0_guest_cause(cop0);
616 break;
617 case KVM_REG_MIPS_CP0_ERROREPC:
618 v = (long)kvm_read_c0_guest_errorepc(cop0);
619 break;
620 case KVM_REG_MIPS_CP0_CONFIG:
621 v = (long)kvm_read_c0_guest_config(cop0);
622 break;
623 case KVM_REG_MIPS_CP0_CONFIG1:
624 v = (long)kvm_read_c0_guest_config1(cop0);
625 break;
626 case KVM_REG_MIPS_CP0_CONFIG2:
627 v = (long)kvm_read_c0_guest_config2(cop0);
628 break;
629 case KVM_REG_MIPS_CP0_CONFIG3:
630 v = (long)kvm_read_c0_guest_config3(cop0);
631 break;
632 case KVM_REG_MIPS_CP0_CONFIG7:
633 v = (long)kvm_read_c0_guest_config7(cop0);
634 break;
635 default:
636 return -EINVAL;
637 }
681865d4
DD		 638 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
639 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
640 return put_user(v, uaddr64);
641 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
642 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
643 u32 v32 = (u32)v;
644 return put_user(v32, uaddr32);
645 } else {
646 return -EINVAL;
647 }
4c73fb2b
DD		 648}
649
650static int kvm_mips_set_reg(struct kvm_vcpu *vcpu,
651 const struct kvm_one_reg *reg)
652{
4c73fb2b
DD		 653 struct mips_coproc *cop0 = vcpu->arch.cop0;
654 u64 v;
655
681865d4
DD		 656 if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64) {
657 u64 __user *uaddr64 = (u64 __user *)(long)reg->addr;
658
659 if (get_user(v, uaddr64) != 0)
660 return -EFAULT;
661 } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32) {
662 u32 __user *uaddr32 = (u32 __user *)(long)reg->addr;
663 s32 v32;
664
665 if (get_user(v32, uaddr32) != 0)
666 return -EFAULT;
667 v = (s64)v32;
668 } else {
669 return -EINVAL;
670 }
4c73fb2b
DD		 671
672 switch (reg->id) {
673 case KVM_REG_MIPS_R0:
674 /* Silently ignore requests to set $0 */
675 break;
676 case KVM_REG_MIPS_R1 ... KVM_REG_MIPS_R31:
677 vcpu->arch.gprs[reg->id - KVM_REG_MIPS_R0] = v;
678 break;
679 case KVM_REG_MIPS_HI:
680 vcpu->arch.hi = v;
681 break;
682 case KVM_REG_MIPS_LO:
683 vcpu->arch.lo = v;
684 break;
685 case KVM_REG_MIPS_PC:
686 vcpu->arch.pc = v;
687 break;
688
689 case KVM_REG_MIPS_CP0_INDEX:
690 kvm_write_c0_guest_index(cop0, v);
691 break;
692 case KVM_REG_MIPS_CP0_CONTEXT:
693 kvm_write_c0_guest_context(cop0, v);
694 break;
695 case KVM_REG_MIPS_CP0_PAGEMASK:
696 kvm_write_c0_guest_pagemask(cop0, v);
697 break;
698 case KVM_REG_MIPS_CP0_WIRED:
699 kvm_write_c0_guest_wired(cop0, v);
700 break;
701 case KVM_REG_MIPS_CP0_BADVADDR:
702 kvm_write_c0_guest_badvaddr(cop0, v);
703 break;
704 case KVM_REG_MIPS_CP0_ENTRYHI:
705 kvm_write_c0_guest_entryhi(cop0, v);
706 break;
707 case KVM_REG_MIPS_CP0_STATUS:
708 kvm_write_c0_guest_status(cop0, v);
709 break;
710 case KVM_REG_MIPS_CP0_CAUSE:
711 kvm_write_c0_guest_cause(cop0, v);
712 break;
713 case KVM_REG_MIPS_CP0_ERROREPC:
714 kvm_write_c0_guest_errorepc(cop0, v);
715 break;
716 default:
717 return -EINVAL;
718 }
719 return 0;
720}
721
669e846e
SL		 722long
723kvm_arch_vcpu_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
724{
725 struct kvm_vcpu *vcpu = filp->private_data;
726 void __user *argp = (void __user *)arg;
727 long r;
669e846e
SL		 728
729 switch (ioctl) {
4c73fb2b
DD		 730 case KVM_SET_ONE_REG:
731 case KVM_GET_ONE_REG: {
732 struct kvm_one_reg reg;
733 if (copy_from_user(&reg, argp, sizeof(reg)))
734 return -EFAULT;
735 if (ioctl == KVM_SET_ONE_REG)
736 return kvm_mips_set_reg(vcpu, &reg);
737 else
738 return kvm_mips_get_reg(vcpu, &reg);
739 }
740 case KVM_GET_REG_LIST: {
741 struct kvm_reg_list __user *user_list = argp;
742 u64 __user *reg_dest;
743 struct kvm_reg_list reg_list;
744 unsigned n;
745
746 if (copy_from_user(&reg_list, user_list, sizeof(reg_list)))
747 return -EFAULT;
748 n = reg_list.n;
749 reg_list.n = ARRAY_SIZE(kvm_mips_get_one_regs);
750 if (copy_to_user(user_list, &reg_list, sizeof(reg_list)))
751 return -EFAULT;
752 if (n < reg_list.n)
753 return -E2BIG;
754 reg_dest = user_list->reg;
755 if (copy_to_user(reg_dest, kvm_mips_get_one_regs,
756 sizeof(kvm_mips_get_one_regs)))
757 return -EFAULT;
758 return 0;
759 }
669e846e
SL		 760 case KVM_NMI:
761 /* Treat the NMI as a CPU reset */
762 r = kvm_mips_reset_vcpu(vcpu);
763 break;
764 case KVM_INTERRUPT:
765 {
766 struct kvm_mips_interrupt irq;
767 r = -EFAULT;
768 if (copy_from_user(&irq, argp, sizeof(irq)))
769 goto out;
770
669e846e
SL		 771 kvm_debug("[%d] %s: irq: %d\n", vcpu->vcpu_id, __func__,
772 irq.irq);
773
774 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
775 break;
776 }
777 default:
4c73fb2b 778 r = -ENOIOCTLCMD;
669e846e
SL		 779 }
780
781out:
782 return r;
783}
784
785/*
786 * Get (and clear) the dirty memory log for a memory slot.
787 */
788int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
789{
790 struct kvm_memory_slot *memslot;
791 unsigned long ga, ga_end;
792 int is_dirty = 0;
793 int r;
794 unsigned long n;
795
796 mutex_lock(&kvm->slots_lock);
797
798 r = kvm_get_dirty_log(kvm, log, &is_dirty);
799 if (r)
800 goto out;
801
802 /* If nothing is dirty, don't bother messing with page tables. */
803 if (is_dirty) {
804 memslot = &kvm->memslots->memslots[log->slot];
805
806 ga = memslot->base_gfn << PAGE_SHIFT;
807 ga_end = ga + (memslot->npages << PAGE_SHIFT);
808
809 printk("%s: dirty, ga: %#lx, ga_end %#lx\n", __func__, ga,
810 ga_end);
811
812 n = kvm_dirty_bitmap_bytes(memslot);
813 memset(memslot->dirty_bitmap, 0, n);
814 }
815
816 r = 0;
817out:
818 mutex_unlock(&kvm->slots_lock);
819 return r;
820
821}
822
823long kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg)
824{
825 long r;
826
827 switch (ioctl) {
828 default:
ed829857 829 r = -ENOIOCTLCMD;
669e846e
SL		 830 }
831
832 return r;
833}
834
835int kvm_arch_init(void *opaque)
836{
837 int ret;
838
839 if (kvm_mips_callbacks) {
840 kvm_err("kvm: module already exists\n");
841 return -EEXIST;
842 }
843
844 ret = kvm_mips_emulation_init(&kvm_mips_callbacks);
845
846 return ret;
847}
848
849void kvm_arch_exit(void)
850{
851 kvm_mips_callbacks = NULL;
852}
853
854int
855kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
856{
ed829857 857 return -ENOIOCTLCMD;
669e846e
SL		 858}
859
860int
861kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
862{
ed829857 863 return -ENOIOCTLCMD;
669e846e
SL		 864}
865
866int kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
867{
868 return 0;
869}
870
871int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
872{
ed829857 873 return -ENOIOCTLCMD;
669e846e
SL		 874}
875
876int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
877{
ed829857 878 return -ENOIOCTLCMD;
669e846e
SL		 879}
880
881int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
882{
883 return VM_FAULT_SIGBUS;
884}
885
886int kvm_dev_ioctl_check_extension(long ext)
887{
888 int r;
889
890 switch (ext) {
4c73fb2b
DD		 891 case KVM_CAP_ONE_REG:
892 r = 1;
893 break;
669e846e
SL		 894 case KVM_CAP_COALESCED_MMIO:
895 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
896 break;
897 default:
898 r = 0;
899 break;
900 }
901 return r;
669e846e
SL		 902}
903
904int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
905{
906 return kvm_mips_pending_timer(vcpu);
907}
908
909int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu)
910{
911 int i;
912 struct mips_coproc *cop0;
913
914 if (!vcpu)
915 return -1;
916
917 printk("VCPU Register Dump:\n");
918 printk("\tpc = 0x%08lx\n", vcpu->arch.pc);;
919 printk("\texceptions: %08lx\n", vcpu->arch.pending_exceptions);
920
921 for (i = 0; i < 32; i += 4) {
922 printk("\tgpr%02d: %08lx %08lx %08lx %08lx\n", i,
923 vcpu->arch.gprs[i],
924 vcpu->arch.gprs[i + 1],
925 vcpu->arch.gprs[i + 2], vcpu->arch.gprs[i + 3]);
926 }
927 printk("\thi: 0x%08lx\n", vcpu->arch.hi);
928 printk("\tlo: 0x%08lx\n", vcpu->arch.lo);
929
930 cop0 = vcpu->arch.cop0;
931 printk("\tStatus: 0x%08lx, Cause: 0x%08lx\n",
932 kvm_read_c0_guest_status(cop0), kvm_read_c0_guest_cause(cop0));
933
934 printk("\tEPC: 0x%08lx\n", kvm_read_c0_guest_epc(cop0));
935
936 return 0;
937}
938
939int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
940{
941 int i;
942
8d17dd04 943 for (i = 1; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
bf32ebf6 944 vcpu->arch.gprs[i] = regs->gpr[i];
8d17dd04 945 vcpu->arch.gprs[0] = 0; /* zero is special, and cannot be set. */
669e846e
SL		 946 vcpu->arch.hi = regs->hi;
947 vcpu->arch.lo = regs->lo;
948 vcpu->arch.pc = regs->pc;
949
4c73fb2b 950 return 0;
669e846e
SL		 951}
952
953int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
954{
955 int i;
956
8d17dd04 957 for (i = 0; i < ARRAY_SIZE(vcpu->arch.gprs); i++)
bf32ebf6 958 regs->gpr[i] = vcpu->arch.gprs[i];
669e846e
SL		 959
960 regs->hi = vcpu->arch.hi;
961 regs->lo = vcpu->arch.lo;
962 regs->pc = vcpu->arch.pc;
963
4c73fb2b 964 return 0;
669e846e
SL		 965}
966
967void kvm_mips_comparecount_func(unsigned long data)
968{
969 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
970
971 kvm_mips_callbacks->queue_timer_int(vcpu);
972
973 vcpu->arch.wait = 0;
974 if (waitqueue_active(&vcpu->wq)) {
975 wake_up_interruptible(&vcpu->wq);
976 }
977}
978
979/*
980 * low level hrtimer wake routine.
981 */
982enum hrtimer_restart kvm_mips_comparecount_wakeup(struct hrtimer *timer)
983{
984 struct kvm_vcpu *vcpu;
985
986 vcpu = container_of(timer, struct kvm_vcpu, arch.comparecount_timer);
987 kvm_mips_comparecount_func((unsigned long) vcpu);
988 hrtimer_forward_now(&vcpu->arch.comparecount_timer,
989 ktime_set(0, MS_TO_NS(10)));
990 return HRTIMER_RESTART;
991}
992
993int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
994{
995 kvm_mips_callbacks->vcpu_init(vcpu);
996 hrtimer_init(&vcpu->arch.comparecount_timer, CLOCK_MONOTONIC,
997 HRTIMER_MODE_REL);
998 vcpu->arch.comparecount_timer.function = kvm_mips_comparecount_wakeup;
999 kvm_mips_init_shadow_tlb(vcpu);
1000 return 0;
1001}
1002
1003void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
1004{
1005 return;
1006}
1007
1008int
1009kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, struct kvm_translation *tr)
1010{
1011 return 0;
1012}
1013
1014/* Initial guest state */
1015int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1016{
1017 return kvm_mips_callbacks->vcpu_setup(vcpu);
1018}
1019
1020static
1021void kvm_mips_set_c0_status(void)
1022{
1023 uint32_t status = read_c0_status();
1024
1025 if (cpu_has_fpu)
1026 status |= (ST0_CU1);
1027
1028 if (cpu_has_dsp)
1029 status |= (ST0_MX);
1030
1031 write_c0_status(status);
1032 ehb();
1033}
1034
1035/*
1036 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
1037 */
1038int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
1039{
1040 uint32_t cause = vcpu->arch.host_cp0_cause;
1041 uint32_t exccode = (cause >> CAUSEB_EXCCODE) & 0x1f;
1042 uint32_t __user *opc = (uint32_t __user *) vcpu->arch.pc;
1043 unsigned long badvaddr = vcpu->arch.host_cp0_badvaddr;
1044 enum emulation_result er = EMULATE_DONE;
1045 int ret = RESUME_GUEST;
1046
1047 /* Set a default exit reason */
1048 run->exit_reason = KVM_EXIT_UNKNOWN;
1049 run->ready_for_interrupt_injection = 1;
1050
1051 /* Set the appropriate status bits based on host CPU features, before we hit the scheduler */
1052 kvm_mips_set_c0_status();
1053
1054 local_irq_enable();
1055
1056 kvm_debug("kvm_mips_handle_exit: cause: %#x, PC: %p, kvm_run: %p, kvm_vcpu: %p\n",
1057 cause, opc, run, vcpu);
1058
1059 /* Do a privilege check, if in UM most of these exit conditions end up
1060 * causing an exception to be delivered to the Guest Kernel
1061 */
1062 er = kvm_mips_check_privilege(cause, opc, run, vcpu);
1063 if (er == EMULATE_PRIV_FAIL) {
1064 goto skip_emul;
1065 } else if (er == EMULATE_FAIL) {
1066 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1067 ret = RESUME_HOST;
1068 goto skip_emul;
1069 }
1070
1071 switch (exccode) {
1072 case T_INT:
1073 kvm_debug("[%d]T_INT @ %p\n", vcpu->vcpu_id, opc);
1074
1075 ++vcpu->stat.int_exits;
1076 trace_kvm_exit(vcpu, INT_EXITS);
1077
1078 if (need_resched()) {
1079 cond_resched();
1080 }
1081
1082 ret = RESUME_GUEST;
1083 break;
1084
1085 case T_COP_UNUSABLE:
1086 kvm_debug("T_COP_UNUSABLE: @ PC: %p\n", opc);
1087
1088 ++vcpu->stat.cop_unusable_exits;
1089 trace_kvm_exit(vcpu, COP_UNUSABLE_EXITS);
1090 ret = kvm_mips_callbacks->handle_cop_unusable(vcpu);
1091 /* XXXKYMA: Might need to return to user space */
1092 if (run->exit_reason == KVM_EXIT_IRQ_WINDOW_OPEN) {
1093 ret = RESUME_HOST;
1094 }
1095 break;
1096
1097 case T_TLB_MOD:
1098 ++vcpu->stat.tlbmod_exits;
1099 trace_kvm_exit(vcpu, TLBMOD_EXITS);
1100 ret = kvm_mips_callbacks->handle_tlb_mod(vcpu);
1101 break;
1102
1103 case T_TLB_ST_MISS:
1104 kvm_debug
1105 ("TLB ST fault: cause %#x, status %#lx, PC: %p, BadVaddr: %#lx\n",
1106 cause, kvm_read_c0_guest_status(vcpu->arch.cop0), opc,
1107 badvaddr);
1108
1109 ++vcpu->stat.tlbmiss_st_exits;
1110 trace_kvm_exit(vcpu, TLBMISS_ST_EXITS);
1111 ret = kvm_mips_callbacks->handle_tlb_st_miss(vcpu);
1112 break;
1113
1114 case T_TLB_LD_MISS:
1115 kvm_debug("TLB LD fault: cause %#x, PC: %p, BadVaddr: %#lx\n",
1116 cause, opc, badvaddr);
1117
1118 ++vcpu->stat.tlbmiss_ld_exits;
1119 trace_kvm_exit(vcpu, TLBMISS_LD_EXITS);
1120 ret = kvm_mips_callbacks->handle_tlb_ld_miss(vcpu);
1121 break;
1122
1123 case T_ADDR_ERR_ST:
1124 ++vcpu->stat.addrerr_st_exits;
1125 trace_kvm_exit(vcpu, ADDRERR_ST_EXITS);
1126 ret = kvm_mips_callbacks->handle_addr_err_st(vcpu);
1127 break;
1128
1129 case T_ADDR_ERR_LD:
1130 ++vcpu->stat.addrerr_ld_exits;
1131 trace_kvm_exit(vcpu, ADDRERR_LD_EXITS);
1132 ret = kvm_mips_callbacks->handle_addr_err_ld(vcpu);
1133 break;
1134
1135 case T_SYSCALL:
1136 ++vcpu->stat.syscall_exits;
1137 trace_kvm_exit(vcpu, SYSCALL_EXITS);
1138 ret = kvm_mips_callbacks->handle_syscall(vcpu);
1139 break;
1140
1141 case T_RES_INST:
1142 ++vcpu->stat.resvd_inst_exits;
1143 trace_kvm_exit(vcpu, RESVD_INST_EXITS);
1144 ret = kvm_mips_callbacks->handle_res_inst(vcpu);
1145 break;
1146
1147 case T_BREAK:
1148 ++vcpu->stat.break_inst_exits;
1149 trace_kvm_exit(vcpu, BREAK_INST_EXITS);
1150 ret = kvm_mips_callbacks->handle_break(vcpu);
1151 break;
1152
1153 default:
1154 kvm_err
1155 ("Exception Code: %d, not yet handled, @ PC: %p, inst: 0x%08x BadVaddr: %#lx Status: %#lx\n",
1156 exccode, opc, kvm_get_inst(opc, vcpu), badvaddr,
1157 kvm_read_c0_guest_status(vcpu->arch.cop0));
1158 kvm_arch_vcpu_dump_regs(vcpu);
1159 run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1160 ret = RESUME_HOST;
1161 break;
1162
1163 }
1164
1165skip_emul:
1166 local_irq_disable();
1167
1168 if (er == EMULATE_DONE && !(ret & RESUME_HOST))
1169 kvm_mips_deliver_interrupts(vcpu, cause);
1170
1171 if (!(ret & RESUME_HOST)) {
1172 /* Only check for signals if not already exiting to userspace */
1173 if (signal_pending(current)) {
1174 run->exit_reason = KVM_EXIT_INTR;
1175 ret = (-EINTR << 2) | RESUME_HOST;
1176 ++vcpu->stat.signal_exits;
1177 trace_kvm_exit(vcpu, SIGNAL_EXITS);
1178 }
1179 }
1180
1181 return ret;
1182}
1183
1184int __init kvm_mips_init(void)
1185{
1186 int ret;
1187
1188 ret = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1189
1190 if (ret)
1191 return ret;
1192
1193 /* On MIPS, kernel modules are executed from "mapped space", which requires TLBs.
1194 * The TLB handling code is statically linked with the rest of the kernel (kvm_tlb.c)
1195 * to avoid the possibility of double faulting. The issue is that the TLB code
1196 * references routines that are part of the the KVM module,
1197 * which are only available once the module is loaded.
1198 */
1199 kvm_mips_gfn_to_pfn = gfn_to_pfn;
1200 kvm_mips_release_pfn_clean = kvm_release_pfn_clean;
1201 kvm_mips_is_error_pfn = is_error_pfn;
1202
1203 pr_info("KVM/MIPS Initialized\n");
1204 return 0;
1205}
1206
1207void __exit kvm_mips_exit(void)
1208{
1209 kvm_exit();
1210
1211 kvm_mips_gfn_to_pfn = NULL;
1212 kvm_mips_release_pfn_clean = NULL;
1213 kvm_mips_is_error_pfn = NULL;
1214
1215 pr_info("KVM/MIPS unloaded\n");
1216}
1217
1218module_init(kvm_mips_init);
1219module_exit(kvm_mips_exit);
1220
1221EXPORT_TRACEPOINT_SYMBOL(kvm_exit);
Linux 6.x block layer and io_uring tree(s)