Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-block.git] / arch / mips / kernel / syscall.c
CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1995, 1996, 1997, 2000, 2001, 05 by Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Copyright (C) 2001 MIPS Technologies, Inc.
9 */
a9415644 10#include <linux/capability.h>
1da177e4
LT
11#include <linux/errno.h>
12#include <linux/linkage.h>
4e950f6f 13#include <linux/fs.h>
1da177e4 14#include <linux/smp.h>
1da177e4 15#include <linux/ptrace.h>
1da177e4
LT
16#include <linux/string.h>
17#include <linux/syscalls.h>
18#include <linux/file.h>
1da177e4
LT
19#include <linux/utsname.h>
20#include <linux/unistd.h>
21#include <linux/sem.h>
22#include <linux/msg.h>
23#include <linux/shm.h>
24#include <linux/compiler.h>
cba4fbbf 25#include <linux/ipc.h>
f1e39a4a 26#include <linux/uaccess.h>
5a0e3ad6 27#include <linux/slab.h>
652b14aa 28#include <linux/elf.h>
68db0cf1 29#include <linux/sched/task_stack.h>
1da177e4 30
f1e39a4a 31#include <asm/asm.h>
4915e1b0 32#include <asm/asm-eva.h>
1da177e4
LT
33#include <asm/branch.h>
34#include <asm/cachectl.h>
35#include <asm/cacheflush.h>
048eb582 36#include <asm/asm-offsets.h>
1da177e4
LT
37#include <asm/signal.h>
38#include <asm/sim.h>
39#include <asm/shmparam.h>
40#include <asm/sysmips.h>
b81947c6 41#include <asm/switch_to.h>
1da177e4 42
8213bbf9
RB
43/*
44 * For historic reasons the pipe(2) syscall on MIPS has an unusual calling
70342287 45 * convention. It returns results in registers $v0 / $v1 which means there
8213bbf9 46 * is no need for it to do verify the validity of a userspace pointer
70342287 47 * argument. Historically that used to be expensive in Linux. These days
8213bbf9
RB
48 * the performance advantage is negligible.
49 */
974fdb3c 50asmlinkage int sysm_pipe(void)
1da177e4
LT
51{
52 int fd[2];
974fdb3c
AV
53 int error = do_pipe_flags(fd, 0);
54 if (error)
55 return error;
56 current_pt_regs()->regs[3] = fd[1];
57 return fd[0];
1da177e4
LT
58}
59
dbda6ac0
RB
60SYSCALL_DEFINE6(mips_mmap, unsigned long, addr, unsigned long, len,
61 unsigned long, prot, unsigned long, flags, unsigned long,
62 fd, off_t, offset)
1da177e4 63{
1da177e4 64 if (offset & ~PAGE_MASK)
c9d3fdf3 65 return -EINVAL;
a90f590a
DB
66 return ksys_mmap_pgoff(addr, len, prot, flags, fd,
67 offset >> PAGE_SHIFT);
1da177e4
LT
68}
69
dbda6ac0
RB
70SYSCALL_DEFINE6(mips_mmap2, unsigned long, addr, unsigned long, len,
71 unsigned long, prot, unsigned long, flags, unsigned long, fd,
72 unsigned long, pgoff)
1da177e4 73{
947df17c
PA
74 if (pgoff & (~PAGE_MASK >> 12))
75 return -EINVAL;
76
a90f590a
DB
77 return ksys_mmap_pgoff(addr, len, prot, flags, fd,
78 pgoff >> (PAGE_SHIFT - 12));
1da177e4
LT
79}
80
81save_static_function(sys_fork);
1da177e4 82save_static_function(sys_clone);
0671c5b8 83save_static_function(sys_clone3);
1da177e4 84
dbda6ac0 85SYSCALL_DEFINE1(set_thread_area, unsigned long, addr)
3c37026d 86{
dc8f6029 87 struct thread_info *ti = task_thread_info(current);
3c37026d
RB
88
89 ti->tp_value = addr;
a3692020
RB
90 if (cpu_has_userlocal)
91 write_c0_userlocal(addr);
06be375b
RB
92
93 return 0;
3c37026d
RB
94}
95
12890d0f 96static inline int mips_atomic_set(unsigned long addr, unsigned long new)
1da177e4 97{
f1e39a4a 98 unsigned long old, tmp;
12890d0f 99 struct pt_regs *regs;
f1e39a4a
RB
100 unsigned int err;
101
102 if (unlikely(addr & 3))
103 return -EINVAL;
104
96d4f267 105 if (unlikely(!access_ok((const void __user *)addr, 4)))
f1e39a4a
RB
106 return -EINVAL;
107
108 if (cpu_has_llsc && R10000_LLSC_WAR) {
109 __asm__ __volatile__ (
378ed6f0 110 " .set push \n"
a809d460 111 " .set arch=r4000 \n"
f1e39a4a
RB
112 " li %[err], 0 \n"
113 "1: ll %[old], (%[addr]) \n"
114 " move %[tmp], %[new] \n"
115 "2: sc %[tmp], (%[addr]) \n"
116 " beqzl %[tmp], 1b \n"
117 "3: \n"
0e525e48 118 " .insn \n"
f1e39a4a
RB
119 " .section .fixup,\"ax\" \n"
120 "4: li %[err], %[efault] \n"
121 " j 3b \n"
122 " .previous \n"
123 " .section __ex_table,\"a\" \n"
124 " "STR(PTR)" 1b, 4b \n"
125 " "STR(PTR)" 2b, 4b \n"
126 " .previous \n"
378ed6f0 127 " .set pop \n"
f1e39a4a
RB
128 : [old] "=&r" (old),
129 [err] "=&r" (err),
130 [tmp] "=&r" (tmp)
131 : [addr] "r" (addr),
132 [new] "r" (new),
133 [efault] "i" (-EFAULT)
134 : "memory");
135 } else if (cpu_has_llsc) {
1c6c1ca3 136 loongson_llsc_mb();
f1e39a4a 137 __asm__ __volatile__ (
378ed6f0 138 " .set push \n"
fee313d4 139 " .set "MIPS_ISA_ARCH_LEVEL" \n"
f1e39a4a 140 " li %[err], 0 \n"
4915e1b0
JH
141 "1: \n"
142 user_ll("%[old]", "(%[addr])")
f1e39a4a 143 " move %[tmp], %[new] \n"
4915e1b0
JH
144 "2: \n"
145 user_sc("%[tmp]", "(%[addr])")
203e090a 146 " beqz %[tmp], 1b \n"
f1e39a4a 147 "3: \n"
0e525e48 148 " .insn \n"
f1e39a4a
RB
149 " .section .fixup,\"ax\" \n"
150 "5: li %[err], %[efault] \n"
151 " j 3b \n"
152 " .previous \n"
153 " .section __ex_table,\"a\" \n"
154 " "STR(PTR)" 1b, 5b \n"
155 " "STR(PTR)" 2b, 5b \n"
156 " .previous \n"
378ed6f0 157 " .set pop \n"
f1e39a4a
RB
158 : [old] "=&r" (old),
159 [err] "=&r" (err),
160 [tmp] "=&r" (tmp)
161 : [addr] "r" (addr),
162 [new] "r" (new),
163 [efault] "i" (-EFAULT)
164 : "memory");
165 } else {
166 do {
167 preempt_disable();
168 ll_bit = 1;
169 ll_task = current;
170 preempt_enable();
171
172 err = __get_user(old, (unsigned int *) addr);
173 err |= __put_user(new, (unsigned int *) addr);
174 if (err)
175 break;
176 rmb();
177 } while (!ll_bit);
178 }
179
180 if (unlikely(err))
181 return err;
182
12890d0f 183 regs = current_pt_regs();
f1e39a4a
RB
184 regs->regs[2] = old;
185 regs->regs[7] = 0; /* No error */
186
187 /*
188 * Don't let your children do this ...
189 */
190 __asm__ __volatile__(
191 " move $29, %0 \n"
192 " j syscall_exit \n"
193 : /* no outputs */
194 : "r" (regs));
195
196 /* unreached. Honestly. */
f2ace931 197 unreachable();
f1e39a4a
RB
198}
199
49955d84
JH
200/*
201 * mips_atomic_set() normally returns directly via syscall_exit potentially
202 * clobbering static registers, so be sure to preserve them.
203 */
204save_static_function(sys_sysmips);
205
12890d0f 206SYSCALL_DEFINE3(sysmips, long, cmd, long, arg1, long, arg2)
f1e39a4a 207{
293c5bd1 208 switch (cmd) {
1da177e4 209 case MIPS_ATOMIC_SET:
12890d0f 210 return mips_atomic_set(arg1, arg2);
1da177e4
LT
211
212 case MIPS_FIXADE:
293c5bd1
RB
213 if (arg1 & ~3)
214 return -EINVAL;
215
216 if (arg1 & 1)
217 set_thread_flag(TIF_FIXADE);
218 else
219 clear_thread_flag(TIF_FIXADE);
220 if (arg1 & 2)
221 set_thread_flag(TIF_LOGADE);
222 else
e56293b1 223 clear_thread_flag(TIF_LOGADE);
293c5bd1 224
1da177e4
LT
225 return 0;
226
227 case FLUSH_CACHE:
228 __flush_cache_all();
229 return 0;
1da177e4
LT
230 }
231
232 return -EINVAL;
233}
234
1da177e4
LT
235/*
236 * No implemented yet ...
237 */
dbda6ac0 238SYSCALL_DEFINE3(cachectl, char *, addr, int, nbytes, int, op)
1da177e4
LT
239{
240 return -ENOSYS;
241}
242
243/*
244 * If we ever come here the user sp is bad. Zap the process right away.
245 * Due to the bad stack signaling wouldn't work.
246 */
247asmlinkage void bad_stack(void)
248{
249 do_exit(SIGSEGV);
250}