MIPS: MT: Remove SMTC support
[linux-2.6-block.git] / arch / mips / kernel / process.c
CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
40ac5d47 7 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
1da177e4
LT
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 * Copyright (C) 2004 Thiemo Seufer
34c2f668 10 * Copyright (C) 2013 Imagination Technologies Ltd.
1da177e4 11 */
1da177e4 12#include <linux/errno.h>
1da177e4 13#include <linux/sched.h>
7bcf7717 14#include <linux/tick.h>
1da177e4
LT
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
cae39d13 19#include <linux/export.h>
1da177e4 20#include <linux/ptrace.h>
1da177e4
LT
21#include <linux/mman.h>
22#include <linux/personality.h>
23#include <linux/sys.h>
24#include <linux/user.h>
1da177e4
LT
25#include <linux/init.h>
26#include <linux/completion.h>
63077519 27#include <linux/kallsyms.h>
94109102 28#include <linux/random.h>
1da177e4 29
94109102 30#include <asm/asm.h>
1da177e4
LT
31#include <asm/bootinfo.h>
32#include <asm/cpu.h>
e50c0a8f 33#include <asm/dsp.h>
1da177e4 34#include <asm/fpu.h>
1db1af84 35#include <asm/msa.h>
1da177e4 36#include <asm/pgtable.h>
1da177e4
LT
37#include <asm/mipsregs.h>
38#include <asm/processor.h>
39#include <asm/uaccess.h>
40#include <asm/io.h>
41#include <asm/elf.h>
42#include <asm/isadep.h>
43#include <asm/inst.h>
1df0f0ff 44#include <asm/stacktrace.h>
1da177e4 45
cdbedc61
TG
46#ifdef CONFIG_HOTPLUG_CPU
47void arch_cpu_idle_dead(void)
1da177e4 48{
cdbedc61
TG
49 /* What the heck is this check doing ? */
50 if (!cpu_isset(smp_processor_id(), cpu_callin_map))
51 play_dead();
52}
53#endif
1b2bc75c 54
1da177e4 55asmlinkage void ret_from_fork(void);
8f54bcac 56asmlinkage void ret_from_kernel_thread(void);
1da177e4
LT
57
58void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
59{
60 unsigned long status;
61
62 /* New thread loses kernel privileges. */
bbaf238b 63 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
1da177e4
LT
64 status |= KU_USER;
65 regs->cp0_status = status;
66 clear_used_math();
e04582b7 67 clear_fpu_owner();
a3056b1c 68 init_dsp();
1db1af84
PB
69 clear_thread_flag(TIF_MSA_CTX_LIVE);
70 disable_msa();
1da177e4
LT
71 regs->cp0_epc = pc;
72 regs->regs[29] = sp;
1da177e4
LT
73}
74
75void exit_thread(void)
76{
77}
78
79void flush_thread(void)
80{
81}
82
6f2c55b8 83int copy_thread(unsigned long clone_flags, unsigned long usp,
afa86fc4 84 unsigned long arg, struct task_struct *p)
1da177e4 85{
75bb07e7 86 struct thread_info *ti = task_thread_info(p);
afa86fc4 87 struct pt_regs *childregs, *regs = current_pt_regs();
484889fc 88 unsigned long childksp;
3c37026d 89 p->set_child_tid = p->clear_child_tid = NULL;
1da177e4 90
75bb07e7 91 childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
1da177e4
LT
92
93 preempt_disable();
94
1db1af84
PB
95 if (is_msa_enabled())
96 save_msa(p);
97 else if (is_fpu_owner())
1da177e4 98 save_fp(p);
e50c0a8f
RB
99
100 if (cpu_has_dsp)
101 save_dsp(p);
1da177e4
LT
102
103 preempt_enable();
104
105 /* set up new TSS. */
106 childregs = (struct pt_regs *) childksp - 1;
484889fc
DD
107 /* Put the stack after the struct pt_regs. */
108 childksp = (unsigned long) childregs;
8f54bcac
AV
109 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
110 if (unlikely(p->flags & PF_KTHREAD)) {
111 unsigned long status = p->thread.cp0_status;
112 memset(childregs, 0, sizeof(struct pt_regs));
113 ti->addr_limit = KERNEL_DS;
114 p->thread.reg16 = usp; /* fn */
115 p->thread.reg17 = arg;
116 p->thread.reg29 = childksp;
117 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
118#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
119 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
120 ((status & (ST0_KUC | ST0_IEC)) << 2);
121#else
122 status |= ST0_EXL;
123#endif
124 childregs->cp0_status = status;
125 return 0;
126 }
1da177e4 127 *childregs = *regs;
70342287
RB
128 childregs->regs[7] = 0; /* Clear error flag */
129 childregs->regs[2] = 0; /* Child gets zero as return value */
64b3122d
AV
130 if (usp)
131 childregs->regs[29] = usp;
8f54bcac 132 ti->addr_limit = USER_DS;
1da177e4 133
1da177e4
LT
134 p->thread.reg29 = (unsigned long) childregs;
135 p->thread.reg31 = (unsigned long) ret_from_fork;
136
137 /*
138 * New tasks lose permission to use the fpu. This accelerates context
139 * switching for most programs since they don't use the fpu.
140 */
1da177e4 141 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
1da177e4 142
1da177e4
LT
143 clear_tsk_thread_flag(p, TIF_USEDFPU);
144
f088fc84 145#ifdef CONFIG_MIPS_MT_FPAFF
6657fe0a 146 clear_tsk_thread_flag(p, TIF_FPUBOUND);
f088fc84
RB
147#endif /* CONFIG_MIPS_MT_FPAFF */
148
3c37026d
RB
149 if (clone_flags & CLONE_SETTLS)
150 ti->tp_value = regs->regs[7];
151
1da177e4
LT
152 return 0;
153}
154
155/* Fill in the fpu structure for a core dump.. */
156int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r)
157{
6cec7c4a
PB
158 int i;
159
160 for (i = 0; i < NUM_FPU_REGS; i++)
161 memcpy(&r[i], &current->thread.fpu.fpr[i], sizeof(*r));
162
163 memcpy(&r[NUM_FPU_REGS], &current->thread.fpu.fcr31,
164 sizeof(current->thread.fpu.fcr31));
1da177e4
LT
165
166 return 1;
167}
168
d56efda4 169void elf_dump_regs(elf_greg_t *gp, struct pt_regs *regs)
1da177e4
LT
170{
171 int i;
172
173 for (i = 0; i < EF_R0; i++)
174 gp[i] = 0;
175 gp[EF_R0] = 0;
176 for (i = 1; i <= 31; i++)
177 gp[EF_R0 + i] = regs->regs[i];
178 gp[EF_R26] = 0;
179 gp[EF_R27] = 0;
180 gp[EF_LO] = regs->lo;
181 gp[EF_HI] = regs->hi;
182 gp[EF_CP0_EPC] = regs->cp0_epc;
183 gp[EF_CP0_BADVADDR] = regs->cp0_badvaddr;
184 gp[EF_CP0_STATUS] = regs->cp0_status;
185 gp[EF_CP0_CAUSE] = regs->cp0_cause;
186#ifdef EF_UNUSED0
187 gp[EF_UNUSED0] = 0;
188#endif
189}
190
49a89efb 191int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
71e0e556 192{
40bc9c67 193 elf_dump_regs(*regs, task_pt_regs(tsk));
71e0e556
RB
194 return 1;
195}
196
49a89efb 197int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpr)
1da177e4 198{
6cec7c4a
PB
199 int i;
200
201 for (i = 0; i < NUM_FPU_REGS; i++)
202 memcpy(&fpr[i], &t->thread.fpu.fpr[i], sizeof(*fpr));
203
204 memcpy(&fpr[NUM_FPU_REGS], &t->thread.fpu.fcr31,
205 sizeof(t->thread.fpu.fcr31));
1da177e4
LT
206
207 return 1;
208}
209
36ecafc5
GF
210#ifdef CONFIG_CC_STACKPROTECTOR
211#include <linux/stackprotector.h>
212unsigned long __stack_chk_guard __read_mostly;
213EXPORT_SYMBOL(__stack_chk_guard);
214#endif
215
b5943182
FBH
216struct mips_frame_info {
217 void *func;
218 unsigned long func_size;
219 int frame_size;
220 int pc_offset;
221};
dc953df1 222
5000653e
TW
223#define J_TARGET(pc,target) \
224 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
225
c0efbb6d
FBH
226static inline int is_ra_save_ins(union mips_instruction *ip)
227{
34c2f668
LY
228#ifdef CONFIG_CPU_MICROMIPS
229 union mips_instruction mmi;
230
231 /*
232 * swsp ra,offset
233 * swm16 reglist,offset(sp)
234 * swm32 reglist,offset(sp)
235 * sw32 ra,offset(sp)
236 * jradiussp - NOT SUPPORTED
237 *
238 * microMIPS is way more fun...
239 */
240 if (mm_insn_16bit(ip->halfword[0])) {
241 mmi.word = (ip->halfword[0] << 16);
242 return ((mmi.mm16_r5_format.opcode == mm_swsp16_op &&
243 mmi.mm16_r5_format.rt == 31) ||
244 (mmi.mm16_m_format.opcode == mm_pool16c_op &&
245 mmi.mm16_m_format.func == mm_swm16_op));
246 }
247 else {
248 mmi.halfword[0] = ip->halfword[1];
249 mmi.halfword[1] = ip->halfword[0];
250 return ((mmi.mm_m_format.opcode == mm_pool32b_op &&
251 mmi.mm_m_format.rd > 9 &&
252 mmi.mm_m_format.base == 29 &&
253 mmi.mm_m_format.func == mm_swm32_func) ||
254 (mmi.i_format.opcode == mm_sw32_op &&
255 mmi.i_format.rs == 29 &&
256 mmi.i_format.rt == 31));
257 }
258#else
c0efbb6d
FBH
259 /* sw / sd $ra, offset($sp) */
260 return (ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
261 ip->i_format.rs == 29 &&
262 ip->i_format.rt == 31;
34c2f668 263#endif
c0efbb6d
FBH
264}
265
e7438c4b 266static inline int is_jump_ins(union mips_instruction *ip)
c0efbb6d 267{
34c2f668
LY
268#ifdef CONFIG_CPU_MICROMIPS
269 /*
270 * jr16,jrc,jalr16,jalr16
271 * jal
272 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
273 * jraddiusp - NOT SUPPORTED
274 *
275 * microMIPS is kind of more fun...
276 */
277 union mips_instruction mmi;
278
279 mmi.word = (ip->halfword[0] << 16);
280
281 if ((mmi.mm16_r5_format.opcode == mm_pool16c_op &&
282 (mmi.mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op) ||
283 ip->j_format.opcode == mm_jal32_op)
284 return 1;
285 if (ip->r_format.opcode != mm_pool32a_op ||
286 ip->r_format.func != mm_pool32axf_op)
287 return 0;
288 return (((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op);
289#else
e7438c4b
TW
290 if (ip->j_format.opcode == j_op)
291 return 1;
c0efbb6d
FBH
292 if (ip->j_format.opcode == jal_op)
293 return 1;
294 if (ip->r_format.opcode != spec_op)
295 return 0;
296 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
34c2f668 297#endif
c0efbb6d
FBH
298}
299
300static inline int is_sp_move_ins(union mips_instruction *ip)
301{
34c2f668
LY
302#ifdef CONFIG_CPU_MICROMIPS
303 /*
304 * addiusp -imm
305 * addius5 sp,-imm
306 * addiu32 sp,sp,-imm
307 * jradiussp - NOT SUPPORTED
308 *
309 * microMIPS is not more fun...
310 */
311 if (mm_insn_16bit(ip->halfword[0])) {
312 union mips_instruction mmi;
313
314 mmi.word = (ip->halfword[0] << 16);
315 return ((mmi.mm16_r3_format.opcode == mm_pool16d_op &&
316 mmi.mm16_r3_format.simmediate && mm_addiusp_func) ||
317 (mmi.mm16_r5_format.opcode == mm_pool16d_op &&
318 mmi.mm16_r5_format.rt == 29));
319 }
320 return (ip->mm_i_format.opcode == mm_addiu32_op &&
321 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29);
322#else
c0efbb6d
FBH
323 /* addiu/daddiu sp,sp,-imm */
324 if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
325 return 0;
326 if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
327 return 1;
34c2f668 328#endif
c0efbb6d
FBH
329 return 0;
330}
331
f66686f7 332static int get_frame_info(struct mips_frame_info *info)
1da177e4 333{
34c2f668
LY
334#ifdef CONFIG_CPU_MICROMIPS
335 union mips_instruction *ip = (void *) (((char *) info->func) - 1);
336#else
c0efbb6d 337 union mips_instruction *ip = info->func;
34c2f668 338#endif
29b376ff
FBH
339 unsigned max_insns = info->func_size / sizeof(union mips_instruction);
340 unsigned i;
c0efbb6d 341
1da177e4 342 info->pc_offset = -1;
63077519 343 info->frame_size = 0;
1da177e4 344
29b376ff
FBH
345 if (!ip)
346 goto err;
347
348 if (max_insns == 0)
349 max_insns = 128U; /* unknown function size */
350 max_insns = min(128U, max_insns);
351
c0efbb6d
FBH
352 for (i = 0; i < max_insns; i++, ip++) {
353
e7438c4b 354 if (is_jump_ins(ip))
63077519 355 break;
0cceb4aa
FBH
356 if (!info->frame_size) {
357 if (is_sp_move_ins(ip))
34c2f668
LY
358 {
359#ifdef CONFIG_CPU_MICROMIPS
360 if (mm_insn_16bit(ip->halfword[0]))
361 {
362 unsigned short tmp;
363
364 if (ip->halfword[0] & mm_addiusp_func)
365 {
366 tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
367 info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
368 } else {
369 tmp = (ip->halfword[0] >> 1);
370 info->frame_size = -(signed short)(tmp & 0xf);
371 }
372 ip = (void *) &ip->halfword[1];
373 ip--;
374 } else
375#endif
0cceb4aa 376 info->frame_size = - ip->i_format.simmediate;
34c2f668 377 }
0cceb4aa 378 continue;
63077519 379 }
0cceb4aa 380 if (info->pc_offset == -1 && is_ra_save_ins(ip)) {
63077519
AN
381 info->pc_offset =
382 ip->i_format.simmediate / sizeof(long);
0cceb4aa 383 break;
1da177e4
LT
384 }
385 }
f66686f7
AN
386 if (info->frame_size && info->pc_offset >= 0) /* nested */
387 return 0;
388 if (info->pc_offset < 0) /* leaf */
389 return 1;
390 /* prologue seems boggus... */
29b376ff 391err:
f66686f7 392 return -1;
1da177e4
LT
393}
394
b5943182
FBH
395static struct mips_frame_info schedule_mfi __read_mostly;
396
5000653e
TW
397#ifdef CONFIG_KALLSYMS
398static unsigned long get___schedule_addr(void)
399{
400 return kallsyms_lookup_name("__schedule");
401}
402#else
403static unsigned long get___schedule_addr(void)
404{
405 union mips_instruction *ip = (void *)schedule;
406 int max_insns = 8;
407 int i;
408
409 for (i = 0; i < max_insns; i++, ip++) {
410 if (ip->j_format.opcode == j_op)
411 return J_TARGET(ip, ip->j_format.target);
412 }
413 return 0;
414}
415#endif
416
1da177e4
LT
417static int __init frame_info_init(void)
418{
b5943182 419 unsigned long size = 0;
63077519 420#ifdef CONFIG_KALLSYMS
b5943182 421 unsigned long ofs;
5000653e
TW
422#endif
423 unsigned long addr;
b5943182 424
5000653e
TW
425 addr = get___schedule_addr();
426 if (!addr)
427 addr = (unsigned long)schedule;
428
429#ifdef CONFIG_KALLSYMS
430 kallsyms_lookup_size_offset(addr, &size, &ofs);
63077519 431#endif
5000653e 432 schedule_mfi.func = (void *)addr;
b5943182
FBH
433 schedule_mfi.func_size = size;
434
435 get_frame_info(&schedule_mfi);
6057a798
FBH
436
437 /*
438 * Without schedule() frame info, result given by
439 * thread_saved_pc() and get_wchan() are not reliable.
440 */
b5943182 441 if (schedule_mfi.pc_offset < 0)
6057a798 442 printk("Can't analyze schedule() prologue at %p\n", schedule);
63077519 443
1da177e4
LT
444 return 0;
445}
446
447arch_initcall(frame_info_init);
448
449/*
450 * Return saved PC of a blocked thread.
451 */
452unsigned long thread_saved_pc(struct task_struct *tsk)
453{
454 struct thread_struct *t = &tsk->thread;
455
456 /* New born processes are a special case */
457 if (t->reg31 == (unsigned long) ret_from_fork)
458 return t->reg31;
b5943182 459 if (schedule_mfi.pc_offset < 0)
1da177e4 460 return 0;
b5943182 461 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
1da177e4
LT
462}
463
1da177e4 464
f66686f7 465#ifdef CONFIG_KALLSYMS
94ea09c6
DK
466/* generic stack unwinding function */
467unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
468 unsigned long *sp,
469 unsigned long pc,
470 unsigned long *ra)
f66686f7 471{
f66686f7 472 struct mips_frame_info info;
f66686f7 473 unsigned long size, ofs;
4d157d5e 474 int leaf;
1924600c
AN
475 extern void ret_from_irq(void);
476 extern void ret_from_exception(void);
f66686f7 477
f66686f7
AN
478 if (!stack_page)
479 return 0;
480
1924600c
AN
481 /*
482 * If we reached the bottom of interrupt context,
483 * return saved pc in pt_regs.
484 */
485 if (pc == (unsigned long)ret_from_irq ||
486 pc == (unsigned long)ret_from_exception) {
487 struct pt_regs *regs;
488 if (*sp >= stack_page &&
489 *sp + sizeof(*regs) <= stack_page + THREAD_SIZE - 32) {
490 regs = (struct pt_regs *)*sp;
491 pc = regs->cp0_epc;
492 if (__kernel_text_address(pc)) {
493 *sp = regs->regs[29];
494 *ra = regs->regs[31];
495 return pc;
496 }
497 }
498 return 0;
499 }
55b74283 500 if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
f66686f7 501 return 0;
1fd69098 502 /*
25985edc 503 * Return ra if an exception occurred at the first instruction
1fd69098 504 */
1924600c
AN
505 if (unlikely(ofs == 0)) {
506 pc = *ra;
507 *ra = 0;
508 return pc;
509 }
f66686f7
AN
510
511 info.func = (void *)(pc - ofs);
512 info.func_size = ofs; /* analyze from start to ofs */
4d157d5e
FBH
513 leaf = get_frame_info(&info);
514 if (leaf < 0)
f66686f7 515 return 0;
4d157d5e
FBH
516
517 if (*sp < stack_page ||
518 *sp + info.frame_size > stack_page + THREAD_SIZE - 32)
f66686f7
AN
519 return 0;
520
4d157d5e
FBH
521 if (leaf)
522 /*
523 * For some extreme cases, get_frame_info() can
524 * consider wrongly a nested function as a leaf
525 * one. In that cases avoid to return always the
526 * same value.
527 */
1924600c 528 pc = pc != *ra ? *ra : 0;
4d157d5e
FBH
529 else
530 pc = ((unsigned long *)(*sp))[info.pc_offset];
531
532 *sp += info.frame_size;
1924600c 533 *ra = 0;
4d157d5e 534 return __kernel_text_address(pc) ? pc : 0;
f66686f7 535}
94ea09c6
DK
536EXPORT_SYMBOL(unwind_stack_by_address);
537
538/* used by show_backtrace() */
539unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
540 unsigned long pc, unsigned long *ra)
541{
542 unsigned long stack_page = (unsigned long)task_stack_page(task);
543 return unwind_stack_by_address(stack_page, sp, pc, ra);
544}
f66686f7 545#endif
b5943182
FBH
546
547/*
548 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
549 */
550unsigned long get_wchan(struct task_struct *task)
551{
552 unsigned long pc = 0;
553#ifdef CONFIG_KALLSYMS
554 unsigned long sp;
1924600c 555 unsigned long ra = 0;
b5943182
FBH
556#endif
557
558 if (!task || task == current || task->state == TASK_RUNNING)
559 goto out;
560 if (!task_stack_page(task))
561 goto out;
562
563 pc = thread_saved_pc(task);
564
565#ifdef CONFIG_KALLSYMS
566 sp = task->thread.reg29 + schedule_mfi.frame_size;
567
568 while (in_sched_functions(pc))
1924600c 569 pc = unwind_stack(task, &sp, pc, &ra);
b5943182
FBH
570#endif
571
572out:
573 return pc;
574}
94109102
FBH
575
576/*
577 * Don't forget that the stack pointer must be aligned on a 8 bytes
578 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
579 */
580unsigned long arch_align_stack(unsigned long sp)
581{
582 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
583 sp -= get_random_int() & ~PAGE_MASK;
584
585 return sp & ALMASK;
586}