MIPS: Detect the MSA ASE
[linux-2.6-block.git] / arch / mips / kernel / process.c
CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
40ac5d47 7 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
1da177e4
LT
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 * Copyright (C) 2004 Thiemo Seufer
34c2f668 10 * Copyright (C) 2013 Imagination Technologies Ltd.
1da177e4 11 */
1da177e4 12#include <linux/errno.h>
1da177e4 13#include <linux/sched.h>
7bcf7717 14#include <linux/tick.h>
1da177e4
LT
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
cae39d13 19#include <linux/export.h>
1da177e4 20#include <linux/ptrace.h>
1da177e4
LT
21#include <linux/mman.h>
22#include <linux/personality.h>
23#include <linux/sys.h>
24#include <linux/user.h>
1da177e4
LT
25#include <linux/init.h>
26#include <linux/completion.h>
63077519 27#include <linux/kallsyms.h>
94109102 28#include <linux/random.h>
1da177e4 29
94109102 30#include <asm/asm.h>
1da177e4
LT
31#include <asm/bootinfo.h>
32#include <asm/cpu.h>
e50c0a8f 33#include <asm/dsp.h>
1da177e4
LT
34#include <asm/fpu.h>
35#include <asm/pgtable.h>
1da177e4
LT
36#include <asm/mipsregs.h>
37#include <asm/processor.h>
38#include <asm/uaccess.h>
39#include <asm/io.h>
40#include <asm/elf.h>
41#include <asm/isadep.h>
42#include <asm/inst.h>
1df0f0ff 43#include <asm/stacktrace.h>
1da177e4 44
cdbedc61
TG
45#ifdef CONFIG_HOTPLUG_CPU
46void arch_cpu_idle_dead(void)
1da177e4 47{
cdbedc61
TG
48 /* What the heck is this check doing ? */
49 if (!cpu_isset(smp_processor_id(), cpu_callin_map))
50 play_dead();
51}
52#endif
1b2bc75c 53
1da177e4 54asmlinkage void ret_from_fork(void);
8f54bcac 55asmlinkage void ret_from_kernel_thread(void);
1da177e4
LT
56
57void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
58{
59 unsigned long status;
60
61 /* New thread loses kernel privileges. */
bbaf238b 62 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
1da177e4
LT
63 status |= KU_USER;
64 regs->cp0_status = status;
65 clear_used_math();
e04582b7 66 clear_fpu_owner();
a3056b1c 67 init_dsp();
1da177e4
LT
68 regs->cp0_epc = pc;
69 regs->regs[29] = sp;
1da177e4
LT
70}
71
72void exit_thread(void)
73{
74}
75
76void flush_thread(void)
77{
78}
79
6f2c55b8 80int copy_thread(unsigned long clone_flags, unsigned long usp,
afa86fc4 81 unsigned long arg, struct task_struct *p)
1da177e4 82{
75bb07e7 83 struct thread_info *ti = task_thread_info(p);
afa86fc4 84 struct pt_regs *childregs, *regs = current_pt_regs();
484889fc 85 unsigned long childksp;
3c37026d 86 p->set_child_tid = p->clear_child_tid = NULL;
1da177e4 87
75bb07e7 88 childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
1da177e4
LT
89
90 preempt_disable();
91
e50c0a8f 92 if (is_fpu_owner())
1da177e4 93 save_fp(p);
e50c0a8f
RB
94
95 if (cpu_has_dsp)
96 save_dsp(p);
1da177e4
LT
97
98 preempt_enable();
99
100 /* set up new TSS. */
101 childregs = (struct pt_regs *) childksp - 1;
484889fc
DD
102 /* Put the stack after the struct pt_regs. */
103 childksp = (unsigned long) childregs;
8f54bcac
AV
104 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
105 if (unlikely(p->flags & PF_KTHREAD)) {
106 unsigned long status = p->thread.cp0_status;
107 memset(childregs, 0, sizeof(struct pt_regs));
108 ti->addr_limit = KERNEL_DS;
109 p->thread.reg16 = usp; /* fn */
110 p->thread.reg17 = arg;
111 p->thread.reg29 = childksp;
112 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
113#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
114 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
115 ((status & (ST0_KUC | ST0_IEC)) << 2);
116#else
117 status |= ST0_EXL;
118#endif
119 childregs->cp0_status = status;
120 return 0;
121 }
1da177e4 122 *childregs = *regs;
70342287
RB
123 childregs->regs[7] = 0; /* Clear error flag */
124 childregs->regs[2] = 0; /* Child gets zero as return value */
64b3122d
AV
125 if (usp)
126 childregs->regs[29] = usp;
8f54bcac 127 ti->addr_limit = USER_DS;
1da177e4 128
1da177e4
LT
129 p->thread.reg29 = (unsigned long) childregs;
130 p->thread.reg31 = (unsigned long) ret_from_fork;
131
132 /*
133 * New tasks lose permission to use the fpu. This accelerates context
134 * switching for most programs since they don't use the fpu.
135 */
1da177e4 136 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
1da177e4 137
9cc12363 138#ifdef CONFIG_MIPS_MT_SMTC
f088fc84 139 /*
9cc12363
KK
140 * SMTC restores TCStatus after Status, and the CU bits
141 * are aliased there.
f088fc84 142 */
9cc12363
KK
143 childregs->cp0_tcstatus &= ~(ST0_CU2|ST0_CU1);
144#endif
1da177e4
LT
145 clear_tsk_thread_flag(p, TIF_USEDFPU);
146
f088fc84 147#ifdef CONFIG_MIPS_MT_FPAFF
6657fe0a 148 clear_tsk_thread_flag(p, TIF_FPUBOUND);
f088fc84
RB
149#endif /* CONFIG_MIPS_MT_FPAFF */
150
3c37026d
RB
151 if (clone_flags & CLONE_SETTLS)
152 ti->tp_value = regs->regs[7];
153
1da177e4
LT
154 return 0;
155}
156
157/* Fill in the fpu structure for a core dump.. */
158int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r)
159{
6cec7c4a
PB
160 int i;
161
162 for (i = 0; i < NUM_FPU_REGS; i++)
163 memcpy(&r[i], &current->thread.fpu.fpr[i], sizeof(*r));
164
165 memcpy(&r[NUM_FPU_REGS], &current->thread.fpu.fcr31,
166 sizeof(current->thread.fpu.fcr31));
1da177e4
LT
167
168 return 1;
169}
170
d56efda4 171void elf_dump_regs(elf_greg_t *gp, struct pt_regs *regs)
1da177e4
LT
172{
173 int i;
174
175 for (i = 0; i < EF_R0; i++)
176 gp[i] = 0;
177 gp[EF_R0] = 0;
178 for (i = 1; i <= 31; i++)
179 gp[EF_R0 + i] = regs->regs[i];
180 gp[EF_R26] = 0;
181 gp[EF_R27] = 0;
182 gp[EF_LO] = regs->lo;
183 gp[EF_HI] = regs->hi;
184 gp[EF_CP0_EPC] = regs->cp0_epc;
185 gp[EF_CP0_BADVADDR] = regs->cp0_badvaddr;
186 gp[EF_CP0_STATUS] = regs->cp0_status;
187 gp[EF_CP0_CAUSE] = regs->cp0_cause;
188#ifdef EF_UNUSED0
189 gp[EF_UNUSED0] = 0;
190#endif
191}
192
49a89efb 193int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
71e0e556 194{
40bc9c67 195 elf_dump_regs(*regs, task_pt_regs(tsk));
71e0e556
RB
196 return 1;
197}
198
49a89efb 199int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpr)
1da177e4 200{
6cec7c4a
PB
201 int i;
202
203 for (i = 0; i < NUM_FPU_REGS; i++)
204 memcpy(&fpr[i], &t->thread.fpu.fpr[i], sizeof(*fpr));
205
206 memcpy(&fpr[NUM_FPU_REGS], &t->thread.fpu.fcr31,
207 sizeof(t->thread.fpu.fcr31));
1da177e4
LT
208
209 return 1;
210}
211
36ecafc5
GF
212#ifdef CONFIG_CC_STACKPROTECTOR
213#include <linux/stackprotector.h>
214unsigned long __stack_chk_guard __read_mostly;
215EXPORT_SYMBOL(__stack_chk_guard);
216#endif
217
b5943182
FBH
218struct mips_frame_info {
219 void *func;
220 unsigned long func_size;
221 int frame_size;
222 int pc_offset;
223};
dc953df1 224
5000653e
TW
225#define J_TARGET(pc,target) \
226 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
227
c0efbb6d
FBH
228static inline int is_ra_save_ins(union mips_instruction *ip)
229{
34c2f668
LY
230#ifdef CONFIG_CPU_MICROMIPS
231 union mips_instruction mmi;
232
233 /*
234 * swsp ra,offset
235 * swm16 reglist,offset(sp)
236 * swm32 reglist,offset(sp)
237 * sw32 ra,offset(sp)
238 * jradiussp - NOT SUPPORTED
239 *
240 * microMIPS is way more fun...
241 */
242 if (mm_insn_16bit(ip->halfword[0])) {
243 mmi.word = (ip->halfword[0] << 16);
244 return ((mmi.mm16_r5_format.opcode == mm_swsp16_op &&
245 mmi.mm16_r5_format.rt == 31) ||
246 (mmi.mm16_m_format.opcode == mm_pool16c_op &&
247 mmi.mm16_m_format.func == mm_swm16_op));
248 }
249 else {
250 mmi.halfword[0] = ip->halfword[1];
251 mmi.halfword[1] = ip->halfword[0];
252 return ((mmi.mm_m_format.opcode == mm_pool32b_op &&
253 mmi.mm_m_format.rd > 9 &&
254 mmi.mm_m_format.base == 29 &&
255 mmi.mm_m_format.func == mm_swm32_func) ||
256 (mmi.i_format.opcode == mm_sw32_op &&
257 mmi.i_format.rs == 29 &&
258 mmi.i_format.rt == 31));
259 }
260#else
c0efbb6d
FBH
261 /* sw / sd $ra, offset($sp) */
262 return (ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
263 ip->i_format.rs == 29 &&
264 ip->i_format.rt == 31;
34c2f668 265#endif
c0efbb6d
FBH
266}
267
e7438c4b 268static inline int is_jump_ins(union mips_instruction *ip)
c0efbb6d 269{
34c2f668
LY
270#ifdef CONFIG_CPU_MICROMIPS
271 /*
272 * jr16,jrc,jalr16,jalr16
273 * jal
274 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
275 * jraddiusp - NOT SUPPORTED
276 *
277 * microMIPS is kind of more fun...
278 */
279 union mips_instruction mmi;
280
281 mmi.word = (ip->halfword[0] << 16);
282
283 if ((mmi.mm16_r5_format.opcode == mm_pool16c_op &&
284 (mmi.mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op) ||
285 ip->j_format.opcode == mm_jal32_op)
286 return 1;
287 if (ip->r_format.opcode != mm_pool32a_op ||
288 ip->r_format.func != mm_pool32axf_op)
289 return 0;
290 return (((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op);
291#else
e7438c4b
TW
292 if (ip->j_format.opcode == j_op)
293 return 1;
c0efbb6d
FBH
294 if (ip->j_format.opcode == jal_op)
295 return 1;
296 if (ip->r_format.opcode != spec_op)
297 return 0;
298 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
34c2f668 299#endif
c0efbb6d
FBH
300}
301
302static inline int is_sp_move_ins(union mips_instruction *ip)
303{
34c2f668
LY
304#ifdef CONFIG_CPU_MICROMIPS
305 /*
306 * addiusp -imm
307 * addius5 sp,-imm
308 * addiu32 sp,sp,-imm
309 * jradiussp - NOT SUPPORTED
310 *
311 * microMIPS is not more fun...
312 */
313 if (mm_insn_16bit(ip->halfword[0])) {
314 union mips_instruction mmi;
315
316 mmi.word = (ip->halfword[0] << 16);
317 return ((mmi.mm16_r3_format.opcode == mm_pool16d_op &&
318 mmi.mm16_r3_format.simmediate && mm_addiusp_func) ||
319 (mmi.mm16_r5_format.opcode == mm_pool16d_op &&
320 mmi.mm16_r5_format.rt == 29));
321 }
322 return (ip->mm_i_format.opcode == mm_addiu32_op &&
323 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29);
324#else
c0efbb6d
FBH
325 /* addiu/daddiu sp,sp,-imm */
326 if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
327 return 0;
328 if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
329 return 1;
34c2f668 330#endif
c0efbb6d
FBH
331 return 0;
332}
333
f66686f7 334static int get_frame_info(struct mips_frame_info *info)
1da177e4 335{
34c2f668
LY
336#ifdef CONFIG_CPU_MICROMIPS
337 union mips_instruction *ip = (void *) (((char *) info->func) - 1);
338#else
c0efbb6d 339 union mips_instruction *ip = info->func;
34c2f668 340#endif
29b376ff
FBH
341 unsigned max_insns = info->func_size / sizeof(union mips_instruction);
342 unsigned i;
c0efbb6d 343
1da177e4 344 info->pc_offset = -1;
63077519 345 info->frame_size = 0;
1da177e4 346
29b376ff
FBH
347 if (!ip)
348 goto err;
349
350 if (max_insns == 0)
351 max_insns = 128U; /* unknown function size */
352 max_insns = min(128U, max_insns);
353
c0efbb6d
FBH
354 for (i = 0; i < max_insns; i++, ip++) {
355
e7438c4b 356 if (is_jump_ins(ip))
63077519 357 break;
0cceb4aa
FBH
358 if (!info->frame_size) {
359 if (is_sp_move_ins(ip))
34c2f668
LY
360 {
361#ifdef CONFIG_CPU_MICROMIPS
362 if (mm_insn_16bit(ip->halfword[0]))
363 {
364 unsigned short tmp;
365
366 if (ip->halfword[0] & mm_addiusp_func)
367 {
368 tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
369 info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
370 } else {
371 tmp = (ip->halfword[0] >> 1);
372 info->frame_size = -(signed short)(tmp & 0xf);
373 }
374 ip = (void *) &ip->halfword[1];
375 ip--;
376 } else
377#endif
0cceb4aa 378 info->frame_size = - ip->i_format.simmediate;
34c2f668 379 }
0cceb4aa 380 continue;
63077519 381 }
0cceb4aa 382 if (info->pc_offset == -1 && is_ra_save_ins(ip)) {
63077519
AN
383 info->pc_offset =
384 ip->i_format.simmediate / sizeof(long);
0cceb4aa 385 break;
1da177e4
LT
386 }
387 }
f66686f7
AN
388 if (info->frame_size && info->pc_offset >= 0) /* nested */
389 return 0;
390 if (info->pc_offset < 0) /* leaf */
391 return 1;
392 /* prologue seems boggus... */
29b376ff 393err:
f66686f7 394 return -1;
1da177e4
LT
395}
396
b5943182
FBH
397static struct mips_frame_info schedule_mfi __read_mostly;
398
5000653e
TW
399#ifdef CONFIG_KALLSYMS
400static unsigned long get___schedule_addr(void)
401{
402 return kallsyms_lookup_name("__schedule");
403}
404#else
405static unsigned long get___schedule_addr(void)
406{
407 union mips_instruction *ip = (void *)schedule;
408 int max_insns = 8;
409 int i;
410
411 for (i = 0; i < max_insns; i++, ip++) {
412 if (ip->j_format.opcode == j_op)
413 return J_TARGET(ip, ip->j_format.target);
414 }
415 return 0;
416}
417#endif
418
1da177e4
LT
419static int __init frame_info_init(void)
420{
b5943182 421 unsigned long size = 0;
63077519 422#ifdef CONFIG_KALLSYMS
b5943182 423 unsigned long ofs;
5000653e
TW
424#endif
425 unsigned long addr;
b5943182 426
5000653e
TW
427 addr = get___schedule_addr();
428 if (!addr)
429 addr = (unsigned long)schedule;
430
431#ifdef CONFIG_KALLSYMS
432 kallsyms_lookup_size_offset(addr, &size, &ofs);
63077519 433#endif
5000653e 434 schedule_mfi.func = (void *)addr;
b5943182
FBH
435 schedule_mfi.func_size = size;
436
437 get_frame_info(&schedule_mfi);
6057a798
FBH
438
439 /*
440 * Without schedule() frame info, result given by
441 * thread_saved_pc() and get_wchan() are not reliable.
442 */
b5943182 443 if (schedule_mfi.pc_offset < 0)
6057a798 444 printk("Can't analyze schedule() prologue at %p\n", schedule);
63077519 445
1da177e4
LT
446 return 0;
447}
448
449arch_initcall(frame_info_init);
450
451/*
452 * Return saved PC of a blocked thread.
453 */
454unsigned long thread_saved_pc(struct task_struct *tsk)
455{
456 struct thread_struct *t = &tsk->thread;
457
458 /* New born processes are a special case */
459 if (t->reg31 == (unsigned long) ret_from_fork)
460 return t->reg31;
b5943182 461 if (schedule_mfi.pc_offset < 0)
1da177e4 462 return 0;
b5943182 463 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
1da177e4
LT
464}
465
1da177e4 466
f66686f7 467#ifdef CONFIG_KALLSYMS
94ea09c6
DK
468/* generic stack unwinding function */
469unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
470 unsigned long *sp,
471 unsigned long pc,
472 unsigned long *ra)
f66686f7 473{
f66686f7 474 struct mips_frame_info info;
f66686f7 475 unsigned long size, ofs;
4d157d5e 476 int leaf;
1924600c
AN
477 extern void ret_from_irq(void);
478 extern void ret_from_exception(void);
f66686f7 479
f66686f7
AN
480 if (!stack_page)
481 return 0;
482
1924600c
AN
483 /*
484 * If we reached the bottom of interrupt context,
485 * return saved pc in pt_regs.
486 */
487 if (pc == (unsigned long)ret_from_irq ||
488 pc == (unsigned long)ret_from_exception) {
489 struct pt_regs *regs;
490 if (*sp >= stack_page &&
491 *sp + sizeof(*regs) <= stack_page + THREAD_SIZE - 32) {
492 regs = (struct pt_regs *)*sp;
493 pc = regs->cp0_epc;
494 if (__kernel_text_address(pc)) {
495 *sp = regs->regs[29];
496 *ra = regs->regs[31];
497 return pc;
498 }
499 }
500 return 0;
501 }
55b74283 502 if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
f66686f7 503 return 0;
1fd69098 504 /*
25985edc 505 * Return ra if an exception occurred at the first instruction
1fd69098 506 */
1924600c
AN
507 if (unlikely(ofs == 0)) {
508 pc = *ra;
509 *ra = 0;
510 return pc;
511 }
f66686f7
AN
512
513 info.func = (void *)(pc - ofs);
514 info.func_size = ofs; /* analyze from start to ofs */
4d157d5e
FBH
515 leaf = get_frame_info(&info);
516 if (leaf < 0)
f66686f7 517 return 0;
4d157d5e
FBH
518
519 if (*sp < stack_page ||
520 *sp + info.frame_size > stack_page + THREAD_SIZE - 32)
f66686f7
AN
521 return 0;
522
4d157d5e
FBH
523 if (leaf)
524 /*
525 * For some extreme cases, get_frame_info() can
526 * consider wrongly a nested function as a leaf
527 * one. In that cases avoid to return always the
528 * same value.
529 */
1924600c 530 pc = pc != *ra ? *ra : 0;
4d157d5e
FBH
531 else
532 pc = ((unsigned long *)(*sp))[info.pc_offset];
533
534 *sp += info.frame_size;
1924600c 535 *ra = 0;
4d157d5e 536 return __kernel_text_address(pc) ? pc : 0;
f66686f7 537}
94ea09c6
DK
538EXPORT_SYMBOL(unwind_stack_by_address);
539
540/* used by show_backtrace() */
541unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
542 unsigned long pc, unsigned long *ra)
543{
544 unsigned long stack_page = (unsigned long)task_stack_page(task);
545 return unwind_stack_by_address(stack_page, sp, pc, ra);
546}
f66686f7 547#endif
b5943182
FBH
548
549/*
550 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
551 */
552unsigned long get_wchan(struct task_struct *task)
553{
554 unsigned long pc = 0;
555#ifdef CONFIG_KALLSYMS
556 unsigned long sp;
1924600c 557 unsigned long ra = 0;
b5943182
FBH
558#endif
559
560 if (!task || task == current || task->state == TASK_RUNNING)
561 goto out;
562 if (!task_stack_page(task))
563 goto out;
564
565 pc = thread_saved_pc(task);
566
567#ifdef CONFIG_KALLSYMS
568 sp = task->thread.reg29 + schedule_mfi.frame_size;
569
570 while (in_sched_functions(pc))
1924600c 571 pc = unwind_stack(task, &sp, pc, &ra);
b5943182
FBH
572#endif
573
574out:
575 return pc;
576}
94109102
FBH
577
578/*
579 * Don't forget that the stack pointer must be aligned on a 8 bytes
580 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
581 */
582unsigned long arch_align_stack(unsigned long sp)
583{
584 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
585 sp -= get_random_int() & ~PAGE_MASK;
586
587 return sp & ALMASK;
588}