MIPS: Netlogic: Exclude netlogic,xlp-pic code from XLR builds
[linux-block.git] / arch / mips / kernel / process.c
CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
40ac5d47 7 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
1da177e4
LT
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 * Copyright (C) 2004 Thiemo Seufer
34c2f668 10 * Copyright (C) 2013 Imagination Technologies Ltd.
1da177e4 11 */
1da177e4 12#include <linux/errno.h>
1da177e4 13#include <linux/sched.h>
7bcf7717 14#include <linux/tick.h>
1da177e4
LT
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
cae39d13 19#include <linux/export.h>
1da177e4 20#include <linux/ptrace.h>
1da177e4
LT
21#include <linux/mman.h>
22#include <linux/personality.h>
23#include <linux/sys.h>
1da177e4
LT
24#include <linux/init.h>
25#include <linux/completion.h>
63077519 26#include <linux/kallsyms.h>
94109102 27#include <linux/random.h>
9791554b 28#include <linux/prctl.h>
1da177e4 29
94109102 30#include <asm/asm.h>
1da177e4
LT
31#include <asm/bootinfo.h>
32#include <asm/cpu.h>
432c6bac 33#include <asm/dsemul.h>
e50c0a8f 34#include <asm/dsp.h>
1da177e4 35#include <asm/fpu.h>
d42d8d10 36#include <asm/irq.h>
1db1af84 37#include <asm/msa.h>
1da177e4 38#include <asm/pgtable.h>
1da177e4
LT
39#include <asm/mipsregs.h>
40#include <asm/processor.h>
60be939c 41#include <asm/reg.h>
7c0f6ba6 42#include <linux/uaccess.h>
1da177e4
LT
43#include <asm/io.h>
44#include <asm/elf.h>
45#include <asm/isadep.h>
46#include <asm/inst.h>
1df0f0ff 47#include <asm/stacktrace.h>
856839b7 48#include <asm/irq_regs.h>
1da177e4 49
cdbedc61
TG
50#ifdef CONFIG_HOTPLUG_CPU
51void arch_cpu_idle_dead(void)
1da177e4 52{
cdbedc61 53 /* What the heck is this check doing ? */
8dd92891 54 if (!cpumask_test_cpu(smp_processor_id(), &cpu_callin_map))
cdbedc61
TG
55 play_dead();
56}
57#endif
1b2bc75c 58
1da177e4 59asmlinkage void ret_from_fork(void);
8f54bcac 60asmlinkage void ret_from_kernel_thread(void);
1da177e4
LT
61
62void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
63{
64 unsigned long status;
65
66 /* New thread loses kernel privileges. */
bbaf238b 67 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
1da177e4
LT
68 status |= KU_USER;
69 regs->cp0_status = status;
76e5846d
JH
70 lose_fpu(0);
71 clear_thread_flag(TIF_MSA_CTX_LIVE);
1da177e4 72 clear_used_math();
432c6bac 73 atomic_set(&current->thread.bd_emu_frame, BD_EMUFRAME_NONE);
a3056b1c 74 init_dsp();
1da177e4
LT
75 regs->cp0_epc = pc;
76 regs->regs[29] = sp;
1da177e4
LT
77}
78
432c6bac
PB
79void exit_thread(struct task_struct *tsk)
80{
81 /*
82 * User threads may have allocated a delay slot emulation frame.
83 * If so, clean up that allocation.
84 */
85 if (!(current->flags & PF_KTHREAD))
86 dsemul_thread_cleanup(tsk);
87}
88
39148e94
JH
89int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
90{
91 /*
92 * Save any process state which is live in hardware registers to the
93 * parent context prior to duplication. This prevents the new child
94 * state becoming stale if the parent is preempted before copy_thread()
95 * gets a chance to save the parent's live hardware registers to the
96 * child context.
97 */
98 preempt_disable();
99
100 if (is_msa_enabled())
101 save_msa(current);
102 else if (is_fpu_owner())
103 _save_fp(current);
104
105 save_dsp(current);
106
107 preempt_enable();
108
109 *dst = *src;
110 return 0;
111}
112
e2c5aaa5
AD
113/*
114 * Copy architecture-specific thread state
115 */
6f2c55b8 116int copy_thread(unsigned long clone_flags, unsigned long usp,
e2c5aaa5 117 unsigned long kthread_arg, struct task_struct *p)
1da177e4 118{
75bb07e7 119 struct thread_info *ti = task_thread_info(p);
afa86fc4 120 struct pt_regs *childregs, *regs = current_pt_regs();
484889fc 121 unsigned long childksp;
3c37026d 122 p->set_child_tid = p->clear_child_tid = NULL;
1da177e4 123
75bb07e7 124 childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
1da177e4 125
1da177e4
LT
126 /* set up new TSS. */
127 childregs = (struct pt_regs *) childksp - 1;
484889fc
DD
128 /* Put the stack after the struct pt_regs. */
129 childksp = (unsigned long) childregs;
8f54bcac
AV
130 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
131 if (unlikely(p->flags & PF_KTHREAD)) {
e2c5aaa5 132 /* kernel thread */
8f54bcac
AV
133 unsigned long status = p->thread.cp0_status;
134 memset(childregs, 0, sizeof(struct pt_regs));
135 ti->addr_limit = KERNEL_DS;
136 p->thread.reg16 = usp; /* fn */
e2c5aaa5 137 p->thread.reg17 = kthread_arg;
8f54bcac
AV
138 p->thread.reg29 = childksp;
139 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
140#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
141 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
142 ((status & (ST0_KUC | ST0_IEC)) << 2);
143#else
144 status |= ST0_EXL;
145#endif
146 childregs->cp0_status = status;
147 return 0;
148 }
e2c5aaa5
AD
149
150 /* user thread */
1da177e4 151 *childregs = *regs;
70342287
RB
152 childregs->regs[7] = 0; /* Clear error flag */
153 childregs->regs[2] = 0; /* Child gets zero as return value */
64b3122d
AV
154 if (usp)
155 childregs->regs[29] = usp;
8f54bcac 156 ti->addr_limit = USER_DS;
1da177e4 157
1da177e4
LT
158 p->thread.reg29 = (unsigned long) childregs;
159 p->thread.reg31 = (unsigned long) ret_from_fork;
160
161 /*
162 * New tasks lose permission to use the fpu. This accelerates context
163 * switching for most programs since they don't use the fpu.
164 */
1da177e4 165 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
1da177e4 166
1da177e4 167 clear_tsk_thread_flag(p, TIF_USEDFPU);
7daef8f2
PB
168 clear_tsk_thread_flag(p, TIF_USEDMSA);
169 clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
1da177e4 170
f088fc84 171#ifdef CONFIG_MIPS_MT_FPAFF
6657fe0a 172 clear_tsk_thread_flag(p, TIF_FPUBOUND);
f088fc84
RB
173#endif /* CONFIG_MIPS_MT_FPAFF */
174
432c6bac
PB
175 atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE);
176
3c37026d
RB
177 if (clone_flags & CLONE_SETTLS)
178 ti->tp_value = regs->regs[7];
179
1da177e4
LT
180 return 0;
181}
182
36ecafc5
GF
183#ifdef CONFIG_CC_STACKPROTECTOR
184#include <linux/stackprotector.h>
185unsigned long __stack_chk_guard __read_mostly;
186EXPORT_SYMBOL(__stack_chk_guard);
187#endif
188
b5943182
FBH
189struct mips_frame_info {
190 void *func;
191 unsigned long func_size;
192 int frame_size;
193 int pc_offset;
194};
dc953df1 195
5000653e
TW
196#define J_TARGET(pc,target) \
197 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
198
bb9bc468 199static inline int is_ra_save_ins(union mips_instruction *ip, int *poff)
c0efbb6d 200{
34c2f668 201#ifdef CONFIG_CPU_MICROMIPS
34c2f668
LY
202 /*
203 * swsp ra,offset
204 * swm16 reglist,offset(sp)
205 * swm32 reglist,offset(sp)
206 * sw32 ra,offset(sp)
207 * jradiussp - NOT SUPPORTED
208 *
209 * microMIPS is way more fun...
210 */
a3552dac 211 if (mm_insn_16bit(ip->halfword[1])) {
bb9bc468
PB
212 switch (ip->mm16_r5_format.opcode) {
213 case mm_swsp16_op:
214 if (ip->mm16_r5_format.rt != 31)
215 return 0;
216
217 *poff = ip->mm16_r5_format.simmediate;
218 *poff = (*poff << 2) / sizeof(ulong);
219 return 1;
220
221 case mm_pool16c_op:
222 switch (ip->mm16_m_format.func) {
223 case mm_swm16_op:
224 *poff = ip->mm16_m_format.imm;
225 *poff += 1 + ip->mm16_m_format.rlist;
226 *poff = (*poff << 2) / sizeof(ulong);
227 return 1;
228
229 default:
230 return 0;
231 }
232
233 default:
234 return 0;
235 }
34c2f668 236 }
bb9bc468
PB
237
238 switch (ip->i_format.opcode) {
239 case mm_sw32_op:
240 if (ip->i_format.rs != 29)
241 return 0;
242 if (ip->i_format.rt != 31)
243 return 0;
244
245 *poff = ip->i_format.simmediate / sizeof(ulong);
246 return 1;
247
248 case mm_pool32b_op:
249 switch (ip->mm_m_format.func) {
250 case mm_swm32_func:
251 if (ip->mm_m_format.rd < 0x10)
252 return 0;
253 if (ip->mm_m_format.base != 29)
254 return 0;
255
256 *poff = ip->mm_m_format.simmediate;
257 *poff += (ip->mm_m_format.rd & 0xf) * sizeof(u32);
258 *poff /= sizeof(ulong);
259 return 1;
260 default:
261 return 0;
262 }
263
264 default:
265 return 0;
34c2f668
LY
266 }
267#else
c0efbb6d 268 /* sw / sd $ra, offset($sp) */
bb9bc468
PB
269 if ((ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
270 ip->i_format.rs == 29 && ip->i_format.rt == 31) {
271 *poff = ip->i_format.simmediate / sizeof(ulong);
272 return 1;
273 }
274
275 return 0;
34c2f668 276#endif
c0efbb6d
FBH
277}
278
e7438c4b 279static inline int is_jump_ins(union mips_instruction *ip)
c0efbb6d 280{
34c2f668
LY
281#ifdef CONFIG_CPU_MICROMIPS
282 /*
283 * jr16,jrc,jalr16,jalr16
284 * jal
285 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
286 * jraddiusp - NOT SUPPORTED
287 *
288 * microMIPS is kind of more fun...
289 */
67c75057
PB
290 if (mm_insn_16bit(ip->halfword[1])) {
291 if ((ip->mm16_r5_format.opcode == mm_pool16c_op &&
292 (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op))
293 return 1;
294 return 0;
295 }
296
096a0de4
PB
297 if (ip->j_format.opcode == mm_j32_op)
298 return 1;
67c75057 299 if (ip->j_format.opcode == mm_jal32_op)
34c2f668
LY
300 return 1;
301 if (ip->r_format.opcode != mm_pool32a_op ||
302 ip->r_format.func != mm_pool32axf_op)
303 return 0;
635c9907 304 return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
34c2f668 305#else
e7438c4b
TW
306 if (ip->j_format.opcode == j_op)
307 return 1;
c0efbb6d
FBH
308 if (ip->j_format.opcode == jal_op)
309 return 1;
310 if (ip->r_format.opcode != spec_op)
311 return 0;
312 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
34c2f668 313#endif
c0efbb6d
FBH
314}
315
316static inline int is_sp_move_ins(union mips_instruction *ip)
317{
34c2f668
LY
318#ifdef CONFIG_CPU_MICROMIPS
319 /*
320 * addiusp -imm
321 * addius5 sp,-imm
322 * addiu32 sp,sp,-imm
323 * jradiussp - NOT SUPPORTED
324 *
325 * microMIPS is not more fun...
326 */
a3552dac
PB
327 if (mm_insn_16bit(ip->halfword[1])) {
328 return (ip->mm16_r3_format.opcode == mm_pool16d_op &&
329 ip->mm16_r3_format.simmediate && mm_addiusp_func) ||
330 (ip->mm16_r5_format.opcode == mm_pool16d_op &&
331 ip->mm16_r5_format.rt == 29);
34c2f668 332 }
a3552dac 333
635c9907
RB
334 return ip->mm_i_format.opcode == mm_addiu32_op &&
335 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29;
34c2f668 336#else
c0efbb6d
FBH
337 /* addiu/daddiu sp,sp,-imm */
338 if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
339 return 0;
340 if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
341 return 1;
34c2f668 342#endif
c0efbb6d
FBH
343 return 0;
344}
345
f66686f7 346static int get_frame_info(struct mips_frame_info *info)
1da177e4 347{
a3552dac 348 bool is_mmips = IS_ENABLED(CONFIG_CPU_MICROMIPS);
b6c7a324
PB
349 union mips_instruction insn, *ip, *ip_end;
350 const unsigned int max_insns = 128;
351 unsigned int i;
c0efbb6d 352
1da177e4 353 info->pc_offset = -1;
63077519 354 info->frame_size = 0;
1da177e4 355
ccaf7caf 356 ip = (void *)msk_isa16_mode((ulong)info->func);
29b376ff
FBH
357 if (!ip)
358 goto err;
359
b6c7a324 360 ip_end = (void *)ip + info->func_size;
29b376ff 361
b6c7a324 362 for (i = 0; i < max_insns && ip < ip_end; i++, ip++) {
a3552dac
PB
363 if (is_mmips && mm_insn_16bit(ip->halfword[0])) {
364 insn.halfword[0] = 0;
365 insn.halfword[1] = ip->halfword[0];
366 } else if (is_mmips) {
367 insn.halfword[0] = ip->halfword[1];
368 insn.halfword[1] = ip->halfword[0];
369 } else {
370 insn.word = ip->word;
371 }
c0efbb6d 372
a3552dac 373 if (is_jump_ins(&insn))
63077519 374 break;
a3552dac 375
0cceb4aa 376 if (!info->frame_size) {
a3552dac 377 if (is_sp_move_ins(&insn))
34c2f668
LY
378 {
379#ifdef CONFIG_CPU_MICROMIPS
380 if (mm_insn_16bit(ip->halfword[0]))
381 {
382 unsigned short tmp;
383
384 if (ip->halfword[0] & mm_addiusp_func)
385 {
386 tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
387 info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
388 } else {
389 tmp = (ip->halfword[0] >> 1);
390 info->frame_size = -(signed short)(tmp & 0xf);
391 }
392 ip = (void *) &ip->halfword[1];
393 ip--;
394 } else
395#endif
0cceb4aa 396 info->frame_size = - ip->i_format.simmediate;
34c2f668 397 }
0cceb4aa 398 continue;
63077519 399 }
bb9bc468
PB
400 if (info->pc_offset == -1 &&
401 is_ra_save_ins(&insn, &info->pc_offset))
0cceb4aa 402 break;
1da177e4 403 }
f66686f7
AN
404 if (info->frame_size && info->pc_offset >= 0) /* nested */
405 return 0;
406 if (info->pc_offset < 0) /* leaf */
407 return 1;
a90c59e6 408 /* prologue seems bogus... */
29b376ff 409err:
f66686f7 410 return -1;
1da177e4
LT
411}
412
b5943182
FBH
413static struct mips_frame_info schedule_mfi __read_mostly;
414
5000653e
TW
415#ifdef CONFIG_KALLSYMS
416static unsigned long get___schedule_addr(void)
417{
418 return kallsyms_lookup_name("__schedule");
419}
420#else
421static unsigned long get___schedule_addr(void)
422{
423 union mips_instruction *ip = (void *)schedule;
424 int max_insns = 8;
425 int i;
426
427 for (i = 0; i < max_insns; i++, ip++) {
428 if (ip->j_format.opcode == j_op)
429 return J_TARGET(ip, ip->j_format.target);
430 }
431 return 0;
432}
433#endif
434
1da177e4
LT
435static int __init frame_info_init(void)
436{
b5943182 437 unsigned long size = 0;
63077519 438#ifdef CONFIG_KALLSYMS
b5943182 439 unsigned long ofs;
5000653e
TW
440#endif
441 unsigned long addr;
b5943182 442
5000653e
TW
443 addr = get___schedule_addr();
444 if (!addr)
445 addr = (unsigned long)schedule;
446
447#ifdef CONFIG_KALLSYMS
448 kallsyms_lookup_size_offset(addr, &size, &ofs);
63077519 449#endif
5000653e 450 schedule_mfi.func = (void *)addr;
b5943182
FBH
451 schedule_mfi.func_size = size;
452
453 get_frame_info(&schedule_mfi);
6057a798
FBH
454
455 /*
456 * Without schedule() frame info, result given by
457 * thread_saved_pc() and get_wchan() are not reliable.
458 */
b5943182 459 if (schedule_mfi.pc_offset < 0)
6057a798 460 printk("Can't analyze schedule() prologue at %p\n", schedule);
63077519 461
1da177e4
LT
462 return 0;
463}
464
465arch_initcall(frame_info_init);
466
467/*
468 * Return saved PC of a blocked thread.
469 */
470unsigned long thread_saved_pc(struct task_struct *tsk)
471{
472 struct thread_struct *t = &tsk->thread;
473
474 /* New born processes are a special case */
475 if (t->reg31 == (unsigned long) ret_from_fork)
476 return t->reg31;
b5943182 477 if (schedule_mfi.pc_offset < 0)
1da177e4 478 return 0;
b5943182 479 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
1da177e4
LT
480}
481
1da177e4 482
f66686f7 483#ifdef CONFIG_KALLSYMS
94ea09c6
DK
484/* generic stack unwinding function */
485unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
486 unsigned long *sp,
487 unsigned long pc,
488 unsigned long *ra)
f66686f7 489{
f66686f7 490 struct mips_frame_info info;
f66686f7 491 unsigned long size, ofs;
4d157d5e 492 int leaf;
1924600c
AN
493 extern void ret_from_irq(void);
494 extern void ret_from_exception(void);
f66686f7 495
f66686f7
AN
496 if (!stack_page)
497 return 0;
498
1924600c
AN
499 /*
500 * If we reached the bottom of interrupt context,
501 * return saved pc in pt_regs.
502 */
503 if (pc == (unsigned long)ret_from_irq ||
504 pc == (unsigned long)ret_from_exception) {
505 struct pt_regs *regs;
506 if (*sp >= stack_page &&
507 *sp + sizeof(*regs) <= stack_page + THREAD_SIZE - 32) {
508 regs = (struct pt_regs *)*sp;
509 pc = regs->cp0_epc;
a816b306 510 if (!user_mode(regs) && __kernel_text_address(pc)) {
1924600c
AN
511 *sp = regs->regs[29];
512 *ra = regs->regs[31];
513 return pc;
514 }
515 }
516 return 0;
517 }
55b74283 518 if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
f66686f7 519 return 0;
1fd69098 520 /*
25985edc 521 * Return ra if an exception occurred at the first instruction
1fd69098 522 */
1924600c
AN
523 if (unlikely(ofs == 0)) {
524 pc = *ra;
525 *ra = 0;
526 return pc;
527 }
f66686f7
AN
528
529 info.func = (void *)(pc - ofs);
530 info.func_size = ofs; /* analyze from start to ofs */
4d157d5e
FBH
531 leaf = get_frame_info(&info);
532 if (leaf < 0)
f66686f7 533 return 0;
4d157d5e
FBH
534
535 if (*sp < stack_page ||
536 *sp + info.frame_size > stack_page + THREAD_SIZE - 32)
f66686f7
AN
537 return 0;
538
4d157d5e
FBH
539 if (leaf)
540 /*
541 * For some extreme cases, get_frame_info() can
542 * consider wrongly a nested function as a leaf
543 * one. In that cases avoid to return always the
544 * same value.
545 */
1924600c 546 pc = pc != *ra ? *ra : 0;
4d157d5e
FBH
547 else
548 pc = ((unsigned long *)(*sp))[info.pc_offset];
549
550 *sp += info.frame_size;
1924600c 551 *ra = 0;
4d157d5e 552 return __kernel_text_address(pc) ? pc : 0;
f66686f7 553}
94ea09c6
DK
554EXPORT_SYMBOL(unwind_stack_by_address);
555
556/* used by show_backtrace() */
557unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
558 unsigned long pc, unsigned long *ra)
559{
d42d8d10
MR
560 unsigned long stack_page = 0;
561 int cpu;
562
563 for_each_possible_cpu(cpu) {
564 if (on_irq_stack(cpu, *sp)) {
565 stack_page = (unsigned long)irq_stack[cpu];
566 break;
567 }
568 }
569
570 if (!stack_page)
571 stack_page = (unsigned long)task_stack_page(task);
572
94ea09c6
DK
573 return unwind_stack_by_address(stack_page, sp, pc, ra);
574}
f66686f7 575#endif
b5943182
FBH
576
577/*
578 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
579 */
580unsigned long get_wchan(struct task_struct *task)
581{
582 unsigned long pc = 0;
583#ifdef CONFIG_KALLSYMS
584 unsigned long sp;
1924600c 585 unsigned long ra = 0;
b5943182
FBH
586#endif
587
588 if (!task || task == current || task->state == TASK_RUNNING)
589 goto out;
590 if (!task_stack_page(task))
591 goto out;
592
593 pc = thread_saved_pc(task);
594
595#ifdef CONFIG_KALLSYMS
596 sp = task->thread.reg29 + schedule_mfi.frame_size;
597
598 while (in_sched_functions(pc))
1924600c 599 pc = unwind_stack(task, &sp, pc, &ra);
b5943182
FBH
600#endif
601
602out:
603 return pc;
604}
94109102
FBH
605
606/*
607 * Don't forget that the stack pointer must be aligned on a 8 bytes
608 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
609 */
610unsigned long arch_align_stack(unsigned long sp)
611{
612 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
613 sp -= get_random_int() & ~PAGE_MASK;
614
615 return sp & ALMASK;
616}
856839b7
ES
617
618static void arch_dump_stack(void *info)
619{
620 struct pt_regs *regs;
621
622 regs = get_irq_regs();
623
624 if (regs)
625 show_regs(regs);
626
627 dump_stack();
628}
629
9a01c3ed 630void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
856839b7 631{
9a01c3ed
CM
632 long this_cpu = get_cpu();
633
634 if (cpumask_test_cpu(this_cpu, mask) && !exclude_self)
635 dump_stack();
636
637 smp_call_function_many(mask, arch_dump_stack, NULL, 1);
638
639 put_cpu();
856839b7 640}
9791554b
PB
641
642int mips_get_process_fp_mode(struct task_struct *task)
643{
644 int value = 0;
645
646 if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
647 value |= PR_FP_MODE_FR;
648 if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
649 value |= PR_FP_MODE_FRE;
650
651 return value;
652}
653
6b832257
PB
654static void prepare_for_fp_mode_switch(void *info)
655{
656 struct mm_struct *mm = info;
657
658 if (current->mm == mm)
659 lose_fpu(1);
660}
661
9791554b
PB
662int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
663{
664 const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
9791554b 665 struct task_struct *t;
6b832257 666 int max_users;
9791554b
PB
667
668 /* Check the value is valid */
669 if (value & ~known_bits)
670 return -EOPNOTSUPP;
671
672 /* Avoid inadvertently triggering emulation */
b244614a
MN
673 if ((value & PR_FP_MODE_FR) && raw_cpu_has_fpu &&
674 !(raw_current_cpu_data.fpu_id & MIPS_FPIR_F64))
9791554b 675 return -EOPNOTSUPP;
b244614a 676 if ((value & PR_FP_MODE_FRE) && raw_cpu_has_fpu && !cpu_has_fre)
9791554b
PB
677 return -EOPNOTSUPP;
678
13e45f09 679 /* FR = 0 not supported in MIPS R6 */
b244614a 680 if (!(value & PR_FP_MODE_FR) && raw_cpu_has_fpu && cpu_has_mips_r6)
13e45f09
MC
681 return -EOPNOTSUPP;
682
bd239f1e
PB
683 /* Proceed with the mode switch */
684 preempt_disable();
685
9791554b
PB
686 /* Save FP & vector context, then disable FPU & MSA */
687 if (task->signal == current->signal)
688 lose_fpu(1);
689
690 /* Prevent any threads from obtaining live FP context */
691 atomic_set(&task->mm->context.fp_mode_switching, 1);
692 smp_mb__after_atomic();
693
694 /*
6b832257
PB
695 * If there are multiple online CPUs then force any which are running
696 * threads in this process to lose their FPU context, which they can't
697 * regain until fp_mode_switching is cleared later.
9791554b
PB
698 */
699 if (num_online_cpus() > 1) {
6b832257
PB
700 /* No need to send an IPI for the local CPU */
701 max_users = (task->mm == current->mm) ? 1 : 0;
9791554b 702
6b832257
PB
703 if (atomic_read(&current->mm->mm_users) > max_users)
704 smp_call_function(prepare_for_fp_mode_switch,
705 (void *)current->mm, 1);
9791554b
PB
706 }
707
708 /*
709 * There are now no threads of the process with live FP context, so it
710 * is safe to proceed with the FP mode switch.
711 */
712 for_each_thread(task, t) {
713 /* Update desired FP register width */
714 if (value & PR_FP_MODE_FR) {
715 clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
716 } else {
717 set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
718 clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
719 }
720
721 /* Update desired FP single layout */
722 if (value & PR_FP_MODE_FRE)
723 set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
724 else
725 clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
726 }
727
728 /* Allow threads to use FP again */
729 atomic_set(&task->mm->context.fp_mode_switching, 0);
bd239f1e 730 preempt_enable();
9791554b
PB
731
732 return 0;
733}