Merge branch 'for-4.7/acpi6.1' into libnvdimm-for-next
[linux-2.6-block.git] / arch / mips / kernel / process.c
CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
40ac5d47 7 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
1da177e4
LT
8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9 * Copyright (C) 2004 Thiemo Seufer
34c2f668 10 * Copyright (C) 2013 Imagination Technologies Ltd.
1da177e4 11 */
1da177e4 12#include <linux/errno.h>
1da177e4 13#include <linux/sched.h>
7bcf7717 14#include <linux/tick.h>
1da177e4
LT
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
cae39d13 19#include <linux/export.h>
1da177e4 20#include <linux/ptrace.h>
1da177e4
LT
21#include <linux/mman.h>
22#include <linux/personality.h>
23#include <linux/sys.h>
1da177e4
LT
24#include <linux/init.h>
25#include <linux/completion.h>
63077519 26#include <linux/kallsyms.h>
94109102 27#include <linux/random.h>
9791554b 28#include <linux/prctl.h>
1da177e4 29
94109102 30#include <asm/asm.h>
1da177e4
LT
31#include <asm/bootinfo.h>
32#include <asm/cpu.h>
e50c0a8f 33#include <asm/dsp.h>
1da177e4 34#include <asm/fpu.h>
1db1af84 35#include <asm/msa.h>
1da177e4 36#include <asm/pgtable.h>
1da177e4
LT
37#include <asm/mipsregs.h>
38#include <asm/processor.h>
60be939c 39#include <asm/reg.h>
1da177e4
LT
40#include <asm/uaccess.h>
41#include <asm/io.h>
42#include <asm/elf.h>
43#include <asm/isadep.h>
44#include <asm/inst.h>
1df0f0ff 45#include <asm/stacktrace.h>
856839b7 46#include <asm/irq_regs.h>
1da177e4 47
cdbedc61
TG
48#ifdef CONFIG_HOTPLUG_CPU
49void arch_cpu_idle_dead(void)
1da177e4 50{
cdbedc61 51 /* What the heck is this check doing ? */
8dd92891 52 if (!cpumask_test_cpu(smp_processor_id(), &cpu_callin_map))
cdbedc61
TG
53 play_dead();
54}
55#endif
1b2bc75c 56
1da177e4 57asmlinkage void ret_from_fork(void);
8f54bcac 58asmlinkage void ret_from_kernel_thread(void);
1da177e4
LT
59
60void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
61{
62 unsigned long status;
63
64 /* New thread loses kernel privileges. */
bbaf238b 65 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
1da177e4
LT
66 status |= KU_USER;
67 regs->cp0_status = status;
76e5846d
JH
68 lose_fpu(0);
69 clear_thread_flag(TIF_MSA_CTX_LIVE);
1da177e4 70 clear_used_math();
a3056b1c 71 init_dsp();
1da177e4
LT
72 regs->cp0_epc = pc;
73 regs->regs[29] = sp;
1da177e4
LT
74}
75
76void exit_thread(void)
77{
78}
79
80void flush_thread(void)
81{
82}
83
39148e94
JH
84int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
85{
86 /*
87 * Save any process state which is live in hardware registers to the
88 * parent context prior to duplication. This prevents the new child
89 * state becoming stale if the parent is preempted before copy_thread()
90 * gets a chance to save the parent's live hardware registers to the
91 * child context.
92 */
93 preempt_disable();
94
95 if (is_msa_enabled())
96 save_msa(current);
97 else if (is_fpu_owner())
98 _save_fp(current);
99
100 save_dsp(current);
101
102 preempt_enable();
103
104 *dst = *src;
105 return 0;
106}
107
e2c5aaa5
AD
108/*
109 * Copy architecture-specific thread state
110 */
6f2c55b8 111int copy_thread(unsigned long clone_flags, unsigned long usp,
e2c5aaa5 112 unsigned long kthread_arg, struct task_struct *p)
1da177e4 113{
75bb07e7 114 struct thread_info *ti = task_thread_info(p);
afa86fc4 115 struct pt_regs *childregs, *regs = current_pt_regs();
484889fc 116 unsigned long childksp;
3c37026d 117 p->set_child_tid = p->clear_child_tid = NULL;
1da177e4 118
75bb07e7 119 childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
1da177e4 120
1da177e4
LT
121 /* set up new TSS. */
122 childregs = (struct pt_regs *) childksp - 1;
484889fc
DD
123 /* Put the stack after the struct pt_regs. */
124 childksp = (unsigned long) childregs;
8f54bcac
AV
125 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
126 if (unlikely(p->flags & PF_KTHREAD)) {
e2c5aaa5 127 /* kernel thread */
8f54bcac
AV
128 unsigned long status = p->thread.cp0_status;
129 memset(childregs, 0, sizeof(struct pt_regs));
130 ti->addr_limit = KERNEL_DS;
131 p->thread.reg16 = usp; /* fn */
e2c5aaa5 132 p->thread.reg17 = kthread_arg;
8f54bcac
AV
133 p->thread.reg29 = childksp;
134 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
135#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
136 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
137 ((status & (ST0_KUC | ST0_IEC)) << 2);
138#else
139 status |= ST0_EXL;
140#endif
141 childregs->cp0_status = status;
142 return 0;
143 }
e2c5aaa5
AD
144
145 /* user thread */
1da177e4 146 *childregs = *regs;
70342287
RB
147 childregs->regs[7] = 0; /* Clear error flag */
148 childregs->regs[2] = 0; /* Child gets zero as return value */
64b3122d
AV
149 if (usp)
150 childregs->regs[29] = usp;
8f54bcac 151 ti->addr_limit = USER_DS;
1da177e4 152
1da177e4
LT
153 p->thread.reg29 = (unsigned long) childregs;
154 p->thread.reg31 = (unsigned long) ret_from_fork;
155
156 /*
157 * New tasks lose permission to use the fpu. This accelerates context
158 * switching for most programs since they don't use the fpu.
159 */
1da177e4 160 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
1da177e4 161
1da177e4 162 clear_tsk_thread_flag(p, TIF_USEDFPU);
7daef8f2
PB
163 clear_tsk_thread_flag(p, TIF_USEDMSA);
164 clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
1da177e4 165
f088fc84 166#ifdef CONFIG_MIPS_MT_FPAFF
6657fe0a 167 clear_tsk_thread_flag(p, TIF_FPUBOUND);
f088fc84
RB
168#endif /* CONFIG_MIPS_MT_FPAFF */
169
3c37026d
RB
170 if (clone_flags & CLONE_SETTLS)
171 ti->tp_value = regs->regs[7];
172
1da177e4
LT
173 return 0;
174}
175
36ecafc5
GF
176#ifdef CONFIG_CC_STACKPROTECTOR
177#include <linux/stackprotector.h>
178unsigned long __stack_chk_guard __read_mostly;
179EXPORT_SYMBOL(__stack_chk_guard);
180#endif
181
b5943182
FBH
182struct mips_frame_info {
183 void *func;
184 unsigned long func_size;
185 int frame_size;
186 int pc_offset;
187};
dc953df1 188
5000653e
TW
189#define J_TARGET(pc,target) \
190 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
191
c0efbb6d
FBH
192static inline int is_ra_save_ins(union mips_instruction *ip)
193{
34c2f668
LY
194#ifdef CONFIG_CPU_MICROMIPS
195 union mips_instruction mmi;
196
197 /*
198 * swsp ra,offset
199 * swm16 reglist,offset(sp)
200 * swm32 reglist,offset(sp)
201 * sw32 ra,offset(sp)
202 * jradiussp - NOT SUPPORTED
203 *
204 * microMIPS is way more fun...
205 */
206 if (mm_insn_16bit(ip->halfword[0])) {
207 mmi.word = (ip->halfword[0] << 16);
635c9907
RB
208 return (mmi.mm16_r5_format.opcode == mm_swsp16_op &&
209 mmi.mm16_r5_format.rt == 31) ||
210 (mmi.mm16_m_format.opcode == mm_pool16c_op &&
211 mmi.mm16_m_format.func == mm_swm16_op);
34c2f668
LY
212 }
213 else {
214 mmi.halfword[0] = ip->halfword[1];
215 mmi.halfword[1] = ip->halfword[0];
635c9907
RB
216 return (mmi.mm_m_format.opcode == mm_pool32b_op &&
217 mmi.mm_m_format.rd > 9 &&
218 mmi.mm_m_format.base == 29 &&
219 mmi.mm_m_format.func == mm_swm32_func) ||
220 (mmi.i_format.opcode == mm_sw32_op &&
221 mmi.i_format.rs == 29 &&
222 mmi.i_format.rt == 31);
34c2f668
LY
223 }
224#else
c0efbb6d
FBH
225 /* sw / sd $ra, offset($sp) */
226 return (ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
227 ip->i_format.rs == 29 &&
228 ip->i_format.rt == 31;
34c2f668 229#endif
c0efbb6d
FBH
230}
231
e7438c4b 232static inline int is_jump_ins(union mips_instruction *ip)
c0efbb6d 233{
34c2f668
LY
234#ifdef CONFIG_CPU_MICROMIPS
235 /*
236 * jr16,jrc,jalr16,jalr16
237 * jal
238 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
239 * jraddiusp - NOT SUPPORTED
240 *
241 * microMIPS is kind of more fun...
242 */
243 union mips_instruction mmi;
244
245 mmi.word = (ip->halfword[0] << 16);
246
247 if ((mmi.mm16_r5_format.opcode == mm_pool16c_op &&
248 (mmi.mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op) ||
249 ip->j_format.opcode == mm_jal32_op)
250 return 1;
251 if (ip->r_format.opcode != mm_pool32a_op ||
252 ip->r_format.func != mm_pool32axf_op)
253 return 0;
635c9907 254 return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
34c2f668 255#else
e7438c4b
TW
256 if (ip->j_format.opcode == j_op)
257 return 1;
c0efbb6d
FBH
258 if (ip->j_format.opcode == jal_op)
259 return 1;
260 if (ip->r_format.opcode != spec_op)
261 return 0;
262 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
34c2f668 263#endif
c0efbb6d
FBH
264}
265
266static inline int is_sp_move_ins(union mips_instruction *ip)
267{
34c2f668
LY
268#ifdef CONFIG_CPU_MICROMIPS
269 /*
270 * addiusp -imm
271 * addius5 sp,-imm
272 * addiu32 sp,sp,-imm
273 * jradiussp - NOT SUPPORTED
274 *
275 * microMIPS is not more fun...
276 */
277 if (mm_insn_16bit(ip->halfword[0])) {
278 union mips_instruction mmi;
279
280 mmi.word = (ip->halfword[0] << 16);
635c9907
RB
281 return (mmi.mm16_r3_format.opcode == mm_pool16d_op &&
282 mmi.mm16_r3_format.simmediate && mm_addiusp_func) ||
283 (mmi.mm16_r5_format.opcode == mm_pool16d_op &&
284 mmi.mm16_r5_format.rt == 29);
34c2f668 285 }
635c9907
RB
286 return ip->mm_i_format.opcode == mm_addiu32_op &&
287 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29;
34c2f668 288#else
c0efbb6d
FBH
289 /* addiu/daddiu sp,sp,-imm */
290 if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
291 return 0;
292 if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
293 return 1;
34c2f668 294#endif
c0efbb6d
FBH
295 return 0;
296}
297
f66686f7 298static int get_frame_info(struct mips_frame_info *info)
1da177e4 299{
34c2f668
LY
300#ifdef CONFIG_CPU_MICROMIPS
301 union mips_instruction *ip = (void *) (((char *) info->func) - 1);
302#else
c0efbb6d 303 union mips_instruction *ip = info->func;
34c2f668 304#endif
29b376ff
FBH
305 unsigned max_insns = info->func_size / sizeof(union mips_instruction);
306 unsigned i;
c0efbb6d 307
1da177e4 308 info->pc_offset = -1;
63077519 309 info->frame_size = 0;
1da177e4 310
29b376ff
FBH
311 if (!ip)
312 goto err;
313
314 if (max_insns == 0)
315 max_insns = 128U; /* unknown function size */
316 max_insns = min(128U, max_insns);
317
c0efbb6d
FBH
318 for (i = 0; i < max_insns; i++, ip++) {
319
e7438c4b 320 if (is_jump_ins(ip))
63077519 321 break;
0cceb4aa
FBH
322 if (!info->frame_size) {
323 if (is_sp_move_ins(ip))
34c2f668
LY
324 {
325#ifdef CONFIG_CPU_MICROMIPS
326 if (mm_insn_16bit(ip->halfword[0]))
327 {
328 unsigned short tmp;
329
330 if (ip->halfword[0] & mm_addiusp_func)
331 {
332 tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
333 info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
334 } else {
335 tmp = (ip->halfword[0] >> 1);
336 info->frame_size = -(signed short)(tmp & 0xf);
337 }
338 ip = (void *) &ip->halfword[1];
339 ip--;
340 } else
341#endif
0cceb4aa 342 info->frame_size = - ip->i_format.simmediate;
34c2f668 343 }
0cceb4aa 344 continue;
63077519 345 }
0cceb4aa 346 if (info->pc_offset == -1 && is_ra_save_ins(ip)) {
63077519
AN
347 info->pc_offset =
348 ip->i_format.simmediate / sizeof(long);
0cceb4aa 349 break;
1da177e4
LT
350 }
351 }
f66686f7
AN
352 if (info->frame_size && info->pc_offset >= 0) /* nested */
353 return 0;
354 if (info->pc_offset < 0) /* leaf */
355 return 1;
356 /* prologue seems boggus... */
29b376ff 357err:
f66686f7 358 return -1;
1da177e4
LT
359}
360
b5943182
FBH
361static struct mips_frame_info schedule_mfi __read_mostly;
362
5000653e
TW
363#ifdef CONFIG_KALLSYMS
364static unsigned long get___schedule_addr(void)
365{
366 return kallsyms_lookup_name("__schedule");
367}
368#else
369static unsigned long get___schedule_addr(void)
370{
371 union mips_instruction *ip = (void *)schedule;
372 int max_insns = 8;
373 int i;
374
375 for (i = 0; i < max_insns; i++, ip++) {
376 if (ip->j_format.opcode == j_op)
377 return J_TARGET(ip, ip->j_format.target);
378 }
379 return 0;
380}
381#endif
382
1da177e4
LT
383static int __init frame_info_init(void)
384{
b5943182 385 unsigned long size = 0;
63077519 386#ifdef CONFIG_KALLSYMS
b5943182 387 unsigned long ofs;
5000653e
TW
388#endif
389 unsigned long addr;
b5943182 390
5000653e
TW
391 addr = get___schedule_addr();
392 if (!addr)
393 addr = (unsigned long)schedule;
394
395#ifdef CONFIG_KALLSYMS
396 kallsyms_lookup_size_offset(addr, &size, &ofs);
63077519 397#endif
5000653e 398 schedule_mfi.func = (void *)addr;
b5943182
FBH
399 schedule_mfi.func_size = size;
400
401 get_frame_info(&schedule_mfi);
6057a798
FBH
402
403 /*
404 * Without schedule() frame info, result given by
405 * thread_saved_pc() and get_wchan() are not reliable.
406 */
b5943182 407 if (schedule_mfi.pc_offset < 0)
6057a798 408 printk("Can't analyze schedule() prologue at %p\n", schedule);
63077519 409
1da177e4
LT
410 return 0;
411}
412
413arch_initcall(frame_info_init);
414
415/*
416 * Return saved PC of a blocked thread.
417 */
418unsigned long thread_saved_pc(struct task_struct *tsk)
419{
420 struct thread_struct *t = &tsk->thread;
421
422 /* New born processes are a special case */
423 if (t->reg31 == (unsigned long) ret_from_fork)
424 return t->reg31;
b5943182 425 if (schedule_mfi.pc_offset < 0)
1da177e4 426 return 0;
b5943182 427 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
1da177e4
LT
428}
429
1da177e4 430
f66686f7 431#ifdef CONFIG_KALLSYMS
94ea09c6
DK
432/* generic stack unwinding function */
433unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
434 unsigned long *sp,
435 unsigned long pc,
436 unsigned long *ra)
f66686f7 437{
f66686f7 438 struct mips_frame_info info;
f66686f7 439 unsigned long size, ofs;
4d157d5e 440 int leaf;
1924600c
AN
441 extern void ret_from_irq(void);
442 extern void ret_from_exception(void);
f66686f7 443
f66686f7
AN
444 if (!stack_page)
445 return 0;
446
1924600c
AN
447 /*
448 * If we reached the bottom of interrupt context,
449 * return saved pc in pt_regs.
450 */
451 if (pc == (unsigned long)ret_from_irq ||
452 pc == (unsigned long)ret_from_exception) {
453 struct pt_regs *regs;
454 if (*sp >= stack_page &&
455 *sp + sizeof(*regs) <= stack_page + THREAD_SIZE - 32) {
456 regs = (struct pt_regs *)*sp;
457 pc = regs->cp0_epc;
458 if (__kernel_text_address(pc)) {
459 *sp = regs->regs[29];
460 *ra = regs->regs[31];
461 return pc;
462 }
463 }
464 return 0;
465 }
55b74283 466 if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
f66686f7 467 return 0;
1fd69098 468 /*
25985edc 469 * Return ra if an exception occurred at the first instruction
1fd69098 470 */
1924600c
AN
471 if (unlikely(ofs == 0)) {
472 pc = *ra;
473 *ra = 0;
474 return pc;
475 }
f66686f7
AN
476
477 info.func = (void *)(pc - ofs);
478 info.func_size = ofs; /* analyze from start to ofs */
4d157d5e
FBH
479 leaf = get_frame_info(&info);
480 if (leaf < 0)
f66686f7 481 return 0;
4d157d5e
FBH
482
483 if (*sp < stack_page ||
484 *sp + info.frame_size > stack_page + THREAD_SIZE - 32)
f66686f7
AN
485 return 0;
486
4d157d5e
FBH
487 if (leaf)
488 /*
489 * For some extreme cases, get_frame_info() can
490 * consider wrongly a nested function as a leaf
491 * one. In that cases avoid to return always the
492 * same value.
493 */
1924600c 494 pc = pc != *ra ? *ra : 0;
4d157d5e
FBH
495 else
496 pc = ((unsigned long *)(*sp))[info.pc_offset];
497
498 *sp += info.frame_size;
1924600c 499 *ra = 0;
4d157d5e 500 return __kernel_text_address(pc) ? pc : 0;
f66686f7 501}
94ea09c6
DK
502EXPORT_SYMBOL(unwind_stack_by_address);
503
504/* used by show_backtrace() */
505unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
506 unsigned long pc, unsigned long *ra)
507{
508 unsigned long stack_page = (unsigned long)task_stack_page(task);
509 return unwind_stack_by_address(stack_page, sp, pc, ra);
510}
f66686f7 511#endif
b5943182
FBH
512
513/*
514 * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
515 */
516unsigned long get_wchan(struct task_struct *task)
517{
518 unsigned long pc = 0;
519#ifdef CONFIG_KALLSYMS
520 unsigned long sp;
1924600c 521 unsigned long ra = 0;
b5943182
FBH
522#endif
523
524 if (!task || task == current || task->state == TASK_RUNNING)
525 goto out;
526 if (!task_stack_page(task))
527 goto out;
528
529 pc = thread_saved_pc(task);
530
531#ifdef CONFIG_KALLSYMS
532 sp = task->thread.reg29 + schedule_mfi.frame_size;
533
534 while (in_sched_functions(pc))
1924600c 535 pc = unwind_stack(task, &sp, pc, &ra);
b5943182
FBH
536#endif
537
538out:
539 return pc;
540}
94109102
FBH
541
542/*
543 * Don't forget that the stack pointer must be aligned on a 8 bytes
544 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
545 */
546unsigned long arch_align_stack(unsigned long sp)
547{
548 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
549 sp -= get_random_int() & ~PAGE_MASK;
550
551 return sp & ALMASK;
552}
856839b7
ES
553
554static void arch_dump_stack(void *info)
555{
556 struct pt_regs *regs;
557
558 regs = get_irq_regs();
559
560 if (regs)
561 show_regs(regs);
562
563 dump_stack();
564}
565
566void arch_trigger_all_cpu_backtrace(bool include_self)
567{
568 smp_call_function(arch_dump_stack, NULL, 1);
569}
9791554b
PB
570
571int mips_get_process_fp_mode(struct task_struct *task)
572{
573 int value = 0;
574
575 if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
576 value |= PR_FP_MODE_FR;
577 if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
578 value |= PR_FP_MODE_FRE;
579
580 return value;
581}
582
583int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
584{
585 const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
586 unsigned long switch_count;
587 struct task_struct *t;
588
589 /* Check the value is valid */
590 if (value & ~known_bits)
591 return -EOPNOTSUPP;
592
593 /* Avoid inadvertently triggering emulation */
594 if ((value & PR_FP_MODE_FR) && cpu_has_fpu &&
595 !(current_cpu_data.fpu_id & MIPS_FPIR_F64))
596 return -EOPNOTSUPP;
597 if ((value & PR_FP_MODE_FRE) && cpu_has_fpu && !cpu_has_fre)
598 return -EOPNOTSUPP;
599
13e45f09
MC
600 /* FR = 0 not supported in MIPS R6 */
601 if (!(value & PR_FP_MODE_FR) && cpu_has_fpu && cpu_has_mips_r6)
602 return -EOPNOTSUPP;
603
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PB
604 /* Save FP & vector context, then disable FPU & MSA */
605 if (task->signal == current->signal)
606 lose_fpu(1);
607
608 /* Prevent any threads from obtaining live FP context */
609 atomic_set(&task->mm->context.fp_mode_switching, 1);
610 smp_mb__after_atomic();
611
612 /*
613 * If there are multiple online CPUs then wait until all threads whose
614 * FP mode is about to change have been context switched. This approach
615 * allows us to only worry about whether an FP mode switch is in
616 * progress when FP is first used in a tasks time slice. Pretty much all
617 * of the mode switch overhead can thus be confined to cases where mode
92a76f6d 618 * switches are actually occurring. That is, to here. However for the
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PB
619 * thread performing the mode switch it may take a while...
620 */
621 if (num_online_cpus() > 1) {
622 spin_lock_irq(&task->sighand->siglock);
623
624 for_each_thread(task, t) {
625 if (t == current)
626 continue;
627
628 switch_count = t->nvcsw + t->nivcsw;
629
630 do {
631 spin_unlock_irq(&task->sighand->siglock);
632 cond_resched();
633 spin_lock_irq(&task->sighand->siglock);
634 } while ((t->nvcsw + t->nivcsw) == switch_count);
635 }
636
637 spin_unlock_irq(&task->sighand->siglock);
638 }
639
640 /*
641 * There are now no threads of the process with live FP context, so it
642 * is safe to proceed with the FP mode switch.
643 */
644 for_each_thread(task, t) {
645 /* Update desired FP register width */
646 if (value & PR_FP_MODE_FR) {
647 clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
648 } else {
649 set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
650 clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
651 }
652
653 /* Update desired FP single layout */
654 if (value & PR_FP_MODE_FRE)
655 set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
656 else
657 clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
658 }
659
660 /* Allow threads to use FP again */
661 atomic_set(&task->mm->context.fp_mode_switching, 0);
662
663 return 0;
664}