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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
f65e4fa8 | 6 | * Copyright (C) 1999, 2000, 06 Ralf Baechle (ralf@linux-mips.org) |
1da177e4 LT |
7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. |
8 | */ | |
9 | #ifndef _ASM_SPINLOCK_H | |
10 | #define _ASM_SPINLOCK_H | |
11 | ||
726328d9 | 12 | #include <asm/processor.h> |
346e91ee WD |
13 | |
14 | #include <asm-generic/qspinlock_types.h> | |
15 | ||
16 | #define queued_spin_unlock queued_spin_unlock | |
17 | /** | |
18 | * queued_spin_unlock - release a queued spinlock | |
19 | * @lock : Pointer to queued spinlock structure | |
20 | */ | |
21 | static inline void queued_spin_unlock(struct qspinlock *lock) | |
22 | { | |
23 | /* This could be optimised with ARCH_HAS_MMIOWB */ | |
24 | mmiowb(); | |
25 | smp_store_release(&lock->locked, 0); | |
26 | } | |
27 | ||
0b17c967 | 28 | #include <asm/qspinlock.h> |
d8d0da4e | 29 | #include <asm/qrwlock.h> |
1da177e4 | 30 | |
1da177e4 | 31 | #endif /* _ASM_SPINLOCK_H */ |