[linux-2.6-block.git] / arch / mips / include / asm / pgtable.h

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2003 Ralf Baechle
 */
#ifndef _ASM_PGTABLE_H
#define _ASM_PGTABLE_H

#include <linux/mm_types.h>
#include <linux/mmzone.h>
#ifdef CONFIG_32BIT
#include <asm/pgtable-32.h>
#endif
#ifdef CONFIG_64BIT
#include <asm/pgtable-64.h>
#endif

#include <asm/io.h>
#include <asm/pgtable-bits.h>

struct mm_struct;
struct vm_area_struct;

#define PAGE_NONE	__pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT)
#define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | \
				 _page_cachable_default)
#define PAGE_COPY	__pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_NO_EXEC | \
				 _page_cachable_default)
#define PAGE_READONLY	__pgprot(_PAGE_PRESENT | _PAGE_READ | \
				 _page_cachable_default)
#define PAGE_KERNEL	__pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
				 _PAGE_GLOBAL | _page_cachable_default)
#define PAGE_KERNEL_NC	__pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
				 _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT)
#define PAGE_USERIO	__pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
				 _page_cachable_default)
#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
			__WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)

/*
 * If _PAGE_NO_EXEC is not defined, we can't do page protection for
 * execute, and consider it to be the same as read. Also, write
 * permissions imply read permissions. This is the closest we can get
 * by reasonable means..
 */

/*
 * Dummy values to fill the table in mmap.c
 * The real values will be generated at runtime
 */
#define __P000 __pgprot(0)
#define __P001 __pgprot(0)
#define __P010 __pgprot(0)
#define __P011 __pgprot(0)
#define __P100 __pgprot(0)
#define __P101 __pgprot(0)
#define __P110 __pgprot(0)
#define __P111 __pgprot(0)

#define __S000 __pgprot(0)
#define __S001 __pgprot(0)
#define __S010 __pgprot(0)
#define __S011 __pgprot(0)
#define __S100 __pgprot(0)
#define __S101 __pgprot(0)
#define __S110 __pgprot(0)
#define __S111 __pgprot(0)

extern unsigned long _page_cachable_default;

/*
 * ZERO_PAGE is a global shared page that is always zero; used
 * for zero-mapped memory areas etc..
 */

extern unsigned long empty_zero_page;
extern unsigned long zero_page_mask;

#define ZERO_PAGE(vaddr) \
	(virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
#define __HAVE_COLOR_ZERO_PAGE

extern void paging_init(void);

/*
 * Conversion functions: convert a page and protection to a page entry,
 * and a page entry and page directory to the page they refer to.
 */
#define pmd_phys(pmd)		virt_to_phys((void *)pmd_val(pmd))

#define __pmd_page(pmd)		(pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
#ifndef CONFIG_TRANSPARENT_HUGEPAGE
#define pmd_page(pmd)		__pmd_page(pmd)
#endif /* CONFIG_TRANSPARENT_HUGEPAGE  */

#define pmd_page_vaddr(pmd)	pmd_val(pmd)

#define htw_stop()							\
do {									\
	unsigned long flags;						\
									\
	if (cpu_has_htw) {						\
		local_irq_save(flags);					\
		if(!raw_current_cpu_data.htw_seq++) {			\
			write_c0_pwctl(read_c0_pwctl() &		\
				       ~(1 << MIPS_PWCTL_PWEN_SHIFT));	\
			back_to_back_c0_hazard();			\
		}							\
		local_irq_restore(flags);				\
	}								\
} while(0)

#define htw_start()							\
do {									\
	unsigned long flags;						\
									\
	if (cpu_has_htw) {						\
		local_irq_save(flags);					\
		if (!--raw_current_cpu_data.htw_seq) {			\
			write_c0_pwctl(read_c0_pwctl() |		\
				       (1 << MIPS_PWCTL_PWEN_SHIFT));	\
			back_to_back_c0_hazard();			\
		}							\
		local_irq_restore(flags);				\
	}								\
} while(0)

#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)

#define pte_none(pte)		(!(((pte).pte_high) & ~_PAGE_GLOBAL))
#define pte_present(pte)	((pte).pte_low & _PAGE_PRESENT)

static inline void set_pte(pte_t *ptep, pte_t pte)
{
	ptep->pte_high = pte.pte_high;
	smp_wmb();
	ptep->pte_low = pte.pte_low;

	if (pte.pte_high & _PAGE_GLOBAL) {
		pte_t *buddy = ptep_buddy(ptep);
		/*
		 * Make sure the buddy is global too (if it's !none,
		 * it better already be global)
		 */
		if (pte_none(*buddy))
			buddy->pte_high |= _PAGE_GLOBAL;
	}
}
#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)

static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
{
	pte_t null = __pte(0);

	htw_stop();
	/* Preserve global status for the pair */
	if (ptep_buddy(ptep)->pte_high & _PAGE_GLOBAL)
		null.pte_high = _PAGE_GLOBAL;

	set_pte_at(mm, addr, ptep, null);
	htw_start();
}
#else

#define pte_none(pte)		(!(pte_val(pte) & ~_PAGE_GLOBAL))
#define pte_present(pte)	(pte_val(pte) & _PAGE_PRESENT)

/*
 * Certain architectures need to do special things when pte's
 * within a page table are directly modified.  Thus, the following
 * hook is made available.
 */
static inline void set_pte(pte_t *ptep, pte_t pteval)
{
	*ptep = pteval;
#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
	if (pte_val(pteval) & _PAGE_GLOBAL) {
		pte_t *buddy = ptep_buddy(ptep);
		/*
		 * Make sure the buddy is global too (if it's !none,
		 * it better already be global)
		 */
		if (pte_none(*buddy))
			pte_val(*buddy) = pte_val(*buddy) | _PAGE_GLOBAL;
	}
#endif
}
#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)

static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
{
	htw_stop();
#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
	/* Preserve global status for the pair */
	if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
		set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));
	else
#endif
		set_pte_at(mm, addr, ptep, __pte(0));
	htw_start();
}
#endif

/*
 * (pmds are folded into puds so this doesn't get actually called,
 * but the define is needed for a generic inline function.)
 */
#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)

#ifndef __PAGETABLE_PMD_FOLDED
/*
 * (puds are folded into pgds so this doesn't get actually called,
 * but the define is needed for a generic inline function.)
 */
#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
#endif

#define PGD_T_LOG2	(__builtin_ffs(sizeof(pgd_t)) - 1)
#define PMD_T_LOG2	(__builtin_ffs(sizeof(pmd_t)) - 1)
#define PTE_T_LOG2	(__builtin_ffs(sizeof(pte_t)) - 1)

/*
 * We used to declare this array with size but gcc 3.3 and older are not able
 * to find that this expression is a constant, so the size is dropped.
 */
extern pgd_t swapper_pg_dir[];

/*
 * The following only work if pte_present() is true.
 * Undefined behaviour if not..
 */
#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
static inline int pte_write(pte_t pte)	{ return pte.pte_low & _PAGE_WRITE; }
static inline int pte_dirty(pte_t pte)	{ return pte.pte_low & _PAGE_MODIFIED; }
static inline int pte_young(pte_t pte)	{ return pte.pte_low & _PAGE_ACCESSED; }

static inline pte_t pte_wrprotect(pte_t pte)
{
	pte.pte_low  &= ~_PAGE_WRITE;
	pte.pte_high &= ~_PAGE_SILENT_WRITE;
	return pte;
}

static inline pte_t pte_mkclean(pte_t pte)
{
	pte.pte_low  &= ~_PAGE_MODIFIED;
	pte.pte_high &= ~_PAGE_SILENT_WRITE;
	return pte;
}

static inline pte_t pte_mkold(pte_t pte)
{
	pte.pte_low  &= ~_PAGE_ACCESSED;
	pte.pte_high &= ~_PAGE_SILENT_READ;
	return pte;
}

static inline pte_t pte_mkwrite(pte_t pte)
{
	pte.pte_low |= _PAGE_WRITE;
	if (pte.pte_low & _PAGE_MODIFIED)
		pte.pte_high |= _PAGE_SILENT_WRITE;
	return pte;
}

static inline pte_t pte_mkdirty(pte_t pte)
{
	pte.pte_low |= _PAGE_MODIFIED;
	if (pte.pte_low & _PAGE_WRITE)
		pte.pte_high |= _PAGE_SILENT_WRITE;
	return pte;
}

static inline pte_t pte_mkyoung(pte_t pte)
{
	pte.pte_low |= _PAGE_ACCESSED;
	if (pte.pte_low & _PAGE_READ)
		pte.pte_high |= _PAGE_SILENT_READ;
	return pte;
}
#else
static inline int pte_write(pte_t pte)	{ return pte_val(pte) & _PAGE_WRITE; }
static inline int pte_dirty(pte_t pte)	{ return pte_val(pte) & _PAGE_MODIFIED; }
static inline int pte_young(pte_t pte)	{ return pte_val(pte) & _PAGE_ACCESSED; }

static inline pte_t pte_wrprotect(pte_t pte)
{
	pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
	return pte;
}

static inline pte_t pte_mkclean(pte_t pte)
{
	pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
	return pte;
}

static inline pte_t pte_mkold(pte_t pte)
{
	pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
	return pte;
}

static inline pte_t pte_mkwrite(pte_t pte)
{
	pte_val(pte) |= _PAGE_WRITE;
	if (pte_val(pte) & _PAGE_MODIFIED)
		pte_val(pte) |= _PAGE_SILENT_WRITE;
	return pte;
}

static inline pte_t pte_mkdirty(pte_t pte)
{
	pte_val(pte) |= _PAGE_MODIFIED;
	if (pte_val(pte) & _PAGE_WRITE)
		pte_val(pte) |= _PAGE_SILENT_WRITE;
	return pte;
}

static inline pte_t pte_mkyoung(pte_t pte)
{
	pte_val(pte) |= _PAGE_ACCESSED;
#ifdef CONFIG_CPU_MIPSR2
	if (!(pte_val(pte) & _PAGE_NO_READ))
		pte_val(pte) |= _PAGE_SILENT_READ;
	else
#endif
	if (pte_val(pte) & _PAGE_READ)
		pte_val(pte) |= _PAGE_SILENT_READ;
	return pte;
}

#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
static inline int pte_huge(pte_t pte)	{ return pte_val(pte) & _PAGE_HUGE; }

static inline pte_t pte_mkhuge(pte_t pte)
{
	pte_val(pte) |= _PAGE_HUGE;
	return pte;
}
#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
#endif
static inline int pte_special(pte_t pte)	{ return 0; }
static inline pte_t pte_mkspecial(pte_t pte)	{ return pte; }

/*
 * Macro to make mark a page protection value as "uncacheable".	 Note
 * that "protection" is really a misnomer here as the protection value
 * contains the memory attribute bits, dirty bits, and various other
 * bits as well.
 */
#define pgprot_noncached pgprot_noncached

static inline pgprot_t pgprot_noncached(pgprot_t _prot)
{
	unsigned long prot = pgprot_val(_prot);

	prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;

	return __pgprot(prot);
}

static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
{
	unsigned long prot = pgprot_val(_prot);

	/* cpu_data[0].writecombine is already shifted by _CACHE_SHIFT */
	prot = (prot & ~_CACHE_MASK) | cpu_data[0].writecombine;

	return __pgprot(prot);
}

/*
 * Conversion functions: convert a page and protection to a page entry,
 * and a page entry and page directory to the page they refer to.
 */
#define mk_pte(page, pgprot)	pfn_pte(page_to_pfn(page), (pgprot))

#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
	pte.pte_low  &= (_PAGE_MODIFIED | _PAGE_ACCESSED | _PFNX_MASK);
	pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
	pte.pte_low  |= pgprot_val(newprot) & ~_PFNX_MASK;
	pte.pte_high |= pgprot_val(newprot) & ~_PFN_MASK;
	return pte;
}
#else
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
	return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
}
#endif


extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
	pte_t pte);
extern void __update_cache(struct vm_area_struct *vma, unsigned long address,
	pte_t pte);

static inline void update_mmu_cache(struct vm_area_struct *vma,
	unsigned long address, pte_t *ptep)
{
	pte_t pte = *ptep;
	__update_tlb(vma, address, pte);
	__update_cache(vma, address, pte);
}

static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
	unsigned long address, pmd_t *pmdp)
{
	pte_t pte = *(pte_t *)pmdp;

	__update_tlb(vma, address, pte);
}

#define kern_addr_valid(addr)	(1)

#ifdef CONFIG_PHYS_ADDR_T_64BIT
extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot);

static inline int io_remap_pfn_range(struct vm_area_struct *vma,
		unsigned long vaddr,
		unsigned long pfn,
		unsigned long size,
		pgprot_t prot)
{
	phys_addr_t phys_addr_high = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
	return remap_pfn_range(vma, vaddr, phys_addr_high >> PAGE_SHIFT, size, prot);
}
#define io_remap_pfn_range io_remap_pfn_range
#endif

#ifdef CONFIG_TRANSPARENT_HUGEPAGE

extern int has_transparent_hugepage(void);

static inline int pmd_trans_huge(pmd_t pmd)
{
	return !!(pmd_val(pmd) & _PAGE_HUGE);
}

static inline pmd_t pmd_mkhuge(pmd_t pmd)
{
	pmd_val(pmd) |= _PAGE_HUGE;

	return pmd;
}

static inline int pmd_trans_splitting(pmd_t pmd)
{
	return !!(pmd_val(pmd) & _PAGE_SPLITTING);
}

static inline pmd_t pmd_mksplitting(pmd_t pmd)
{
	pmd_val(pmd) |= _PAGE_SPLITTING;

	return pmd;
}

extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
		       pmd_t *pmdp, pmd_t pmd);

#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
/* Extern to avoid header file madness */
extern void pmdp_splitting_flush(struct vm_area_struct *vma,
					unsigned long address,
					pmd_t *pmdp);

#define __HAVE_ARCH_PMD_WRITE
static inline int pmd_write(pmd_t pmd)
{
	return !!(pmd_val(pmd) & _PAGE_WRITE);
}

static inline pmd_t pmd_wrprotect(pmd_t pmd)
{
	pmd_val(pmd) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
	return pmd;
}

static inline pmd_t pmd_mkwrite(pmd_t pmd)
{
	pmd_val(pmd) |= _PAGE_WRITE;
	if (pmd_val(pmd) & _PAGE_MODIFIED)
		pmd_val(pmd) |= _PAGE_SILENT_WRITE;

	return pmd;
}

static inline int pmd_dirty(pmd_t pmd)
{
	return !!(pmd_val(pmd) & _PAGE_MODIFIED);
}

static inline pmd_t pmd_mkclean(pmd_t pmd)
{
	pmd_val(pmd) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
	return pmd;
}

static inline pmd_t pmd_mkdirty(pmd_t pmd)
{
	pmd_val(pmd) |= _PAGE_MODIFIED;
	if (pmd_val(pmd) & _PAGE_WRITE)
		pmd_val(pmd) |= _PAGE_SILENT_WRITE;

	return pmd;
}

static inline int pmd_young(pmd_t pmd)
{
	return !!(pmd_val(pmd) & _PAGE_ACCESSED);
}

static inline pmd_t pmd_mkold(pmd_t pmd)
{
	pmd_val(pmd) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);

	return pmd;
}

static inline pmd_t pmd_mkyoung(pmd_t pmd)
{
	pmd_val(pmd) |= _PAGE_ACCESSED;

#ifdef CONFIG_CPU_MIPSR2
	if (!(pmd_val(pmd) & _PAGE_NO_READ))
		pmd_val(pmd) |= _PAGE_SILENT_READ;
	else
#endif
	if (pmd_val(pmd) & _PAGE_READ)
		pmd_val(pmd) |= _PAGE_SILENT_READ;

	return pmd;
}

/* Extern to avoid header file madness */
extern pmd_t mk_pmd(struct page *page, pgprot_t prot);

static inline unsigned long pmd_pfn(pmd_t pmd)
{
	return pmd_val(pmd) >> _PFN_SHIFT;
}

static inline struct page *pmd_page(pmd_t pmd)
{
	if (pmd_trans_huge(pmd))
		return pfn_to_page(pmd_pfn(pmd));

	return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT);
}

static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
{
	pmd_val(pmd) = (pmd_val(pmd) & _PAGE_CHG_MASK) | pgprot_val(newprot);
	return pmd;
}

static inline pmd_t pmd_mknotpresent(pmd_t pmd)
{
	pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY);

	return pmd;
}

/*
 * The generic version pmdp_huge_get_and_clear uses a version of pmd_clear() with a
 * different prototype.
 */
#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
					    unsigned long address, pmd_t *pmdp)
{
	pmd_t old = *pmdp;

	pmd_clear(pmdp);

	return old;
}

#endif /* CONFIG_TRANSPARENT_HUGEPAGE */

#include <asm-generic/pgtable.h>

/*
 * uncached accelerated TLB map for video memory access
 */
#ifdef CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED
#define __HAVE_PHYS_MEM_ACCESS_PROT

struct file;
pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
		unsigned long size, pgprot_t vma_prot);
int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
		unsigned long size, pgprot_t *vma_prot);
#endif

/*
 * We provide our own get_unmapped area to cope with the virtual aliasing
 * constraints placed on us by the cache architecture.
 */
#define HAVE_ARCH_UNMAPPED_AREA
#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN

/*
 * No page table caches to initialise
 */
#define pgtable_cache_init()	do { } while (0)

#endif /* _ASM_PGTABLE_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 2003 Ralf Baechle
	7	*/
	8	#ifndef _ASM_PGTABLE_H
	9	#define _ASM_PGTABLE_H
	10
5bbea36a	11	#include <linux/mm_types.h>
970d032f	12	#include <linux/mmzone.h>
875d43e7	13	#ifdef CONFIG_32BIT
1da177e4 LT	14	#include <asm/pgtable-32.h>
1da177e4 LT	15	#endif
875d43e7	16	#ifdef CONFIG_64BIT
1da177e4 LT	17	#include <asm/pgtable-64.h>
	18	#endif
	19
f10fae02	20	#include <asm/io.h>
1da177e4 LT	21	#include <asm/pgtable-bits.h>
1da177e4 LT	22
8c65b4a6 TS	23	struct mm_struct;
	24	struct vm_area_struct;
	25
1da177e4	26	#define PAGE_NONE __pgprot(_PAGE_PRESENT \| _CACHE_CACHABLE_NONCOHERENT)
be0c37c9	27	#define PAGE_SHARED __pgprot(_PAGE_PRESENT \| _PAGE_WRITE \| _PAGE_READ \| \
35133692	28	_page_cachable_default)
be0c37c9 SH	29	#define PAGE_COPY __pgprot(_PAGE_PRESENT \| _PAGE_READ \| _PAGE_NO_EXEC \| \
	30	_page_cachable_default)
	31	#define PAGE_READONLY __pgprot(_PAGE_PRESENT \| _PAGE_READ \| \
35133692	32	_page_cachable_default)
1da177e4	33	#define PAGE_KERNEL __pgprot(_PAGE_PRESENT \| __READABLE \| __WRITEABLE \| \
35133692	34	_PAGE_GLOBAL \| _page_cachable_default)
e2a9e5ad PB	35	#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT \| __READABLE \| __WRITEABLE \| \
e2a9e5ad PB	36	_PAGE_GLOBAL \| _CACHE_CACHABLE_NONCOHERENT)
be0c37c9	37	#define PAGE_USERIO __pgprot(_PAGE_PRESENT \| _PAGE_READ \| _PAGE_WRITE \| \
35133692	38	_page_cachable_default)
1da177e4 LT	39	#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT \| __READABLE \| \
	40	__WRITEABLE \| _PAGE_GLOBAL \| _CACHE_UNCACHED)
	41
	42	/*
6dd9344c DD	43	* If _PAGE_NO_EXEC is not defined, we can't do page protection for
	44	* execute, and consider it to be the same as read. Also, write
	45	* permissions imply read permissions. This is the closest we can get
	46	* by reasonable means..
1da177e4	47	*/
1da177e4	48
35133692 CD	49	/*
	50	* Dummy values to fill the table in mmap.c
	51	* The real values will be generated at runtime
	52	*/
	53	#define __P000 __pgprot(0)
	54	#define __P001 __pgprot(0)
	55	#define __P010 __pgprot(0)
	56	#define __P011 __pgprot(0)
	57	#define __P100 __pgprot(0)
	58	#define __P101 __pgprot(0)
	59	#define __P110 __pgprot(0)
	60	#define __P111 __pgprot(0)
	61
	62	#define __S000 __pgprot(0)
	63	#define __S001 __pgprot(0)
	64	#define __S010 __pgprot(0)
	65	#define __S011 __pgprot(0)
	66	#define __S100 __pgprot(0)
	67	#define __S101 __pgprot(0)
	68	#define __S110 __pgprot(0)
	69	#define __S111 __pgprot(0)
	70
	71	extern unsigned long _page_cachable_default;
1da177e4 LT	72
	73	/*
	74	* ZERO_PAGE is a global shared page that is always zero; used
	75	* for zero-mapped memory areas etc..
	76	*/
	77
	78	extern unsigned long empty_zero_page;
	79	extern unsigned long zero_page_mask;
	80
	81	#define ZERO_PAGE(vaddr) \
99e3b942	82	(virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
816422ad	83	#define __HAVE_COLOR_ZERO_PAGE
62eede62	84
1da177e4 LT	85	extern void paging_init(void);
	86
	87	/*
	88	* Conversion functions: convert a page and protection to a page entry,
	89	* and a page entry and page directory to the page they refer to.
	90	*/
c9d06962	91	#define pmd_phys(pmd) virt_to_phys((void *)pmd_val(pmd))
970d032f RB	92
	93	#define __pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
	94	#ifndef CONFIG_TRANSPARENT_HUGEPAGE
	95	#define pmd_page(pmd) __pmd_page(pmd)
	96	#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
	97
46a82b2d	98	#define pmd_page_vaddr(pmd) pmd_val(pmd)
1da177e4	99
f1014d1b MC	100	#define htw_stop() \
f1014d1b MC	101	do { \
ed4cbc81 MC	102	unsigned long flags; \
ed4cbc81 MC	103	\
461d1597	104	if (cpu_has_htw) { \
ed4cbc81 MC	105	local_irq_save(flags); \
	106	if(!raw_current_cpu_data.htw_seq++) { \
	107	write_c0_pwctl(read_c0_pwctl() & \
	108	~(1 << MIPS_PWCTL_PWEN_SHIFT)); \
	109	back_to_back_c0_hazard(); \
	110	} \
	111	local_irq_restore(flags); \
461d1597	112	} \
f1014d1b MC	113	} while(0)
	114
	115	#define htw_start() \
	116	do { \
ed4cbc81 MC	117	unsigned long flags; \
ed4cbc81 MC	118	\
f1014d1b	119	if (cpu_has_htw) { \
ed4cbc81 MC	120	local_irq_save(flags); \
	121	if (!--raw_current_cpu_data.htw_seq) { \
	122	write_c0_pwctl(read_c0_pwctl() \| \
	123	(1 << MIPS_PWCTL_PWEN_SHIFT)); \
	124	back_to_back_c0_hazard(); \
	125	} \
	126	local_irq_restore(flags); \
f1014d1b MC	127	} \
	128	} while(0)
	129
34adb28d	130	#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
6e953891	131
c5b36783	132	#define pte_none(pte) (!(((pte).pte_high) & ~_PAGE_GLOBAL))
6e953891 SS	133	#define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT)
6e953891 SS	134
1da177e4 LT	135	static inline void set_pte(pte_t *ptep, pte_t pte)
	136	{
	137	ptep->pte_high = pte.pte_high;
	138	smp_wmb();
	139	ptep->pte_low = pte.pte_low;
1da177e4	140
c5b36783	141	if (pte.pte_high & _PAGE_GLOBAL) {
1da177e4 LT	142	pte_t *buddy = ptep_buddy(ptep);
	143	/*
	144	* Make sure the buddy is global too (if it's !none,
	145	* it better already be global)
	146	*/
c5b36783	147	if (pte_none(*buddy))
6e953891	148	buddy->pte_high \|= _PAGE_GLOBAL;
1da177e4 LT	149	}
1da177e4 LT	150	}
5b9593f3	151	#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
1da177e4 LT	152
	153	static inline void pte_clear(struct mm_struct mm, unsigned long addr, pte_t ptep)
	154	{
6e953891 SS	155	pte_t null = __pte(0);
6e953891 SS	156
fde3538a	157	htw_stop();
1da177e4	158	/* Preserve global status for the pair */
c5b36783 SH	159	if (ptep_buddy(ptep)->pte_high & _PAGE_GLOBAL)
c5b36783 SH	160	null.pte_high = _PAGE_GLOBAL;
6e953891 SS	161
6e953891 SS	162	set_pte_at(mm, addr, ptep, null);
fde3538a	163	htw_start();
1da177e4 LT	164	}
1da177e4 LT	165	#else
6e953891 SS	166
	167	#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
	168	#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
	169
1da177e4 LT	170	/*
	171	* Certain architectures need to do special things when pte's
	172	* within a page table are directly modified. Thus, the following
	173	* hook is made available.
	174	*/
	175	static inline void set_pte(pte_t *ptep, pte_t pteval)
	176	{
	177	*ptep = pteval;
	178	#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
	179	if (pte_val(pteval) & _PAGE_GLOBAL) {
	180	pte_t *buddy = ptep_buddy(ptep);
	181	/*
	182	* Make sure the buddy is global too (if it's !none,
	183	* it better already be global)
	184	*/
	185	if (pte_none(*buddy))
	186	pte_val(buddy) = pte_val(buddy) \| _PAGE_GLOBAL;
	187	}
	188	#endif
	189	}
5b9593f3	190	#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
1da177e4 LT	191
	192	static inline void pte_clear(struct mm_struct mm, unsigned long addr, pte_t ptep)
	193	{
fde3538a	194	htw_stop();
1da177e4 LT	195	#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
	196	/* Preserve global status for the pair */
	197	if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
	198	set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));
	199	else
	200	#endif
	201	set_pte_at(mm, addr, ptep, __pte(0));
fde3538a	202	htw_start();
1da177e4 LT	203	}
	204	#endif
	205
	206	/*
c6e8b587	207	* (pmds are folded into puds so this doesn't get actually called,
1da177e4 LT	208	* but the define is needed for a generic inline function.)
	209	*/
	210	#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
c6e8b587	211
325f8a0a	212	#ifndef __PAGETABLE_PMD_FOLDED
c6e8b587 RB	213	/*
	214	* (puds are folded into pgds so this doesn't get actually called,
	215	* but the define is needed for a generic inline function.)
	216	*/
	217	#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
	218	#endif
1da177e4	219
5ff97472 RB	220	#define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1)
	221	#define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1)
	222	#define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1)
1da177e4	223
9975e77d RB	224	/*
	225	* We used to declare this array with size but gcc 3.3 and older are not able
	226	* to find that this expression is a constant, so the size is dropped.
	227	*/
	228	extern pgd_t swapper_pg_dir[];
1da177e4 LT	229
	230	/*
	231	* The following only work if pte_present() is true.
	232	* Undefined behaviour if not..
	233	*/
34adb28d	234	#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
6e953891 SS	235	static inline int pte_write(pte_t pte) { return pte.pte_low & _PAGE_WRITE; }
	236	static inline int pte_dirty(pte_t pte) { return pte.pte_low & _PAGE_MODIFIED; }
	237	static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; }
6e953891	238
1da177e4 LT	239	static inline pte_t pte_wrprotect(pte_t pte)
1da177e4 LT	240	{
c5b36783	241	pte.pte_low &= ~_PAGE_WRITE;
6e953891	242	pte.pte_high &= ~_PAGE_SILENT_WRITE;
1da177e4 LT	243	return pte;
	244	}
	245
1da177e4 LT	246	static inline pte_t pte_mkclean(pte_t pte)
1da177e4 LT	247	{
c5b36783	248	pte.pte_low &= ~_PAGE_MODIFIED;
6e953891	249	pte.pte_high &= ~_PAGE_SILENT_WRITE;
1da177e4 LT	250	return pte;
	251	}
	252
	253	static inline pte_t pte_mkold(pte_t pte)
	254	{
c5b36783	255	pte.pte_low &= ~_PAGE_ACCESSED;
6e953891	256	pte.pte_high &= ~_PAGE_SILENT_READ;
1da177e4 LT	257	return pte;
	258	}
	259
	260	static inline pte_t pte_mkwrite(pte_t pte)
	261	{
6e953891	262	pte.pte_low \|= _PAGE_WRITE;
c5b36783	263	if (pte.pte_low & _PAGE_MODIFIED)
6e953891	264	pte.pte_high \|= _PAGE_SILENT_WRITE;
1da177e4 LT	265	return pte;
	266	}
	267
1da177e4 LT	268	static inline pte_t pte_mkdirty(pte_t pte)
1da177e4 LT	269	{
6e953891	270	pte.pte_low \|= _PAGE_MODIFIED;
c5b36783	271	if (pte.pte_low & _PAGE_WRITE)
6e953891	272	pte.pte_high \|= _PAGE_SILENT_WRITE;
1da177e4 LT	273	return pte;
	274	}
	275
	276	static inline pte_t pte_mkyoung(pte_t pte)
	277	{
6e953891	278	pte.pte_low \|= _PAGE_ACCESSED;
c5b36783	279	if (pte.pte_low & _PAGE_READ)
6e953891	280	pte.pte_high \|= _PAGE_SILENT_READ;
1da177e4 LT	281	return pte;
	282	}
	283	#else
1da177e4 LT	284	static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
	285	static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
	286	static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
1da177e4 LT	287
	288	static inline pte_t pte_wrprotect(pte_t pte)
	289	{
	290	pte_val(pte) &= ~(_PAGE_WRITE \| _PAGE_SILENT_WRITE);
	291	return pte;
	292	}
	293
1da177e4 LT	294	static inline pte_t pte_mkclean(pte_t pte)
1da177e4 LT	295	{
77a5c593	296	pte_val(pte) &= ~(_PAGE_MODIFIED \| _PAGE_SILENT_WRITE);
1da177e4 LT	297	return pte;
	298	}
	299
	300	static inline pte_t pte_mkold(pte_t pte)
	301	{
77a5c593	302	pte_val(pte) &= ~(_PAGE_ACCESSED \| _PAGE_SILENT_READ);
1da177e4 LT	303	return pte;
	304	}
	305
	306	static inline pte_t pte_mkwrite(pte_t pte)
	307	{
	308	pte_val(pte) \|= _PAGE_WRITE;
	309	if (pte_val(pte) & _PAGE_MODIFIED)
	310	pte_val(pte) \|= _PAGE_SILENT_WRITE;
	311	return pte;
	312	}
	313
1da177e4 LT	314	static inline pte_t pte_mkdirty(pte_t pte)
	315	{
	316	pte_val(pte) \|= _PAGE_MODIFIED;
	317	if (pte_val(pte) & _PAGE_WRITE)
	318	pte_val(pte) \|= _PAGE_SILENT_WRITE;
	319	return pte;
	320	}
	321
	322	static inline pte_t pte_mkyoung(pte_t pte)
	323	{
	324	pte_val(pte) \|= _PAGE_ACCESSED;
be0c37c9 SH	325	#ifdef CONFIG_CPU_MIPSR2
	326	if (!(pte_val(pte) & _PAGE_NO_READ))
	327	pte_val(pte) \|= _PAGE_SILENT_READ;
	328	else
	329	#endif
	330	if (pte_val(pte) & _PAGE_READ)
	331	pte_val(pte) \|= _PAGE_SILENT_READ;
1da177e4 LT	332	return pte;
1da177e4 LT	333	}
dd794392	334
05f9883a	335	#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
dd794392 DD	336	static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; }
	337
	338	static inline pte_t pte_mkhuge(pte_t pte)
	339	{
	340	pte_val(pte) \|= _PAGE_HUGE;
	341	return pte;
	342	}
05f9883a	343	#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
1da177e4	344	#endif
7e675137 NP	345	static inline int pte_special(pte_t pte) { return 0; }
7e675137 NP	346	static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
1da177e4 LT	347
1da177e4 LT	348	/*
70342287	349	* Macro to make mark a page protection value as "uncacheable". Note
1da177e4 LT	350	* that "protection" is really a misnomer here as the protection value
	351	* contains the memory attribute bits, dirty bits, and various other
	352	* bits as well.
	353	*/
	354	#define pgprot_noncached pgprot_noncached
	355
	356	static inline pgprot_t pgprot_noncached(pgprot_t _prot)
	357	{
	358	unsigned long prot = pgprot_val(_prot);
	359
	360	prot = (prot & ~_CACHE_MASK) \| _CACHE_UNCACHED;
	361
	362	return __pgprot(prot);
	363	}
	364
4b050ba7 MC	365	static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
	366	{
	367	unsigned long prot = pgprot_val(_prot);
	368
	369	/* cpu_data[0].writecombine is already shifted by _CACHE_SHIFT */
	370	prot = (prot & ~_CACHE_MASK) \| cpu_data[0].writecombine;
	371
	372	return __pgprot(prot);
	373	}
	374
1da177e4 LT	375	/*
	376	* Conversion functions: convert a page and protection to a page entry,
	377	* and a page entry and page directory to the page they refer to.
	378	*/
	379	#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
	380
34adb28d	381	#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
1da177e4 LT	382	static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
1da177e4 LT	383	{
c5b36783	384	pte.pte_low &= (_PAGE_MODIFIED \| _PAGE_ACCESSED \| _PFNX_MASK);
77a5c593	385	pte.pte_high &= (_PFN_MASK \| _CACHE_MASK);
c5b36783 SH	386	pte.pte_low \|= pgprot_val(newprot) & ~_PFNX_MASK;
c5b36783 SH	387	pte.pte_high \|= pgprot_val(newprot) & ~_PFN_MASK;
1da177e4 LT	388	return pte;
	389	}
	390	#else
	391	static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
	392	{
	393	return __pte((pte_val(pte) & _PAGE_CHG_MASK) \| pgprot_val(newprot));
	394	}
	395	#endif
	396
	397
	398	extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
	399	pte_t pte);
5b9593f3 LP	400	extern void __update_cache(struct vm_area_struct *vma, unsigned long address,
5b9593f3 LP	401	pte_t pte);
1da177e4 LT	402
1da177e4 LT	403	static inline void update_mmu_cache(struct vm_area_struct *vma,
4b3073e1	404	unsigned long address, pte_t *ptep)
1da177e4	405	{
4b3073e1	406	pte_t pte = *ptep;
1da177e4	407	__update_tlb(vma, address, pte);
5b9593f3	408	__update_cache(vma, address, pte);
1da177e4 LT	409	}
1da177e4 LT	410
970d032f RB	411	static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
	412	unsigned long address, pmd_t *pmdp)
	413	{
	414	pte_t pte = (pte_t )pmdp;
	415
	416	__update_tlb(vma, address, pte);
	417	}
	418
1da177e4	419	#define kern_addr_valid(addr) (1)
1da177e4	420
34adb28d	421	#ifdef CONFIG_PHYS_ADDR_T_64BIT
1da177e4 LT	422	extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot);
1da177e4 LT	423
1da177e4 LT	424	static inline int io_remap_pfn_range(struct vm_area_struct *vma,
	425	unsigned long vaddr,
	426	unsigned long pfn,
	427	unsigned long size,
	428	pgprot_t prot)
	429	{
15d45cce	430	phys_addr_t phys_addr_high = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
ac5d8c02	431	return remap_pfn_range(vma, vaddr, phys_addr_high >> PAGE_SHIFT, size, prot);
1da177e4	432	}
40d158e6	433	#define io_remap_pfn_range io_remap_pfn_range
1da177e4 LT	434	#endif
1da177e4 LT	435
970d032f RB	436	#ifdef CONFIG_TRANSPARENT_HUGEPAGE
	437
	438	extern int has_transparent_hugepage(void);
	439
	440	static inline int pmd_trans_huge(pmd_t pmd)
	441	{
	442	return !!(pmd_val(pmd) & _PAGE_HUGE);
	443	}
	444
	445	static inline pmd_t pmd_mkhuge(pmd_t pmd)
	446	{
	447	pmd_val(pmd) \|= _PAGE_HUGE;
	448
	449	return pmd;
	450	}
	451
	452	static inline int pmd_trans_splitting(pmd_t pmd)
	453	{
	454	return !!(pmd_val(pmd) & _PAGE_SPLITTING);
	455	}
	456
	457	static inline pmd_t pmd_mksplitting(pmd_t pmd)
	458	{
	459	pmd_val(pmd) \|= _PAGE_SPLITTING;
	460
	461	return pmd;
	462	}
	463
	464	extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
	465	pmd_t *pmdp, pmd_t pmd);
	466
	467	#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
	468	/* Extern to avoid header file madness */
	469	extern void pmdp_splitting_flush(struct vm_area_struct *vma,
	470	unsigned long address,
	471	pmd_t *pmdp);
	472
	473	#define __HAVE_ARCH_PMD_WRITE
	474	static inline int pmd_write(pmd_t pmd)
	475	{
	476	return !!(pmd_val(pmd) & _PAGE_WRITE);
	477	}
	478
	479	static inline pmd_t pmd_wrprotect(pmd_t pmd)
	480	{
	481	pmd_val(pmd) &= ~(_PAGE_WRITE \| _PAGE_SILENT_WRITE);
	482	return pmd;
	483	}
	484
	485	static inline pmd_t pmd_mkwrite(pmd_t pmd)
	486	{
	487	pmd_val(pmd) \|= _PAGE_WRITE;
	488	if (pmd_val(pmd) & _PAGE_MODIFIED)
	489	pmd_val(pmd) \|= _PAGE_SILENT_WRITE;
	490
	491	return pmd;
	492	}
	493
	494	static inline int pmd_dirty(pmd_t pmd)
	495	{
	496	return !!(pmd_val(pmd) & _PAGE_MODIFIED);
	497	}
	498
	499	static inline pmd_t pmd_mkclean(pmd_t pmd)
500	{
501	pmd_val(pmd) &= ~(_PAGE_MODIFIED \| _PAGE_SILENT_WRITE);
502	return pmd;
503	}
504
505	static inline pmd_t pmd_mkdirty(pmd_t pmd)
506	{
507	pmd_val(pmd) \|= _PAGE_MODIFIED;
508	if (pmd_val(pmd) & _PAGE_WRITE)
509	pmd_val(pmd) \|= _PAGE_SILENT_WRITE;
510
511	return pmd;
512	}
513
514	static inline int pmd_young(pmd_t pmd)
515	{
516	return !!(pmd_val(pmd) & _PAGE_ACCESSED);
517	}
518
519	static inline pmd_t pmd_mkold(pmd_t pmd)
520	{
521	pmd_val(pmd) &= ~(_PAGE_ACCESSED\|_PAGE_SILENT_READ);
522
523	return pmd;
524	}
525
526	static inline pmd_t pmd_mkyoung(pmd_t pmd)
527	{
528	pmd_val(pmd) \|= _PAGE_ACCESSED;
529
be0c37c9 SH	530	#ifdef CONFIG_CPU_MIPSR2
	531	if (!(pmd_val(pmd) & _PAGE_NO_READ))
	532	pmd_val(pmd) \|= _PAGE_SILENT_READ;
	533	else
	534	#endif
	535	if (pmd_val(pmd) & _PAGE_READ)
	536	pmd_val(pmd) \|= _PAGE_SILENT_READ;
970d032f RB	537
	538	return pmd;
	539	}
	540
	541	/* Extern to avoid header file madness */
	542	extern pmd_t mk_pmd(struct page *page, pgprot_t prot);
	543
	544	static inline unsigned long pmd_pfn(pmd_t pmd)
	545	{
	546	return pmd_val(pmd) >> _PFN_SHIFT;
	547	}
	548
	549	static inline struct page *pmd_page(pmd_t pmd)
	550	{
	551	if (pmd_trans_huge(pmd))
	552	return pfn_to_page(pmd_pfn(pmd));
	553
	554	return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT);
	555	}
	556
	557	static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
	558	{
	559	pmd_val(pmd) = (pmd_val(pmd) & _PAGE_CHG_MASK) \| pgprot_val(newprot);
	560	return pmd;
	561	}
	562
	563	static inline pmd_t pmd_mknotpresent(pmd_t pmd)
	564	{
	565	pmd_val(pmd) &= ~(_PAGE_PRESENT \| _PAGE_VALID \| _PAGE_DIRTY);
	566
	567	return pmd;
	568	}
	569
	570	/*
8809aa2d	571	* The generic version pmdp_huge_get_and_clear uses a version of pmd_clear() with a
970d032f RB	572	* different prototype.
970d032f RB	573	*/
8809aa2d AK	574	#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
	575	static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
	576	unsigned long address, pmd_t *pmdp)
970d032f RB	577	{
	578	pmd_t old = *pmdp;
	579
	580	pmd_clear(pmdp);
	581
	582	return old;
	583	}
	584
	585	#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
	586
1da177e4 LT	587	#include <asm-generic/pgtable.h>
1da177e4 LT	588
22f1fdfd WZ	589	/*
	590	* uncached accelerated TLB map for video memory access
	591	*/
	592	#ifdef CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED
	593	#define __HAVE_PHYS_MEM_ACCESS_PROT
	594
	595	struct file;
	596	pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
	597	unsigned long size, pgprot_t vma_prot);
	598	int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
	599	unsigned long size, pgprot_t *vma_prot);
	600	#endif
	601
1da177e4 LT	602	/*
	603	* We provide our own get_unmapped area to cope with the virtual aliasing
	604	* constraints placed on us by the cache architecture.
	605	*/
	606	#define HAVE_ARCH_UNMAPPED_AREA
d0be89f6	607	#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
1da177e4 LT	608
	609	/*
	610	* No page table caches to initialise
	611	*/
	612	#define pgtable_cache_init() do { } while (0)
	613
	614	#endif /* _ASM_PGTABLE_H */