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54293ec3 DD |
1 | /***********************license start*************** |
2 | * Author: Cavium Networks | |
3 | * | |
4 | * Contact: support@caviumnetworks.com | |
5 | * This file is part of the OCTEON SDK | |
6 | * | |
c5aa59e8 | 7 | * Copyright (c) 2003-2012 Cavium Networks |
54293ec3 DD |
8 | * |
9 | * This file is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License, Version 2, as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * This file is distributed in the hope that it will be useful, but | |
14 | * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty | |
15 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or | |
16 | * NONINFRINGEMENT. See the GNU General Public License for more | |
17 | * details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this file; if not, write to the Free Software | |
21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
22 | * or visit http://www.gnu.org/licenses/. | |
23 | * | |
24 | * This file may also be available under a different license from Cavium. | |
25 | * Contact Cavium Networks for more information | |
26 | ***********************license end**************************************/ | |
27 | ||
28 | #ifndef __CVMX_LED_DEFS_H__ | |
29 | #define __CVMX_LED_DEFS_H__ | |
30 | ||
aa32a955 DD |
31 | #define CVMX_LED_BLINK (CVMX_ADD_IO_SEG(0x0001180000001A48ull)) |
32 | #define CVMX_LED_CLK_PHASE (CVMX_ADD_IO_SEG(0x0001180000001A08ull)) | |
33 | #define CVMX_LED_CYLON (CVMX_ADD_IO_SEG(0x0001180000001AF8ull)) | |
34 | #define CVMX_LED_DBG (CVMX_ADD_IO_SEG(0x0001180000001A18ull)) | |
35 | #define CVMX_LED_EN (CVMX_ADD_IO_SEG(0x0001180000001A00ull)) | |
36 | #define CVMX_LED_POLARITY (CVMX_ADD_IO_SEG(0x0001180000001A50ull)) | |
37 | #define CVMX_LED_PRT (CVMX_ADD_IO_SEG(0x0001180000001A10ull)) | |
38 | #define CVMX_LED_PRT_FMT (CVMX_ADD_IO_SEG(0x0001180000001A30ull)) | |
39 | #define CVMX_LED_PRT_STATUSX(offset) (CVMX_ADD_IO_SEG(0x0001180000001A80ull) + ((offset) & 7) * 8) | |
40 | #define CVMX_LED_UDD_CNTX(offset) (CVMX_ADD_IO_SEG(0x0001180000001A20ull) + ((offset) & 1) * 8) | |
41 | #define CVMX_LED_UDD_DATX(offset) (CVMX_ADD_IO_SEG(0x0001180000001A38ull) + ((offset) & 1) * 8) | |
42 | #define CVMX_LED_UDD_DAT_CLRX(offset) (CVMX_ADD_IO_SEG(0x0001180000001AC8ull) + ((offset) & 1) * 16) | |
43 | #define CVMX_LED_UDD_DAT_SETX(offset) (CVMX_ADD_IO_SEG(0x0001180000001AC0ull) + ((offset) & 1) * 16) | |
54293ec3 DD |
44 | |
45 | union cvmx_led_blink { | |
46 | uint64_t u64; | |
47 | struct cvmx_led_blink_s { | |
c5aa59e8 | 48 | #ifdef __BIG_ENDIAN_BITFIELD |
54293ec3 DD |
49 | uint64_t reserved_8_63:56; |
50 | uint64_t rate:8; | |
c5aa59e8 DD |
51 | #else |
52 | uint64_t rate:8; | |
53 | uint64_t reserved_8_63:56; | |
54 | #endif | |
54293ec3 DD |
55 | } s; |
56 | struct cvmx_led_blink_s cn38xx; | |
57 | struct cvmx_led_blink_s cn38xxp2; | |
58 | struct cvmx_led_blink_s cn56xx; | |
59 | struct cvmx_led_blink_s cn56xxp1; | |
60 | struct cvmx_led_blink_s cn58xx; | |
61 | struct cvmx_led_blink_s cn58xxp1; | |
62 | }; | |
63 | ||
64 | union cvmx_led_clk_phase { | |
65 | uint64_t u64; | |
66 | struct cvmx_led_clk_phase_s { | |
c5aa59e8 | 67 | #ifdef __BIG_ENDIAN_BITFIELD |
54293ec3 DD |
68 | uint64_t reserved_7_63:57; |
69 | uint64_t phase:7; | |
c5aa59e8 DD |
70 | #else |
71 | uint64_t phase:7; | |
72 | uint64_t reserved_7_63:57; | |
73 | #endif | |
54293ec3 DD |
74 | } s; |
75 | struct cvmx_led_clk_phase_s cn38xx; | |
76 | struct cvmx_led_clk_phase_s cn38xxp2; | |
77 | struct cvmx_led_clk_phase_s cn56xx; | |
78 | struct cvmx_led_clk_phase_s cn56xxp1; | |
79 | struct cvmx_led_clk_phase_s cn58xx; | |
80 | struct cvmx_led_clk_phase_s cn58xxp1; | |
81 | }; | |
82 | ||
83 | union cvmx_led_cylon { | |
84 | uint64_t u64; | |
85 | struct cvmx_led_cylon_s { | |
c5aa59e8 | 86 | #ifdef __BIG_ENDIAN_BITFIELD |
54293ec3 DD |
87 | uint64_t reserved_16_63:48; |
88 | uint64_t rate:16; | |
c5aa59e8 DD |
89 | #else |
90 | uint64_t rate:16; | |
91 | uint64_t reserved_16_63:48; | |
92 | #endif | |
54293ec3 DD |
93 | } s; |
94 | struct cvmx_led_cylon_s cn38xx; | |
95 | struct cvmx_led_cylon_s cn38xxp2; | |
96 | struct cvmx_led_cylon_s cn56xx; | |
97 | struct cvmx_led_cylon_s cn56xxp1; | |
98 | struct cvmx_led_cylon_s cn58xx; | |
99 | struct cvmx_led_cylon_s cn58xxp1; | |
100 | }; | |
101 | ||
102 | union cvmx_led_dbg { | |
103 | uint64_t u64; | |
104 | struct cvmx_led_dbg_s { | |
c5aa59e8 | 105 | #ifdef __BIG_ENDIAN_BITFIELD |
54293ec3 DD |
106 | uint64_t reserved_1_63:63; |
107 | uint64_t dbg_en:1; | |
c5aa59e8 DD |
108 | #else |
109 | uint64_t dbg_en:1; | |
110 | uint64_t reserved_1_63:63; | |
111 | #endif | |
54293ec3 DD |
112 | } s; |
113 | struct cvmx_led_dbg_s cn38xx; | |
114 | struct cvmx_led_dbg_s cn38xxp2; | |
115 | struct cvmx_led_dbg_s cn56xx; | |
116 | struct cvmx_led_dbg_s cn56xxp1; | |
117 | struct cvmx_led_dbg_s cn58xx; | |
118 | struct cvmx_led_dbg_s cn58xxp1; | |
119 | }; | |
120 | ||
121 | union cvmx_led_en { | |
122 | uint64_t u64; | |
123 | struct cvmx_led_en_s { | |
c5aa59e8 | 124 | #ifdef __BIG_ENDIAN_BITFIELD |
54293ec3 DD |
125 | uint64_t reserved_1_63:63; |
126 | uint64_t en:1; | |
c5aa59e8 DD |
127 | #else |
128 | uint64_t en:1; | |
129 | uint64_t reserved_1_63:63; | |
130 | #endif | |
54293ec3 DD |
131 | } s; |
132 | struct cvmx_led_en_s cn38xx; | |
133 | struct cvmx_led_en_s cn38xxp2; | |
134 | struct cvmx_led_en_s cn56xx; | |
135 | struct cvmx_led_en_s cn56xxp1; | |
136 | struct cvmx_led_en_s cn58xx; | |
137 | struct cvmx_led_en_s cn58xxp1; | |
138 | }; | |
139 | ||
140 | union cvmx_led_polarity { | |
141 | uint64_t u64; | |
142 | struct cvmx_led_polarity_s { | |
c5aa59e8 | 143 | #ifdef __BIG_ENDIAN_BITFIELD |
54293ec3 DD |
144 | uint64_t reserved_1_63:63; |
145 | uint64_t polarity:1; | |
c5aa59e8 DD |
146 | #else |
147 | uint64_t polarity:1; | |
148 | uint64_t reserved_1_63:63; | |
149 | #endif | |
54293ec3 DD |
150 | } s; |
151 | struct cvmx_led_polarity_s cn38xx; | |
152 | struct cvmx_led_polarity_s cn38xxp2; | |
153 | struct cvmx_led_polarity_s cn56xx; | |
154 | struct cvmx_led_polarity_s cn56xxp1; | |
155 | struct cvmx_led_polarity_s cn58xx; | |
156 | struct cvmx_led_polarity_s cn58xxp1; | |
157 | }; | |
158 | ||
159 | union cvmx_led_prt { | |
160 | uint64_t u64; | |
161 | struct cvmx_led_prt_s { | |
c5aa59e8 | 162 | #ifdef __BIG_ENDIAN_BITFIELD |
54293ec3 DD |
163 | uint64_t reserved_8_63:56; |
164 | uint64_t prt_en:8; | |
c5aa59e8 DD |
165 | #else |
166 | uint64_t prt_en:8; | |
167 | uint64_t reserved_8_63:56; | |
168 | #endif | |
54293ec3 DD |
169 | } s; |
170 | struct cvmx_led_prt_s cn38xx; | |
171 | struct cvmx_led_prt_s cn38xxp2; | |
172 | struct cvmx_led_prt_s cn56xx; | |
173 | struct cvmx_led_prt_s cn56xxp1; | |
174 | struct cvmx_led_prt_s cn58xx; | |
175 | struct cvmx_led_prt_s cn58xxp1; | |
176 | }; | |
177 | ||
178 | union cvmx_led_prt_fmt { | |
179 | uint64_t u64; | |
180 | struct cvmx_led_prt_fmt_s { | |
c5aa59e8 | 181 | #ifdef __BIG_ENDIAN_BITFIELD |
54293ec3 DD |
182 | uint64_t reserved_4_63:60; |
183 | uint64_t format:4; | |
c5aa59e8 DD |
184 | #else |
185 | uint64_t format:4; | |
186 | uint64_t reserved_4_63:60; | |
187 | #endif | |
54293ec3 DD |
188 | } s; |
189 | struct cvmx_led_prt_fmt_s cn38xx; | |
190 | struct cvmx_led_prt_fmt_s cn38xxp2; | |
191 | struct cvmx_led_prt_fmt_s cn56xx; | |
192 | struct cvmx_led_prt_fmt_s cn56xxp1; | |
193 | struct cvmx_led_prt_fmt_s cn58xx; | |
194 | struct cvmx_led_prt_fmt_s cn58xxp1; | |
195 | }; | |
196 | ||
197 | union cvmx_led_prt_statusx { | |
198 | uint64_t u64; | |
199 | struct cvmx_led_prt_statusx_s { | |
c5aa59e8 | 200 | #ifdef __BIG_ENDIAN_BITFIELD |
54293ec3 DD |
201 | uint64_t reserved_6_63:58; |
202 | uint64_t status:6; | |
c5aa59e8 DD |
203 | #else |
204 | uint64_t status:6; | |
205 | uint64_t reserved_6_63:58; | |
206 | #endif | |
54293ec3 DD |
207 | } s; |
208 | struct cvmx_led_prt_statusx_s cn38xx; | |
209 | struct cvmx_led_prt_statusx_s cn38xxp2; | |
210 | struct cvmx_led_prt_statusx_s cn56xx; | |
211 | struct cvmx_led_prt_statusx_s cn56xxp1; | |
212 | struct cvmx_led_prt_statusx_s cn58xx; | |
213 | struct cvmx_led_prt_statusx_s cn58xxp1; | |
214 | }; | |
215 | ||
216 | union cvmx_led_udd_cntx { | |
217 | uint64_t u64; | |
218 | struct cvmx_led_udd_cntx_s { | |
c5aa59e8 | 219 | #ifdef __BIG_ENDIAN_BITFIELD |
54293ec3 DD |
220 | uint64_t reserved_6_63:58; |
221 | uint64_t cnt:6; | |
c5aa59e8 DD |
222 | #else |
223 | uint64_t cnt:6; | |
224 | uint64_t reserved_6_63:58; | |
225 | #endif | |
54293ec3 DD |
226 | } s; |
227 | struct cvmx_led_udd_cntx_s cn38xx; | |
228 | struct cvmx_led_udd_cntx_s cn38xxp2; | |
229 | struct cvmx_led_udd_cntx_s cn56xx; | |
230 | struct cvmx_led_udd_cntx_s cn56xxp1; | |
231 | struct cvmx_led_udd_cntx_s cn58xx; | |
232 | struct cvmx_led_udd_cntx_s cn58xxp1; | |
233 | }; | |
234 | ||
235 | union cvmx_led_udd_datx { | |
236 | uint64_t u64; | |
237 | struct cvmx_led_udd_datx_s { | |
c5aa59e8 | 238 | #ifdef __BIG_ENDIAN_BITFIELD |
54293ec3 DD |
239 | uint64_t reserved_32_63:32; |
240 | uint64_t dat:32; | |
c5aa59e8 DD |
241 | #else |
242 | uint64_t dat:32; | |
243 | uint64_t reserved_32_63:32; | |
244 | #endif | |
54293ec3 DD |
245 | } s; |
246 | struct cvmx_led_udd_datx_s cn38xx; | |
247 | struct cvmx_led_udd_datx_s cn38xxp2; | |
248 | struct cvmx_led_udd_datx_s cn56xx; | |
249 | struct cvmx_led_udd_datx_s cn56xxp1; | |
250 | struct cvmx_led_udd_datx_s cn58xx; | |
251 | struct cvmx_led_udd_datx_s cn58xxp1; | |
252 | }; | |
253 | ||
254 | union cvmx_led_udd_dat_clrx { | |
255 | uint64_t u64; | |
256 | struct cvmx_led_udd_dat_clrx_s { | |
c5aa59e8 | 257 | #ifdef __BIG_ENDIAN_BITFIELD |
54293ec3 DD |
258 | uint64_t reserved_32_63:32; |
259 | uint64_t clr:32; | |
c5aa59e8 DD |
260 | #else |
261 | uint64_t clr:32; | |
262 | uint64_t reserved_32_63:32; | |
263 | #endif | |
54293ec3 DD |
264 | } s; |
265 | struct cvmx_led_udd_dat_clrx_s cn38xx; | |
266 | struct cvmx_led_udd_dat_clrx_s cn38xxp2; | |
267 | struct cvmx_led_udd_dat_clrx_s cn56xx; | |
268 | struct cvmx_led_udd_dat_clrx_s cn56xxp1; | |
269 | struct cvmx_led_udd_dat_clrx_s cn58xx; | |
270 | struct cvmx_led_udd_dat_clrx_s cn58xxp1; | |
271 | }; | |
272 | ||
273 | union cvmx_led_udd_dat_setx { | |
274 | uint64_t u64; | |
275 | struct cvmx_led_udd_dat_setx_s { | |
c5aa59e8 | 276 | #ifdef __BIG_ENDIAN_BITFIELD |
54293ec3 DD |
277 | uint64_t reserved_32_63:32; |
278 | uint64_t set:32; | |
c5aa59e8 DD |
279 | #else |
280 | uint64_t set:32; | |
281 | uint64_t reserved_32_63:32; | |
282 | #endif | |
54293ec3 DD |
283 | } s; |
284 | struct cvmx_led_udd_dat_setx_s cn38xx; | |
285 | struct cvmx_led_udd_dat_setx_s cn38xxp2; | |
286 | struct cvmx_led_udd_dat_setx_s cn56xx; | |
287 | struct cvmx_led_udd_dat_setx_s cn56xxp1; | |
288 | struct cvmx_led_udd_dat_setx_s cn58xx; | |
289 | struct cvmx_led_udd_dat_setx_s cn58xxp1; | |
290 | }; | |
291 | ||
292 | #endif |