MIPS: Loongson-3: Enable Store Fill Buffer at runtime
[linux-2.6-block.git] / arch / mips / include / asm / mach-loongson64 / kernel-entry-init.h
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1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2005 Embedded Alley Solutions, Inc
7 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
8 * Copyright (C) 2009 Jiajie Chen (chenjiajie@cse.buaa.edu.cn)
9 * Copyright (C) 2012 Huacai Chen (chenhc@lemote.com)
10 */
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11#ifndef __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H
12#define __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H
c4617318 13
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14#include <asm/cpu.h>
15
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16/*
17 * Override macros used in arch/mips/kernel/head.S.
18 */
19 .macro kernel_entry_setup
20#ifdef CONFIG_CPU_LOONGSON3
21 .set push
22 .set mips64
23 /* Set LPA on LOONGSON3 config3 */
97ab1bb4 24 mfc0 t0, CP0_CONFIG3
c4617318 25 or t0, (0x1 << 7)
97ab1bb4 26 mtc0 t0, CP0_CONFIG3
c4617318 27 /* Set ELPA on LOONGSON3 pagegrain */
97ab1bb4 28 mfc0 t0, CP0_PAGEGRAIN
b2edcfc8 29 or t0, (0x1 << 29)
97ab1bb4 30 mtc0 t0, CP0_PAGEGRAIN
1e820da3 31 /* Enable STFill Buffer */
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32 mfc0 t0, CP0_PRID
33 andi t0, (PRID_IMP_MASK | PRID_REV_MASK)
34 slti t0, (PRID_IMP_LOONGSON_64 | PRID_REV_LOONGSON3A_R2)
35 bnez t0, 1f
97ab1bb4 36 mfc0 t0, CP0_CONFIG6
1e820da3 37 or t0, 0x100
97ab1bb4 38 mtc0 t0, CP0_CONFIG6
c824ad16 391:
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40 _ehb
41 .set pop
42#endif
43 .endm
44
45/*
46 * Do SMP slave processor setup.
47 */
48 .macro smp_slave_setup
49#ifdef CONFIG_CPU_LOONGSON3
50 .set push
51 .set mips64
52 /* Set LPA on LOONGSON3 config3 */
97ab1bb4 53 mfc0 t0, CP0_CONFIG3
c4617318 54 or t0, (0x1 << 7)
97ab1bb4 55 mtc0 t0, CP0_CONFIG3
c4617318 56 /* Set ELPA on LOONGSON3 pagegrain */
97ab1bb4 57 mfc0 t0, CP0_PAGEGRAIN
b2edcfc8 58 or t0, (0x1 << 29)
97ab1bb4 59 mtc0 t0, CP0_PAGEGRAIN
1e820da3 60 /* Enable STFill Buffer */
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61 mfc0 t0, CP0_PRID
62 andi t0, (PRID_IMP_MASK | PRID_REV_MASK)
63 slti t0, (PRID_IMP_LOONGSON_64 | PRID_REV_LOONGSON3A_R2)
64 bnez t0, 1f
97ab1bb4 65 mfc0 t0, CP0_CONFIG6
1e820da3 66 or t0, 0x100
97ab1bb4 67 mtc0 t0, CP0_CONFIG6
c824ad16 681:
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69 _ehb
70 .set pop
71#endif
72 .endm
73
30ad29bb 74#endif /* __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H */