[linux-2.6-block.git] / arch / mips / include / asm / mach-loongson / loongson.h

/*
 * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
 * Author: Wu Zhangjin <wuzj@lemote.com>
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 */

#ifndef __ASM_MACH_LOONGSON_LOONGSON_H
#define __ASM_MACH_LOONGSON_LOONGSON_H

#include <linux/io.h>
#include <linux/init.h>

/* loongson internal northbridge initialization */
extern void bonito_irq_init(void);

/* machine-specific reboot/halt operation */
extern void mach_prepare_reboot(void);
extern void mach_prepare_shutdown(void);

/* environment arguments from bootloader */
extern unsigned long bus_clock, cpu_clock_freq;
extern unsigned long memsize, highmemsize;

/* loongson-specific command line, env and memory initialization */
extern void __init prom_init_memory(void);
extern void __init prom_init_cmdline(void);
extern void __init prom_init_machtype(void);
extern void __init prom_init_env(void);

/* irq operation functions */
extern void bonito_irqdispatch(void);
extern void __init bonito_irq_init(void);
extern void __init set_irq_trigger_mode(void);
extern void __init mach_init_irq(void);
extern void mach_irq_dispatch(unsigned int pending);

#define LOONGSON_REG(x) \
	(*(volatile u32 *)((char *)CKSEG1ADDR(LOONGSON_REG_BASE) + (x)))

#define LOONGSON_IRQ_BASE	32
#define LOONGSON2_PERFCNT_IRQ	(MIPS_CPU_IRQ_BASE + 6) /* cpu perf counter */

#define LOONGSON_FLASH_BASE	0x1c000000
#define LOONGSON_FLASH_SIZE	0x02000000	/* 32M */
#define LOONGSON_FLASH_TOP	(LOONGSON_FLASH_BASE+LOONGSON_FLASH_SIZE-1)

#define LOONGSON_LIO0_BASE	0x1e000000
#define LOONGSON_LIO0_SIZE	0x01C00000	/* 28M */
#define LOONGSON_LIO0_TOP	(LOONGSON_LIO0_BASE+LOONGSON_LIO0_SIZE-1)

#define LOONGSON_BOOT_BASE	0x1fc00000
#define LOONGSON_BOOT_SIZE	0x00100000	/* 1M */
#define LOONGSON_BOOT_TOP 	(LOONGSON_BOOT_BASE+LOONGSON_BOOT_SIZE-1)
#define LOONGSON_REG_BASE 	0x1fe00000
#define LOONGSON_REG_SIZE 	0x00100000	/* 256Bytes + 256Bytes + ??? */
#define LOONGSON_REG_TOP	(LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1)

#define LOONGSON_LIO1_BASE 	0x1ff00000
#define LOONGSON_LIO1_SIZE 	0x00100000	/* 1M */
#define LOONGSON_LIO1_TOP	(LOONGSON_LIO1_BASE+LOONGSON_LIO1_SIZE-1)

#define LOONGSON_PCILO0_BASE	0x10000000
#define LOONGSON_PCILO1_BASE	0x14000000
#define LOONGSON_PCILO2_BASE	0x18000000
#define LOONGSON_PCILO_BASE	LOONGSON_PCILO0_BASE
#define LOONGSON_PCILO_SIZE	0x0c000000	/* 64M * 3 */
#define LOONGSON_PCILO_TOP	(LOONGSON_PCILO0_BASE+LOONGSON_PCILO_SIZE-1)

#define LOONGSON_PCICFG_BASE	0x1fe80000
#define LOONGSON_PCICFG_SIZE	0x00000800	/* 2K */
#define LOONGSON_PCICFG_TOP	(LOONGSON_PCICFG_BASE+LOONGSON_PCICFG_SIZE-1)
#define LOONGSON_PCIIO_BASE	0x1fd00000
#define LOONGSON_PCIIO_SIZE	0x00100000	/* 1M */
#define LOONGSON_PCIIO_TOP	(LOONGSON_PCIIO_BASE+LOONGSON_PCIIO_SIZE-1)

/* Loongson Register Bases */

#define LOONGSON_PCICONFIGBASE	0x00
#define LOONGSON_REGBASE	0x100

/* PCI Configuration Registers */

#define LOONGSON_PCI_REG(x)	LOONGSON_REG(LOONGSON_PCICONFIGBASE + (x))
#define LOONGSON_PCIDID		LOONGSON_PCI_REG(0x00)
#define LOONGSON_PCICMD		LOONGSON_PCI_REG(0x04)
#define LOONGSON_PCICLASS 	LOONGSON_PCI_REG(0x08)
#define LOONGSON_PCILTIMER	LOONGSON_PCI_REG(0x0c)
#define LOONGSON_PCIBASE0 	LOONGSON_PCI_REG(0x10)
#define LOONGSON_PCIBASE1 	LOONGSON_PCI_REG(0x14)
#define LOONGSON_PCIBASE2 	LOONGSON_PCI_REG(0x18)
#define LOONGSON_PCIBASE3 	LOONGSON_PCI_REG(0x1c)
#define LOONGSON_PCIBASE4 	LOONGSON_PCI_REG(0x20)
#define LOONGSON_PCIEXPRBASE	LOONGSON_PCI_REG(0x30)
#define LOONGSON_PCIINT		LOONGSON_PCI_REG(0x3c)

#define LOONGSON_PCI_ISR4C	LOONGSON_PCI_REG(0x4c)

#define LOONGSON_PCICMD_PERR_CLR	0x80000000
#define LOONGSON_PCICMD_SERR_CLR	0x40000000
#define LOONGSON_PCICMD_MABORT_CLR	0x20000000
#define LOONGSON_PCICMD_MTABORT_CLR	0x10000000
#define LOONGSON_PCICMD_TABORT_CLR	0x08000000
#define LOONGSON_PCICMD_MPERR_CLR 	0x01000000
#define LOONGSON_PCICMD_PERRRESPEN	0x00000040
#define LOONGSON_PCICMD_ASTEPEN		0x00000080
#define LOONGSON_PCICMD_SERREN		0x00000100
#define LOONGSON_PCILTIMER_BUSLATENCY	0x0000ff00
#define LOONGSON_PCILTIMER_BUSLATENCY_SHIFT	8

/* Loongson h/w Configuration */

#define LOONGSON_GENCFG_OFFSET		0x4
#define LOONGSON_GENCFG	LOONGSON_REG(LOONGSON_REGBASE + LOONGSON_GENCFG_OFFSET)

#define LOONGSON_GENCFG_DEBUGMODE	0x00000001
#define LOONGSON_GENCFG_SNOOPEN		0x00000002
#define LOONGSON_GENCFG_CPUSELFRESET	0x00000004

#define LOONGSON_GENCFG_FORCE_IRQA	0x00000008
#define LOONGSON_GENCFG_IRQA_ISOUT	0x00000010
#define LOONGSON_GENCFG_IRQA_FROM_INT1	0x00000020
#define LOONGSON_GENCFG_BYTESWAP	0x00000040

#define LOONGSON_GENCFG_UNCACHED	0x00000080
#define LOONGSON_GENCFG_PREFETCHEN	0x00000100
#define LOONGSON_GENCFG_WBEHINDEN	0x00000200
#define LOONGSON_GENCFG_CACHEALG	0x00000c00
#define LOONGSON_GENCFG_CACHEALG_SHIFT	10
#define LOONGSON_GENCFG_PCIQUEUE	0x00001000
#define LOONGSON_GENCFG_CACHESTOP	0x00002000
#define LOONGSON_GENCFG_MSTRBYTESWAP	0x00004000
#define LOONGSON_GENCFG_BUSERREN	0x00008000
#define LOONGSON_GENCFG_NORETRYTIMEOUT	0x00010000
#define LOONGSON_GENCFG_SHORTCOPYTIMEOUT	0x00020000

/* PCI address map control */

#define LOONGSON_PCIMAP			LOONGSON_REG(LOONGSON_REGBASE + 0x10)
#define LOONGSON_PCIMEMBASECFG		LOONGSON_REG(LOONGSON_REGBASE + 0x14)
#define LOONGSON_PCIMAP_CFG		LOONGSON_REG(LOONGSON_REGBASE + 0x18)

/* GPIO Regs - r/w */

#define LOONGSON_GPIODATA 		LOONGSON_REG(LOONGSON_REGBASE + 0x1c)
#define LOONGSON_GPIOIE			LOONGSON_REG(LOONGSON_REGBASE + 0x20)

/* ICU Configuration Regs - r/w */

#define LOONGSON_INTEDGE		LOONGSON_REG(LOONGSON_REGBASE + 0x24)
#define LOONGSON_INTSTEER 		LOONGSON_REG(LOONGSON_REGBASE + 0x28)
#define LOONGSON_INTPOL			LOONGSON_REG(LOONGSON_REGBASE + 0x2c)

/* ICU Enable Regs - IntEn & IntISR are r/o. */

#define LOONGSON_INTENSET 		LOONGSON_REG(LOONGSON_REGBASE + 0x30)
#define LOONGSON_INTENCLR 		LOONGSON_REG(LOONGSON_REGBASE + 0x34)
#define LOONGSON_INTEN			LOONGSON_REG(LOONGSON_REGBASE + 0x38)
#define LOONGSON_INTISR			LOONGSON_REG(LOONGSON_REGBASE + 0x3c)

/* ICU */
#define LOONGSON_ICU_MBOXES		0x0000000f
#define LOONGSON_ICU_MBOXES_SHIFT 	0
#define LOONGSON_ICU_DMARDY		0x00000010
#define LOONGSON_ICU_DMAEMPTY		0x00000020
#define LOONGSON_ICU_COPYRDY		0x00000040
#define LOONGSON_ICU_COPYEMPTY		0x00000080
#define LOONGSON_ICU_COPYERR		0x00000100
#define LOONGSON_ICU_PCIIRQ		0x00000200
#define LOONGSON_ICU_MASTERERR		0x00000400
#define LOONGSON_ICU_SYSTEMERR		0x00000800
#define LOONGSON_ICU_DRAMPERR		0x00001000
#define LOONGSON_ICU_RETRYERR		0x00002000
#define LOONGSON_ICU_GPIOS		0x01ff0000
#define LOONGSON_ICU_GPIOS_SHIFT		16
#define LOONGSON_ICU_GPINS		0x7e000000
#define LOONGSON_ICU_GPINS_SHIFT		25
#define LOONGSON_ICU_MBOX(N)		(1<<(LOONGSON_ICU_MBOXES_SHIFT+(N)))
#define LOONGSON_ICU_GPIO(N)		(1<<(LOONGSON_ICU_GPIOS_SHIFT+(N)))
#define LOONGSON_ICU_GPIN(N)		(1<<(LOONGSON_ICU_GPINS_SHIFT+(N)))

/* PCI prefetch window base & mask */

#define LOONGSON_MEM_WIN_BASE_L 	LOONGSON_REG(LOONGSON_REGBASE + 0x40)
#define LOONGSON_MEM_WIN_BASE_H 	LOONGSON_REG(LOONGSON_REGBASE + 0x44)
#define LOONGSON_MEM_WIN_MASK_L 	LOONGSON_REG(LOONGSON_REGBASE + 0x48)
#define LOONGSON_MEM_WIN_MASK_H 	LOONGSON_REG(LOONGSON_REGBASE + 0x4c)

/* PCI_Hit*_Sel_* */

#define LOONGSON_PCI_HIT0_SEL_L		LOONGSON_REG(LOONGSON_REGBASE + 0x50)
#define LOONGSON_PCI_HIT0_SEL_H		LOONGSON_REG(LOONGSON_REGBASE + 0x54)
#define LOONGSON_PCI_HIT1_SEL_L		LOONGSON_REG(LOONGSON_REGBASE + 0x58)
#define LOONGSON_PCI_HIT1_SEL_H		LOONGSON_REG(LOONGSON_REGBASE + 0x5c)
#define LOONGSON_PCI_HIT2_SEL_L		LOONGSON_REG(LOONGSON_REGBASE + 0x60)
#define LOONGSON_PCI_HIT2_SEL_H		LOONGSON_REG(LOONGSON_REGBASE + 0x64)

/* PXArb Config & Status */

#define LOONGSON_PXARB_CFG		LOONGSON_REG(LOONGSON_REGBASE + 0x68)
#define LOONGSON_PXARB_STATUS		LOONGSON_REG(LOONGSON_REGBASE + 0x6c)

/* pcimap */

#define LOONGSON_PCIMAP_PCIMAP_LO0	0x0000003f
#define LOONGSON_PCIMAP_PCIMAP_LO0_SHIFT	0
#define LOONGSON_PCIMAP_PCIMAP_LO1	0x00000fc0
#define LOONGSON_PCIMAP_PCIMAP_LO1_SHIFT	6
#define LOONGSON_PCIMAP_PCIMAP_LO2	0x0003f000
#define LOONGSON_PCIMAP_PCIMAP_LO2_SHIFT	12
#define LOONGSON_PCIMAP_PCIMAP_2	0x00040000
#define LOONGSON_PCIMAP_WIN(WIN, ADDR)	\
	((((ADDR)>>26) & LOONGSON_PCIMAP_PCIMAP_LO0) << ((WIN)*6))

#endif /* __ASM_MACH_LOONGSON_LOONGSON_H */
Commit	Line	Data
5e983ff6 WZ	1	/*
	2	* Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology
	3	* Author: Wu Zhangjin <wuzj@lemote.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms of the GNU General Public License as published by the
	7	* Free Software Foundation; either version 2 of the License, or (at your
	8	* option) any later version.
	9	*
	10	*/
	11
	12	#ifndef __ASM_MACH_LOONGSON_LOONGSON_H
	13	#define __ASM_MACH_LOONGSON_LOONGSON_H
	14
	15	#include <linux/io.h>
	16	#include <linux/init.h>
	17
5e983ff6 WZ	18	/* loongson internal northbridge initialization */
	19	extern void bonito_irq_init(void);
	20
85749d24 WZ	21	/* machine-specific reboot/halt operation */
	22	extern void mach_prepare_reboot(void);
	23	extern void mach_prepare_shutdown(void);
	24
5e983ff6 WZ	25	/* environment arguments from bootloader */
	26	extern unsigned long bus_clock, cpu_clock_freq;
	27	extern unsigned long memsize, highmemsize;
	28
	29	/* loongson-specific command line, env and memory initialization */
	30	extern void __init prom_init_memory(void);
	31	extern void __init prom_init_cmdline(void);
04cfb90a	32	extern void __init prom_init_machtype(void);
5e983ff6 WZ	33	extern void __init prom_init_env(void);
5e983ff6 WZ	34
85749d24 WZ	35	/* irq operation functions */
	36	extern void bonito_irqdispatch(void);
	37	extern void __init bonito_irq_init(void);
	38	extern void __init set_irq_trigger_mode(void);
	39	extern void __init mach_init_irq(void);
	40	extern void mach_irq_dispatch(unsigned int pending);
	41
e2fee572 WZ	42	#define LOONGSON_REG(x) \
	43	((volatile u32 )((char *)CKSEG1ADDR(LOONGSON_REG_BASE) + (x)))
	44
	45	#define LOONGSON_IRQ_BASE 32
	46	#define LOONGSON2_PERFCNT_IRQ (MIPS_CPU_IRQ_BASE + 6) /* cpu perf counter */
	47
	48	#define LOONGSON_FLASH_BASE 0x1c000000
	49	#define LOONGSON_FLASH_SIZE 0x02000000 /* 32M */
	50	#define LOONGSON_FLASH_TOP (LOONGSON_FLASH_BASE+LOONGSON_FLASH_SIZE-1)
	51
	52	#define LOONGSON_LIO0_BASE 0x1e000000
	53	#define LOONGSON_LIO0_SIZE 0x01C00000 /* 28M */
	54	#define LOONGSON_LIO0_TOP (LOONGSON_LIO0_BASE+LOONGSON_LIO0_SIZE-1)
	55
	56	#define LOONGSON_BOOT_BASE 0x1fc00000
	57	#define LOONGSON_BOOT_SIZE 0x00100000 /* 1M */
	58	#define LOONGSON_BOOT_TOP (LOONGSON_BOOT_BASE+LOONGSON_BOOT_SIZE-1)
	59	#define LOONGSON_REG_BASE 0x1fe00000
	60	#define LOONGSON_REG_SIZE 0x00100000 /* 256Bytes + 256Bytes + ??? */
	61	#define LOONGSON_REG_TOP (LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1)
	62
	63	#define LOONGSON_LIO1_BASE 0x1ff00000
	64	#define LOONGSON_LIO1_SIZE 0x00100000 /* 1M */
	65	#define LOONGSON_LIO1_TOP (LOONGSON_LIO1_BASE+LOONGSON_LIO1_SIZE-1)
	66
	67	#define LOONGSON_PCILO0_BASE 0x10000000
	68	#define LOONGSON_PCILO1_BASE 0x14000000
	69	#define LOONGSON_PCILO2_BASE 0x18000000
	70	#define LOONGSON_PCILO_BASE LOONGSON_PCILO0_BASE
	71	#define LOONGSON_PCILO_SIZE 0x0c000000 /* 64M * 3 */
	72	#define LOONGSON_PCILO_TOP (LOONGSON_PCILO0_BASE+LOONGSON_PCILO_SIZE-1)
	73
	74	#define LOONGSON_PCICFG_BASE 0x1fe80000
	75	#define LOONGSON_PCICFG_SIZE 0x00000800 /* 2K */
	76	#define LOONGSON_PCICFG_TOP (LOONGSON_PCICFG_BASE+LOONGSON_PCICFG_SIZE-1)
	77	#define LOONGSON_PCIIO_BASE 0x1fd00000
	78	#define LOONGSON_PCIIO_SIZE 0x00100000 /* 1M */
	79	#define LOONGSON_PCIIO_TOP (LOONGSON_PCIIO_BASE+LOONGSON_PCIIO_SIZE-1)
	80
	81	/* Loongson Register Bases */
	82
	83	#define LOONGSON_PCICONFIGBASE 0x00
	84	#define LOONGSON_REGBASE 0x100
	85
f7face03	86	/* PCI Configuration Registers */
e2fee572 WZ	87
	88	#define LOONGSON_PCI_REG(x) LOONGSON_REG(LOONGSON_PCICONFIGBASE + (x))
	89	#define LOONGSON_PCIDID LOONGSON_PCI_REG(0x00)
	90	#define LOONGSON_PCICMD LOONGSON_PCI_REG(0x04)
	91	#define LOONGSON_PCICLASS LOONGSON_PCI_REG(0x08)
	92	#define LOONGSON_PCILTIMER LOONGSON_PCI_REG(0x0c)
	93	#define LOONGSON_PCIBASE0 LOONGSON_PCI_REG(0x10)
	94	#define LOONGSON_PCIBASE1 LOONGSON_PCI_REG(0x14)
	95	#define LOONGSON_PCIBASE2 LOONGSON_PCI_REG(0x18)
	96	#define LOONGSON_PCIBASE3 LOONGSON_PCI_REG(0x1c)
	97	#define LOONGSON_PCIBASE4 LOONGSON_PCI_REG(0x20)
	98	#define LOONGSON_PCIEXPRBASE LOONGSON_PCI_REG(0x30)
	99	#define LOONGSON_PCIINT LOONGSON_PCI_REG(0x3c)
	100
	101	#define LOONGSON_PCI_ISR4C LOONGSON_PCI_REG(0x4c)
	102
	103	#define LOONGSON_PCICMD_PERR_CLR 0x80000000
	104	#define LOONGSON_PCICMD_SERR_CLR 0x40000000
	105	#define LOONGSON_PCICMD_MABORT_CLR 0x20000000
	106	#define LOONGSON_PCICMD_MTABORT_CLR 0x10000000
	107	#define LOONGSON_PCICMD_TABORT_CLR 0x08000000
	108	#define LOONGSON_PCICMD_MPERR_CLR 0x01000000
	109	#define LOONGSON_PCICMD_PERRRESPEN 0x00000040
	110	#define LOONGSON_PCICMD_ASTEPEN 0x00000080
	111	#define LOONGSON_PCICMD_SERREN 0x00000100
	112	#define LOONGSON_PCILTIMER_BUSLATENCY 0x0000ff00
	113	#define LOONGSON_PCILTIMER_BUSLATENCY_SHIFT 8
	114
	115	/* Loongson h/w Configuration */
	116
	117	#define LOONGSON_GENCFG_OFFSET 0x4
	118	#define LOONGSON_GENCFG LOONGSON_REG(LOONGSON_REGBASE + LOONGSON_GENCFG_OFFSET)
	119
	120	#define LOONGSON_GENCFG_DEBUGMODE 0x00000001
	121	#define LOONGSON_GENCFG_SNOOPEN 0x00000002
	122	#define LOONGSON_GENCFG_CPUSELFRESET 0x00000004
	123
	124	#define LOONGSON_GENCFG_FORCE_IRQA 0x00000008
	125	#define LOONGSON_GENCFG_IRQA_ISOUT 0x00000010
	126	#define LOONGSON_GENCFG_IRQA_FROM_INT1 0x00000020
	127	#define LOONGSON_GENCFG_BYTESWAP 0x00000040
	128
	129	#define LOONGSON_GENCFG_UNCACHED 0x00000080
	130	#define LOONGSON_GENCFG_PREFETCHEN 0x00000100
	131	#define LOONGSON_GENCFG_WBEHINDEN 0x00000200
	132	#define LOONGSON_GENCFG_CACHEALG 0x00000c00
	133	#define LOONGSON_GENCFG_CACHEALG_SHIFT 10
	134	#define LOONGSON_GENCFG_PCIQUEUE 0x00001000
	135	#define LOONGSON_GENCFG_CACHESTOP 0x00002000
	136	#define LOONGSON_GENCFG_MSTRBYTESWAP 0x00004000
	137	#define LOONGSON_GENCFG_BUSERREN 0x00008000
	138	#define LOONGSON_GENCFG_NORETRYTIMEOUT 0x00010000
	139	#define LOONGSON_GENCFG_SHORTCOPYTIMEOUT 0x00020000
	140
	141	/* PCI address map control */
	142
	143	#define LOONGSON_PCIMAP LOONGSON_REG(LOONGSON_REGBASE + 0x10)
	144	#define LOONGSON_PCIMEMBASECFG LOONGSON_REG(LOONGSON_REGBASE + 0x14)
	145	#define LOONGSON_PCIMAP_CFG LOONGSON_REG(LOONGSON_REGBASE + 0x18)
	146
	147	/* GPIO Regs - r/w */
	148
	149	#define LOONGSON_GPIODATA LOONGSON_REG(LOONGSON_REGBASE + 0x1c)
	150	#define LOONGSON_GPIOIE LOONGSON_REG(LOONGSON_REGBASE + 0x20)
151
152	/* ICU Configuration Regs - r/w */
153
154	#define LOONGSON_INTEDGE LOONGSON_REG(LOONGSON_REGBASE + 0x24)
155	#define LOONGSON_INTSTEER LOONGSON_REG(LOONGSON_REGBASE + 0x28)
156	#define LOONGSON_INTPOL LOONGSON_REG(LOONGSON_REGBASE + 0x2c)
157
158	/* ICU Enable Regs - IntEn & IntISR are r/o. */
159
160	#define LOONGSON_INTENSET LOONGSON_REG(LOONGSON_REGBASE + 0x30)
161	#define LOONGSON_INTENCLR LOONGSON_REG(LOONGSON_REGBASE + 0x34)
162	#define LOONGSON_INTEN LOONGSON_REG(LOONGSON_REGBASE + 0x38)
163	#define LOONGSON_INTISR LOONGSON_REG(LOONGSON_REGBASE + 0x3c)
164
165	/* ICU */
166	#define LOONGSON_ICU_MBOXES 0x0000000f
167	#define LOONGSON_ICU_MBOXES_SHIFT 0
168	#define LOONGSON_ICU_DMARDY 0x00000010
169	#define LOONGSON_ICU_DMAEMPTY 0x00000020
170	#define LOONGSON_ICU_COPYRDY 0x00000040
171	#define LOONGSON_ICU_COPYEMPTY 0x00000080
172	#define LOONGSON_ICU_COPYERR 0x00000100
173	#define LOONGSON_ICU_PCIIRQ 0x00000200
174	#define LOONGSON_ICU_MASTERERR 0x00000400
175	#define LOONGSON_ICU_SYSTEMERR 0x00000800
176	#define LOONGSON_ICU_DRAMPERR 0x00001000
177	#define LOONGSON_ICU_RETRYERR 0x00002000
178	#define LOONGSON_ICU_GPIOS 0x01ff0000
179	#define LOONGSON_ICU_GPIOS_SHIFT 16
180	#define LOONGSON_ICU_GPINS 0x7e000000
181	#define LOONGSON_ICU_GPINS_SHIFT 25
182	#define LOONGSON_ICU_MBOX(N) (1<<(LOONGSON_ICU_MBOXES_SHIFT+(N)))
183	#define LOONGSON_ICU_GPIO(N) (1<<(LOONGSON_ICU_GPIOS_SHIFT+(N)))
184	#define LOONGSON_ICU_GPIN(N) (1<<(LOONGSON_ICU_GPINS_SHIFT+(N)))
185
186	/* PCI prefetch window base & mask */
187
188	#define LOONGSON_MEM_WIN_BASE_L LOONGSON_REG(LOONGSON_REGBASE + 0x40)
189	#define LOONGSON_MEM_WIN_BASE_H LOONGSON_REG(LOONGSON_REGBASE + 0x44)
190	#define LOONGSON_MEM_WIN_MASK_L LOONGSON_REG(LOONGSON_REGBASE + 0x48)
191	#define LOONGSON_MEM_WIN_MASK_H LOONGSON_REG(LOONGSON_REGBASE + 0x4c)
f7face03 WZ	192
	193	/* PCI_Hit_Sel_ */
	194
e2fee572 WZ	195	#define LOONGSON_PCI_HIT0_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x50)
	196	#define LOONGSON_PCI_HIT0_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x54)
	197	#define LOONGSON_PCI_HIT1_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x58)
	198	#define LOONGSON_PCI_HIT1_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x5c)
	199	#define LOONGSON_PCI_HIT2_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x60)
	200	#define LOONGSON_PCI_HIT2_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x64)
f7face03 WZ	201
	202	/* PXArb Config & Status */
	203
e2fee572 WZ	204	#define LOONGSON_PXARB_CFG LOONGSON_REG(LOONGSON_REGBASE + 0x68)
	205	#define LOONGSON_PXARB_STATUS LOONGSON_REG(LOONGSON_REGBASE + 0x6c)
	206
	207	/* pcimap */
f7face03	208
e2fee572 WZ	209	#define LOONGSON_PCIMAP_PCIMAP_LO0 0x0000003f
	210	#define LOONGSON_PCIMAP_PCIMAP_LO0_SHIFT 0
	211	#define LOONGSON_PCIMAP_PCIMAP_LO1 0x00000fc0
	212	#define LOONGSON_PCIMAP_PCIMAP_LO1_SHIFT 6
	213	#define LOONGSON_PCIMAP_PCIMAP_LO2 0x0003f000
	214	#define LOONGSON_PCIMAP_PCIMAP_LO2_SHIFT 12
	215	#define LOONGSON_PCIMAP_PCIMAP_2 0x00040000
	216	#define LOONGSON_PCIMAP_WIN(WIN, ADDR) \
	217	((((ADDR)>>26) & LOONGSON_PCIMAP_PCIMAP_LO0) << ((WIN)*6))
67b35e5d	218
5e983ff6	219	#endif /* __ASM_MACH_LOONGSON_LOONGSON_H */