treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 333
[linux-2.6-block.git] / arch / mips / include / asm / mach-lantiq / xway / xway_dma.h
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45051539 1/* SPDX-License-Identifier: GPL-2.0-only */
dfec1a82 2/*
dfec1a82 3 *
97b92108 4 * Copyright (C) 2011 John Crispin <john@phrozen.org>
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5 */
6
7#ifndef LTQ_DMA_H__
8#define LTQ_DMA_H__
9
10#define LTQ_DESC_SIZE 0x08 /* each descriptor is 64bit */
11#define LTQ_DESC_NUM 0x40 /* 64 descriptors / channel */
12
70342287 13#define LTQ_DMA_OWN BIT(31) /* owner bit */
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14#define LTQ_DMA_C BIT(30) /* complete bit */
15#define LTQ_DMA_SOP BIT(29) /* start of packet */
16#define LTQ_DMA_EOP BIT(28) /* end of packet */
17#define LTQ_DMA_TX_OFFSET(x) ((x & 0x1f) << 23) /* data bytes offset */
18#define LTQ_DMA_RX_OFFSET(x) ((x & 0x7) << 23) /* data bytes offset */
19#define LTQ_DMA_SIZE_MASK (0xffff) /* the size field is 16 bit */
20
21struct ltq_dma_desc {
22 u32 ctl;
23 u32 addr;
24};
25
26struct ltq_dma_channel {
27 int nr; /* the channel number */
28 int irq; /* the mapped irq */
29 int desc; /* the current descriptor */
70342287 30 struct ltq_dma_desc *desc_base; /* the descriptor base */
dfec1a82 31 int phys; /* physical addr */
2d946e5b 32 struct device *dev;
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33};
34
35enum {
36 DMA_PORT_ETOP = 0,
37 DMA_PORT_DEU,
38};
39
40extern void ltq_dma_enable_irq(struct ltq_dma_channel *ch);
41extern void ltq_dma_disable_irq(struct ltq_dma_channel *ch);
42extern void ltq_dma_ack_irq(struct ltq_dma_channel *ch);
43extern void ltq_dma_open(struct ltq_dma_channel *ch);
44extern void ltq_dma_close(struct ltq_dma_channel *ch);
45extern void ltq_dma_alloc_tx(struct ltq_dma_channel *ch);
46extern void ltq_dma_alloc_rx(struct ltq_dma_channel *ch);
47extern void ltq_dma_free(struct ltq_dma_channel *ch);
48extern void ltq_dma_init_port(int p);
49
50#endif