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d4a67d9d GJ |
1 | /* |
2 | * Atheros AR71XX/AR724X/AR913X common definitions | |
3 | * | |
4 | * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> | |
5 | * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> | |
6 | * | |
7 | * Parts of this file are based on Atheros' 2.6.15 BSP | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License version 2 as published | |
11 | * by the Free Software Foundation. | |
12 | */ | |
13 | ||
14 | #ifndef __ASM_MACH_ATH79_H | |
15 | #define __ASM_MACH_ATH79_H | |
16 | ||
17 | #include <linux/types.h> | |
18 | #include <linux/io.h> | |
19 | ||
20 | enum ath79_soc_type { | |
21 | ATH79_SOC_UNKNOWN, | |
22 | ATH79_SOC_AR7130, | |
23 | ATH79_SOC_AR7141, | |
24 | ATH79_SOC_AR7161, | |
25 | ATH79_SOC_AR7240, | |
26 | ATH79_SOC_AR7241, | |
27 | ATH79_SOC_AR7242, | |
28 | ATH79_SOC_AR9130, | |
6d1c8fde GJ |
29 | ATH79_SOC_AR9132, |
30 | ATH79_SOC_AR9330, | |
31 | ATH79_SOC_AR9331, | |
d8411466 GJ |
32 | ATH79_SOC_AR9341, |
33 | ATH79_SOC_AR9342, | |
34 | ATH79_SOC_AR9344, | |
d4a67d9d GJ |
35 | }; |
36 | ||
37 | extern enum ath79_soc_type ath79_soc; | |
be5f3623 | 38 | extern unsigned int ath79_soc_rev; |
d4a67d9d GJ |
39 | |
40 | static inline int soc_is_ar71xx(void) | |
41 | { | |
42 | return (ath79_soc == ATH79_SOC_AR7130 || | |
43 | ath79_soc == ATH79_SOC_AR7141 || | |
44 | ath79_soc == ATH79_SOC_AR7161); | |
45 | } | |
46 | ||
47 | static inline int soc_is_ar724x(void) | |
48 | { | |
49 | return (ath79_soc == ATH79_SOC_AR7240 || | |
50 | ath79_soc == ATH79_SOC_AR7241 || | |
51 | ath79_soc == ATH79_SOC_AR7242); | |
52 | } | |
53 | ||
54 | static inline int soc_is_ar7240(void) | |
55 | { | |
56 | return (ath79_soc == ATH79_SOC_AR7240); | |
57 | } | |
58 | ||
59 | static inline int soc_is_ar7241(void) | |
60 | { | |
61 | return (ath79_soc == ATH79_SOC_AR7241); | |
62 | } | |
63 | ||
64 | static inline int soc_is_ar7242(void) | |
65 | { | |
66 | return (ath79_soc == ATH79_SOC_AR7242); | |
67 | } | |
68 | ||
69 | static inline int soc_is_ar913x(void) | |
70 | { | |
71 | return (ath79_soc == ATH79_SOC_AR9130 || | |
72 | ath79_soc == ATH79_SOC_AR9132); | |
73 | } | |
74 | ||
04225e1d GJ |
75 | static inline int soc_is_ar933x(void) |
76 | { | |
77 | return (ath79_soc == ATH79_SOC_AR9330 || | |
78 | ath79_soc == ATH79_SOC_AR9331); | |
79 | } | |
80 | ||
d8411466 GJ |
81 | static inline int soc_is_ar9341(void) |
82 | { | |
83 | return (ath79_soc == ATH79_SOC_AR9341); | |
84 | } | |
85 | ||
86 | static inline int soc_is_ar9342(void) | |
87 | { | |
88 | return (ath79_soc == ATH79_SOC_AR9342); | |
89 | } | |
90 | ||
91 | static inline int soc_is_ar9344(void) | |
92 | { | |
93 | return (ath79_soc == ATH79_SOC_AR9344); | |
94 | } | |
95 | ||
96 | static inline int soc_is_ar934x(void) | |
97 | { | |
98 | return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344(); | |
99 | } | |
100 | ||
d4a67d9d GJ |
101 | extern void __iomem *ath79_ddr_base; |
102 | extern void __iomem *ath79_pll_base; | |
103 | extern void __iomem *ath79_reset_base; | |
104 | ||
105 | static inline void ath79_pll_wr(unsigned reg, u32 val) | |
106 | { | |
107 | __raw_writel(val, ath79_pll_base + reg); | |
108 | } | |
109 | ||
110 | static inline u32 ath79_pll_rr(unsigned reg) | |
111 | { | |
112 | return __raw_readl(ath79_pll_base + reg); | |
113 | } | |
114 | ||
115 | static inline void ath79_reset_wr(unsigned reg, u32 val) | |
116 | { | |
117 | __raw_writel(val, ath79_reset_base + reg); | |
118 | } | |
119 | ||
120 | static inline u32 ath79_reset_rr(unsigned reg) | |
121 | { | |
122 | return __raw_readl(ath79_reset_base + reg); | |
123 | } | |
124 | ||
125 | void ath79_device_reset_set(u32 mask); | |
126 | void ath79_device_reset_clear(u32 mask); | |
127 | ||
128 | #endif /* __ASM_MACH_ATH79_H */ |