Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Helpfile for jazzdma.c -- Mips Jazz R4030 DMA controller support | |
3 | */ | |
4 | #ifndef _ASM_JAZZDMA_H | |
5 | #define _ASM_JAZZDMA_H | |
6 | ||
7 | /* | |
8 | * Prototypes and macros | |
9 | */ | |
1da177e4 LT |
10 | extern unsigned long vdma_alloc(unsigned long paddr, unsigned long size); |
11 | extern int vdma_free(unsigned long laddr); | |
12 | extern int vdma_remap(unsigned long laddr, unsigned long paddr, | |
13 | unsigned long size); | |
14 | extern unsigned long vdma_phys2log(unsigned long paddr); | |
15 | extern unsigned long vdma_log2phys(unsigned long laddr); | |
16 | extern void vdma_stats(void); /* for debugging only */ | |
17 | ||
18 | extern void vdma_enable(int channel); | |
19 | extern void vdma_disable(int channel); | |
20 | extern void vdma_set_mode(int channel, int mode); | |
21 | extern void vdma_set_addr(int channel, long addr); | |
22 | extern void vdma_set_count(int channel, int count); | |
23 | extern int vdma_get_residue(int channel); | |
24 | extern int vdma_get_enable(int channel); | |
25 | ||
26 | /* | |
27 | * some definitions used by the driver functions | |
28 | */ | |
29 | #define VDMA_PAGESIZE 4096 | |
30 | #define VDMA_PGTBL_ENTRIES 4096 | |
31 | #define VDMA_PGTBL_SIZE (sizeof(VDMA_PGTBL_ENTRY) * VDMA_PGTBL_ENTRIES) | |
32 | #define VDMA_PAGE_EMPTY 0xff000000 | |
33 | ||
34 | /* | |
35 | * Macros to get page no. and offset of a given address | |
36 | * Note that VDMA_PAGE() works for physical addresses only | |
37 | */ | |
38 | #define VDMA_PAGE(a) ((unsigned int)(a) >> 12) | |
39 | #define VDMA_OFFSET(a) ((unsigned int)(a) & (VDMA_PAGESIZE-1)) | |
40 | ||
41 | /* | |
42 | * error code returned by vdma_alloc() | |
43 | * (See also arch/mips/kernel/jazzdma.c) | |
44 | */ | |
45 | #define VDMA_ERROR 0xffffffff | |
46 | ||
47 | /* | |
48 | * VDMA pagetable entry description | |
49 | */ | |
50 | typedef volatile struct VDMA_PGTBL_ENTRY { | |
51 | unsigned int frame; /* physical frame no. */ | |
52 | unsigned int owner; /* owner of this entry (0=free) */ | |
53 | } VDMA_PGTBL_ENTRY; | |
54 | ||
55 | ||
56 | /* | |
57 | * DMA channel control registers | |
58 | * in the R4030 MCT_ADR chip | |
59 | */ | |
60 | #define JAZZ_R4030_CHNL_MODE 0xE0000100 /* 8 DMA Channel Mode Registers, */ | |
61 | /* 0xE0000100,120,140... */ | |
62 | #define JAZZ_R4030_CHNL_ENABLE 0xE0000108 /* 8 DMA Channel Enable Regs, */ | |
63 | /* 0xE0000108,128,148... */ | |
64 | #define JAZZ_R4030_CHNL_COUNT 0xE0000110 /* 8 DMA Channel Byte Cnt Regs, */ | |
65 | /* 0xE0000110,130,150... */ | |
66 | #define JAZZ_R4030_CHNL_ADDR 0xE0000118 /* 8 DMA Channel Address Regs, */ | |
67 | /* 0xE0000118,138,158... */ | |
68 | ||
69 | /* channel enable register bits */ | |
70 | ||
71 | #define R4030_CHNL_ENABLE (1<<0) | |
72 | #define R4030_CHNL_WRITE (1<<1) | |
73 | #define R4030_TC_INTR (1<<8) | |
74 | #define R4030_MEM_INTR (1<<9) | |
75 | #define R4030_ADDR_INTR (1<<10) | |
76 | ||
77 | /* | |
78 | * Channel mode register bits | |
79 | */ | |
80 | #define R4030_MODE_ATIME_40 (0) /* device access time on remote bus */ | |
81 | #define R4030_MODE_ATIME_80 (1) | |
82 | #define R4030_MODE_ATIME_120 (2) | |
83 | #define R4030_MODE_ATIME_160 (3) | |
84 | #define R4030_MODE_ATIME_200 (4) | |
85 | #define R4030_MODE_ATIME_240 (5) | |
86 | #define R4030_MODE_ATIME_280 (6) | |
87 | #define R4030_MODE_ATIME_320 (7) | |
88 | #define R4030_MODE_WIDTH_8 (1<<3) /* device data bus width */ | |
89 | #define R4030_MODE_WIDTH_16 (2<<3) | |
90 | #define R4030_MODE_WIDTH_32 (3<<3) | |
91 | #define R4030_MODE_INTR_EN (1<<5) | |
92 | #define R4030_MODE_BURST (1<<6) /* Rev. 2 only */ | |
93 | #define R4030_MODE_FAST_ACK (1<<7) /* Rev. 2 only */ | |
94 | ||
95 | #endif /* _ASM_JAZZDMA_H */ |