[linux-2.6-block.git] / arch / mips / include / asm / elf.h

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Much of this is taken from binutils and GNU libc ...
 */
#ifndef _ASM_ELF_H
#define _ASM_ELF_H

#include <linux/auxvec.h>
#include <linux/fs.h>
#include <linux/mm_types.h>

#include <uapi/linux/elf.h>

#include <asm/current.h>

/* ELF header e_flags defines. */
/* MIPS architecture level. */
#define EF_MIPS_ARCH_1		0x00000000	/* -mips1 code.	 */
#define EF_MIPS_ARCH_2		0x10000000	/* -mips2 code.	 */
#define EF_MIPS_ARCH_3		0x20000000	/* -mips3 code.	 */
#define EF_MIPS_ARCH_4		0x30000000	/* -mips4 code.	 */
#define EF_MIPS_ARCH_5		0x40000000	/* -mips5 code.	 */
#define EF_MIPS_ARCH_32		0x50000000	/* MIPS32 code.	 */
#define EF_MIPS_ARCH_64		0x60000000	/* MIPS64 code.	 */
#define EF_MIPS_ARCH_32R2	0x70000000	/* MIPS32 R2 code.  */
#define EF_MIPS_ARCH_64R2	0x80000000	/* MIPS64 R2 code.  */

/* The ABI of a file. */
#define EF_MIPS_ABI_O32		0x00001000	/* O32 ABI.  */
#define EF_MIPS_ABI_O64		0x00002000	/* O32 extended for 64 bit.  */

#define PT_MIPS_REGINFO		0x70000000
#define PT_MIPS_RTPROC		0x70000001
#define PT_MIPS_OPTIONS		0x70000002
#define PT_MIPS_ABIFLAGS	0x70000003

/* Flags in the e_flags field of the header */
#define EF_MIPS_NOREORDER	0x00000001
#define EF_MIPS_PIC		0x00000002
#define EF_MIPS_CPIC		0x00000004
#define EF_MIPS_ABI2		0x00000020
#define EF_MIPS_OPTIONS_FIRST	0x00000080
#define EF_MIPS_32BITMODE	0x00000100
#define EF_MIPS_FP64		0x00000200
#define EF_MIPS_NAN2008		0x00000400
#define EF_MIPS_ABI		0x0000f000
#define EF_MIPS_ARCH		0xf0000000

#define DT_MIPS_RLD_VERSION	0x70000001
#define DT_MIPS_TIME_STAMP	0x70000002
#define DT_MIPS_ICHECKSUM	0x70000003
#define DT_MIPS_IVERSION	0x70000004
#define DT_MIPS_FLAGS		0x70000005
	#define RHF_NONE	0x00000000
	#define RHF_HARDWAY	0x00000001
	#define RHF_NOTPOT	0x00000002
	#define RHF_SGI_ONLY	0x00000010
#define DT_MIPS_BASE_ADDRESS	0x70000006
#define DT_MIPS_CONFLICT	0x70000008
#define DT_MIPS_LIBLIST		0x70000009
#define DT_MIPS_LOCAL_GOTNO	0x7000000a
#define DT_MIPS_CONFLICTNO	0x7000000b
#define DT_MIPS_LIBLISTNO	0x70000010
#define DT_MIPS_SYMTABNO	0x70000011
#define DT_MIPS_UNREFEXTNO	0x70000012
#define DT_MIPS_GOTSYM		0x70000013
#define DT_MIPS_HIPAGENO	0x70000014
#define DT_MIPS_RLD_MAP		0x70000016

#define R_MIPS_NONE		0
#define R_MIPS_16		1
#define R_MIPS_32		2
#define R_MIPS_REL32		3
#define R_MIPS_26		4
#define R_MIPS_HI16		5
#define R_MIPS_LO16		6
#define R_MIPS_GPREL16		7
#define R_MIPS_LITERAL		8
#define R_MIPS_GOT16		9
#define R_MIPS_PC16		10
#define R_MIPS_CALL16		11
#define R_MIPS_GPREL32		12
/* The remaining relocs are defined on Irix, although they are not
   in the MIPS ELF ABI.	 */
#define R_MIPS_UNUSED1		13
#define R_MIPS_UNUSED2		14
#define R_MIPS_UNUSED3		15
#define R_MIPS_SHIFT5		16
#define R_MIPS_SHIFT6		17
#define R_MIPS_64		18
#define R_MIPS_GOT_DISP		19
#define R_MIPS_GOT_PAGE		20
#define R_MIPS_GOT_OFST		21
/*
 * The following two relocation types are specified in the MIPS ABI
 * conformance guide version 1.2 but not yet in the psABI.
 */
#define R_MIPS_GOTHI16		22
#define R_MIPS_GOTLO16		23
#define R_MIPS_SUB		24
#define R_MIPS_INSERT_A		25
#define R_MIPS_INSERT_B		26
#define R_MIPS_DELETE		27
#define R_MIPS_HIGHER		28
#define R_MIPS_HIGHEST		29
/*
 * The following two relocation types are specified in the MIPS ABI
 * conformance guide version 1.2 but not yet in the psABI.
 */
#define R_MIPS_CALLHI16		30
#define R_MIPS_CALLLO16		31
/*
 * Introduced for MIPSr6.
 */
#define R_MIPS_PC21_S2		60
#define R_MIPS_PC26_S2		61
/*
 * This range is reserved for vendor specific relocations.
 */
#define R_MIPS_LOVENDOR		100
#define R_MIPS_HIVENDOR		127

#define SHN_MIPS_ACCOMON	0xff00		/* Allocated common symbols */
#define SHN_MIPS_TEXT		0xff01		/* Allocated test symbols.  */
#define SHN_MIPS_DATA		0xff02		/* Allocated data symbols.  */
#define SHN_MIPS_SCOMMON	0xff03		/* Small common symbols */
#define SHN_MIPS_SUNDEFINED	0xff04		/* Small undefined symbols */

#define SHT_MIPS_LIST		0x70000000
#define SHT_MIPS_CONFLICT	0x70000002
#define SHT_MIPS_GPTAB		0x70000003
#define SHT_MIPS_UCODE		0x70000004
#define SHT_MIPS_DEBUG		0x70000005
#define SHT_MIPS_REGINFO	0x70000006
#define SHT_MIPS_PACKAGE	0x70000007
#define SHT_MIPS_PACKSYM	0x70000008
#define SHT_MIPS_RELD		0x70000009
#define SHT_MIPS_IFACE		0x7000000b
#define SHT_MIPS_CONTENT	0x7000000c
#define SHT_MIPS_OPTIONS	0x7000000d
#define SHT_MIPS_SHDR		0x70000010
#define SHT_MIPS_FDESC		0x70000011
#define SHT_MIPS_EXTSYM		0x70000012
#define SHT_MIPS_DENSE		0x70000013
#define SHT_MIPS_PDESC		0x70000014
#define SHT_MIPS_LOCSYM		0x70000015
#define SHT_MIPS_AUXSYM		0x70000016
#define SHT_MIPS_OPTSYM		0x70000017
#define SHT_MIPS_LOCSTR		0x70000018
#define SHT_MIPS_LINE		0x70000019
#define SHT_MIPS_RFDESC		0x7000001a
#define SHT_MIPS_DELTASYM	0x7000001b
#define SHT_MIPS_DELTAINST	0x7000001c
#define SHT_MIPS_DELTACLASS	0x7000001d
#define SHT_MIPS_DWARF		0x7000001e
#define SHT_MIPS_DELTADECL	0x7000001f
#define SHT_MIPS_SYMBOL_LIB	0x70000020
#define SHT_MIPS_EVENTS		0x70000021
#define SHT_MIPS_TRANSLATE	0x70000022
#define SHT_MIPS_PIXIE		0x70000023
#define SHT_MIPS_XLATE		0x70000024
#define SHT_MIPS_XLATE_DEBUG	0x70000025
#define SHT_MIPS_WHIRL		0x70000026
#define SHT_MIPS_EH_REGION	0x70000027
#define SHT_MIPS_XLATE_OLD	0x70000028
#define SHT_MIPS_PDR_EXCEPTION	0x70000029

#define SHF_MIPS_GPREL		0x10000000
#define SHF_MIPS_MERGE		0x20000000
#define SHF_MIPS_ADDR		0x40000000
#define SHF_MIPS_STRING		0x80000000
#define SHF_MIPS_NOSTRIP	0x08000000
#define SHF_MIPS_LOCAL		0x04000000
#define SHF_MIPS_NAMES		0x02000000
#define SHF_MIPS_NODUPES	0x01000000

#define MIPS_ABI_FP_ANY		0	/* FP ABI doesn't matter */
#define MIPS_ABI_FP_DOUBLE	1	/* -mdouble-float */
#define MIPS_ABI_FP_SINGLE	2	/* -msingle-float */
#define MIPS_ABI_FP_SOFT	3	/* -msoft-float */
#define MIPS_ABI_FP_OLD_64	4	/* -mips32r2 -mfp64 */
#define MIPS_ABI_FP_XX		5	/* -mfpxx */
#define MIPS_ABI_FP_64		6	/* -mips32r2 -mfp64 */
#define MIPS_ABI_FP_64A		7	/* -mips32r2 -mfp64 -mno-odd-spreg */

struct mips_elf_abiflags_v0 {
	uint16_t version;	/* Version of flags structure */
	uint8_t isa_level;	/* The level of the ISA: 1-5, 32, 64 */
	uint8_t isa_rev;	/* The revision of ISA: 0 for MIPS V and below,
				   1-n otherwise */
	uint8_t gpr_size;	/* The size of general purpose registers */
	uint8_t cpr1_size;	/* The size of co-processor 1 registers */
	uint8_t cpr2_size;	/* The size of co-processor 2 registers */
	uint8_t fp_abi;		/* The floating-point ABI */
	uint32_t isa_ext;	/* Mask of processor-specific extensions */
	uint32_t ases;		/* Mask of ASEs used */
	uint32_t flags1;	/* Mask of general flags */
	uint32_t flags2;
};

#ifndef ELF_ARCH
/* ELF register definitions */
#define ELF_NGREG	45
#define ELF_NFPREG	33

typedef unsigned long elf_greg_t;
typedef elf_greg_t elf_gregset_t[ELF_NGREG];

typedef double elf_fpreg_t;
typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];

void mips_dump_regs32(u32 *uregs, const struct pt_regs *regs);
void mips_dump_regs64(u64 *uregs, const struct pt_regs *regs);

#ifdef CONFIG_32BIT
/*
 * This is used to ensure we don't load something for the wrong architecture.
 */
#define elf_check_arch elfo32_check_arch

/*
 * These are used to set parameters in the core dumps.
 */
#define ELF_CLASS	ELFCLASS32

#define ELF_CORE_COPY_REGS(dest, regs) \
	mips_dump_regs32((u32 *)&(dest), (regs));

#endif /* CONFIG_32BIT */

#ifdef CONFIG_64BIT
/*
 * This is used to ensure we don't load something for the wrong architecture.
 */
#define elf_check_arch elfn64_check_arch

/*
 * These are used to set parameters in the core dumps.
 */
#define ELF_CLASS	ELFCLASS64

#define ELF_CORE_COPY_REGS(dest, regs) \
	mips_dump_regs64((u64 *)&(dest), (regs));

#endif /* CONFIG_64BIT */

/*
 * These are used to set parameters in the core dumps.
 */
#ifdef __MIPSEB__
#define ELF_DATA	ELFDATA2MSB
#elif defined(__MIPSEL__)
#define ELF_DATA	ELFDATA2LSB
#endif
#define ELF_ARCH	EM_MIPS

#endif /* !defined(ELF_ARCH) */

/*
 * In order to be sure that we don't attempt to execute an O32 binary which
 * requires 64 bit FP (FR=1) on a system which does not support it we refuse
 * to execute any binary which has bits specified by the following macro set
 * in its ELF header flags.
 */
#ifdef CONFIG_MIPS_O32_FP64_SUPPORT
# define __MIPS_O32_FP64_MUST_BE_ZERO	0
#else
# define __MIPS_O32_FP64_MUST_BE_ZERO	EF_MIPS_FP64
#endif

#define mips_elf_check_machine(x) ((x)->e_machine == EM_MIPS)

#define vmcore_elf32_check_arch mips_elf_check_machine
#define vmcore_elf64_check_arch mips_elf_check_machine

/*
 * Return non-zero if HDR identifies an o32 ELF binary.
 */
#define elfo32_check_arch(hdr)						\
({									\
	int __res = 1;							\
	struct elfhdr *__h = (hdr);					\
									\
	if (!mips_elf_check_machine(__h))				\
		__res = 0;						\
	if (__h->e_ident[EI_CLASS] != ELFCLASS32)			\
		__res = 0;						\
	if ((__h->e_flags & EF_MIPS_ABI2) != 0)				\
		__res = 0;						\
	if (((__h->e_flags & EF_MIPS_ABI) != 0) &&			\
	    ((__h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32))		\
		__res = 0;						\
	if (__h->e_flags & __MIPS_O32_FP64_MUST_BE_ZERO)		\
		__res = 0;						\
									\
	__res;								\
})

/*
 * Return non-zero if HDR identifies an n64 ELF binary.
 */
#define elfn64_check_arch(hdr)						\
({									\
	int __res = 1;							\
	struct elfhdr *__h = (hdr);					\
									\
	if (!mips_elf_check_machine(__h))				\
		__res = 0;						\
	if (__h->e_ident[EI_CLASS] != ELFCLASS64)			\
		__res = 0;						\
									\
	__res;								\
})

/*
 * Return non-zero if HDR identifies an n32 ELF binary.
 */
#define elfn32_check_arch(hdr)						\
({									\
	int __res = 1;							\
	struct elfhdr *__h = (hdr);					\
									\
	if (!mips_elf_check_machine(__h))				\
		__res = 0;						\
	if (__h->e_ident[EI_CLASS] != ELFCLASS32)			\
		__res = 0;						\
	if (((__h->e_flags & EF_MIPS_ABI2) == 0) ||			\
	    ((__h->e_flags & EF_MIPS_ABI) != 0))			\
		__res = 0;						\
									\
	__res;								\
})

struct mips_abi;

extern struct mips_abi mips_abi;
extern struct mips_abi mips_abi_32;
extern struct mips_abi mips_abi_n32;

#ifdef CONFIG_32BIT

#define SET_PERSONALITY2(ex, state)					\
do {									\
	clear_thread_flag(TIF_HYBRID_FPREGS);				\
	set_thread_flag(TIF_32BIT_FPREGS);				\
									\
	current->thread.abi = &mips_abi;				\
									\
	mips_set_personality_fp(state);					\
	mips_set_personality_nan(state);				\
									\
	if (personality(current->personality) != PER_LINUX)		\
		set_personality(PER_LINUX);				\
} while (0)

#endif /* CONFIG_32BIT */

#ifdef CONFIG_64BIT

#ifdef CONFIG_MIPS32_N32
#define __SET_PERSONALITY32_N32()					\
	do {								\
		set_thread_flag(TIF_32BIT_ADDR);			\
									\
		current->thread.abi = &mips_abi_n32;			\
	} while (0)
#else
#define __SET_PERSONALITY32_N32()					\
	do { } while (0)
#endif

#ifdef CONFIG_MIPS32_O32
#define __SET_PERSONALITY32_O32(ex, state)				\
	do {								\
		set_thread_flag(TIF_32BIT_REGS);			\
		set_thread_flag(TIF_32BIT_ADDR);			\
		clear_thread_flag(TIF_HYBRID_FPREGS);			\
		set_thread_flag(TIF_32BIT_FPREGS);			\
									\
		current->thread.abi = &mips_abi_32;			\
									\
		mips_set_personality_fp(state);				\
	} while (0)
#else
#define __SET_PERSONALITY32_O32(ex, state)				\
	do { } while (0)
#endif

#ifdef CONFIG_MIPS32_COMPAT
#define __SET_PERSONALITY32(ex, state)					\
do {									\
	if ((((ex).e_flags & EF_MIPS_ABI2) != 0) &&			\
	     ((ex).e_flags & EF_MIPS_ABI) == 0)				\
		__SET_PERSONALITY32_N32();				\
	else								\
		__SET_PERSONALITY32_O32(ex, state);			\
} while (0)
#else
#define __SET_PERSONALITY32(ex, state) do { } while (0)
#endif

#define SET_PERSONALITY2(ex, state)					\
do {									\
	unsigned int p;							\
									\
	clear_thread_flag(TIF_32BIT_REGS);				\
	clear_thread_flag(TIF_32BIT_FPREGS);				\
	clear_thread_flag(TIF_HYBRID_FPREGS);				\
	clear_thread_flag(TIF_32BIT_ADDR);				\
									\
	if ((ex).e_ident[EI_CLASS] == ELFCLASS32)			\
		__SET_PERSONALITY32(ex, state);				\
	else								\
		current->thread.abi = &mips_abi;			\
									\
	mips_set_personality_nan(state);				\
									\
	p = personality(current->personality);				\
	if (p != PER_LINUX32 && p != PER_LINUX)				\
		set_personality(PER_LINUX);				\
} while (0)

#endif /* CONFIG_64BIT */

#define CORE_DUMP_USE_REGSET
#define ELF_EXEC_PAGESIZE	PAGE_SIZE

/* This yields a mask that user programs can use to figure out what
   instruction set this cpu supports.  This could be done in userspace,
   but it's not easy, and we've already done it here.  */

#define ELF_HWCAP	(elf_hwcap)
extern unsigned int elf_hwcap;
#include <asm/hwcap.h>

/*
 * This yields a string that ld.so will use to load implementation
 * specific libraries for optimization.	 This is more specific in
 * intent than poking at uname or /proc/cpuinfo.
 */

#define ELF_PLATFORM  __elf_platform
extern const char *__elf_platform;

/*
 * See comments in asm-alpha/elf.h, this is the same thing
 * on the MIPS.
 */
#define ELF_PLAT_INIT(_r, load_addr)	do { \
	_r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0;	\
	_r->regs[5] = _r->regs[6] = _r->regs[7] = _r->regs[8] = 0;	\
	_r->regs[9] = _r->regs[10] = _r->regs[11] = _r->regs[12] = 0;	\
	_r->regs[13] = _r->regs[14] = _r->regs[15] = _r->regs[16] = 0;	\
	_r->regs[17] = _r->regs[18] = _r->regs[19] = _r->regs[20] = 0;	\
	_r->regs[21] = _r->regs[22] = _r->regs[23] = _r->regs[24] = 0;	\
	_r->regs[25] = _r->regs[26] = _r->regs[27] = _r->regs[28] = 0;	\
	_r->regs[30] = _r->regs[31] = 0;				\
} while (0)

/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
   use of this is to invoke "./ld.so someprog" to test out a new version of
   the loader.	We need to make sure that it is out of the way of the program
   that it will "exec", and that there is sufficient room for the brk.	*/

#ifndef ELF_ET_DYN_BASE
#define ELF_ET_DYN_BASE		(TASK_SIZE / 3 * 2)
#endif

/* update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes */
#define ARCH_DLINFO							\
do {									\
	NEW_AUX_ENT(AT_SYSINFO_EHDR,					\
		    (unsigned long)current->mm->context.vdso);		\
} while (0)

#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
struct linux_binprm;
extern int arch_setup_additional_pages(struct linux_binprm *bprm,
				       int uses_interp);

struct arch_elf_state {
	int nan_2008;
	int fp_abi;
	int interp_fp_abi;
	int overall_fp_mode;
};

#define MIPS_ABI_FP_UNKNOWN	(-1)	/* Unknown FP ABI (kernel internal) */

#define INIT_ARCH_ELF_STATE {			\
	.nan_2008 = -1,				\
	.fp_abi = MIPS_ABI_FP_UNKNOWN,		\
	.interp_fp_abi = MIPS_ABI_FP_UNKNOWN,	\
	.overall_fp_mode = -1,			\
}

/* Whether to accept legacy-NaN and 2008-NaN user binaries.  */
extern bool mips_use_nan_legacy;
extern bool mips_use_nan_2008;

extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf,
			    bool is_interp, struct arch_elf_state *state);

extern int arch_check_elf(void *ehdr, bool has_interpreter, void *interp_ehdr,
			  struct arch_elf_state *state);

extern void mips_set_personality_nan(struct arch_elf_state *state);
extern void mips_set_personality_fp(struct arch_elf_state *state);

#define elf_read_implies_exec(ex, stk) mips_elf_read_implies_exec(&(ex), stk)
extern int mips_elf_read_implies_exec(void *elf_ex, int exstack);

#endif /* _ASM_ELF_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
f039b5d3 RB	5	*
f039b5d3 RB	6	* Much of this is taken from binutils and GNU libc ...
1da177e4 LT	7	*/
	8	#ifndef _ASM_ELF_H
	9	#define _ASM_ELF_H
	10
ebb5e78c	11	#include <linux/auxvec.h>
90cee759	12	#include <linux/fs.h>
589ee628 IM	13	#include <linux/mm_types.h>
589ee628 IM	14
90cee759	15	#include <uapi/linux/elf.h>
1da177e4	16
9b26616c MR	17	#include <asm/current.h>
9b26616c MR	18
1da177e4 LT	19	/* ELF header e_flags defines. */
1da177e4 LT	20	/* MIPS architecture level. */
70342287 RB	21	#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
	22	#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
	23	#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
	24	#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
	25	#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
	26	#define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */
	27	#define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */
97fb5de1 RB	28	#define EF_MIPS_ARCH_32R2 0x70000000 /* MIPS32 R2 code. */
97fb5de1 RB	29	#define EF_MIPS_ARCH_64R2 0x80000000 /* MIPS64 R2 code. */
1da177e4 LT	30
	31	/* The ABI of a file. */
	32	#define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */
	33	#define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */
	34
	35	#define PT_MIPS_REGINFO 0x70000000
	36	#define PT_MIPS_RTPROC 0x70000001
	37	#define PT_MIPS_OPTIONS 0x70000002
6cd96229	38	#define PT_MIPS_ABIFLAGS 0x70000003
1da177e4 LT	39
	40	/* Flags in the e_flags field of the header */
	41	#define EF_MIPS_NOREORDER 0x00000001
	42	#define EF_MIPS_PIC 0x00000002
	43	#define EF_MIPS_CPIC 0x00000004
	44	#define EF_MIPS_ABI2 0x00000020
	45	#define EF_MIPS_OPTIONS_FIRST 0x00000080
	46	#define EF_MIPS_32BITMODE 0x00000100
597ce172	47	#define EF_MIPS_FP64 0x00000200
2b5e869e	48	#define EF_MIPS_NAN2008 0x00000400
1da177e4 LT	49	#define EF_MIPS_ABI 0x0000f000
	50	#define EF_MIPS_ARCH 0xf0000000
	51
	52	#define DT_MIPS_RLD_VERSION 0x70000001
	53	#define DT_MIPS_TIME_STAMP 0x70000002
	54	#define DT_MIPS_ICHECKSUM 0x70000003
	55	#define DT_MIPS_IVERSION 0x70000004
	56	#define DT_MIPS_FLAGS 0x70000005
	57	#define RHF_NONE 0x00000000
	58	#define RHF_HARDWAY 0x00000001
	59	#define RHF_NOTPOT 0x00000002
	60	#define RHF_SGI_ONLY 0x00000010
	61	#define DT_MIPS_BASE_ADDRESS 0x70000006
	62	#define DT_MIPS_CONFLICT 0x70000008
	63	#define DT_MIPS_LIBLIST 0x70000009
	64	#define DT_MIPS_LOCAL_GOTNO 0x7000000a
	65	#define DT_MIPS_CONFLICTNO 0x7000000b
	66	#define DT_MIPS_LIBLISTNO 0x70000010
	67	#define DT_MIPS_SYMTABNO 0x70000011
	68	#define DT_MIPS_UNREFEXTNO 0x70000012
	69	#define DT_MIPS_GOTSYM 0x70000013
	70	#define DT_MIPS_HIPAGENO 0x70000014
	71	#define DT_MIPS_RLD_MAP 0x70000016
	72
	73	#define R_MIPS_NONE 0
	74	#define R_MIPS_16 1
	75	#define R_MIPS_32 2
	76	#define R_MIPS_REL32 3
	77	#define R_MIPS_26 4
	78	#define R_MIPS_HI16 5
	79	#define R_MIPS_LO16 6
	80	#define R_MIPS_GPREL16 7
	81	#define R_MIPS_LITERAL 8
	82	#define R_MIPS_GOT16 9
	83	#define R_MIPS_PC16 10
	84	#define R_MIPS_CALL16 11
	85	#define R_MIPS_GPREL32 12
	86	/* The remaining relocs are defined on Irix, although they are not
70342287	87	in the MIPS ELF ABI. */
1da177e4 LT	88	#define R_MIPS_UNUSED1 13
	89	#define R_MIPS_UNUSED2 14
	90	#define R_MIPS_UNUSED3 15
	91	#define R_MIPS_SHIFT5 16
	92	#define R_MIPS_SHIFT6 17
	93	#define R_MIPS_64 18
	94	#define R_MIPS_GOT_DISP 19
	95	#define R_MIPS_GOT_PAGE 20
	96	#define R_MIPS_GOT_OFST 21
	97	/*
	98	* The following two relocation types are specified in the MIPS ABI
	99	* conformance guide version 1.2 but not yet in the psABI.
	100	*/
	101	#define R_MIPS_GOTHI16 22
	102	#define R_MIPS_GOTLO16 23
	103	#define R_MIPS_SUB 24
	104	#define R_MIPS_INSERT_A 25
	105	#define R_MIPS_INSERT_B 26
	106	#define R_MIPS_DELETE 27
	107	#define R_MIPS_HIGHER 28
	108	#define R_MIPS_HIGHEST 29
	109	/*
	110	* The following two relocation types are specified in the MIPS ABI
	111	* conformance guide version 1.2 but not yet in the psABI.
	112	*/
	113	#define R_MIPS_CALLHI16 30
	114	#define R_MIPS_CALLLO16 31
ad8319ea PB	115	/*
	116	* Introduced for MIPSr6.
	117	*/
	118	#define R_MIPS_PC21_S2 60
	119	#define R_MIPS_PC26_S2 61
1da177e4 LT	120	/*
	121	* This range is reserved for vendor specific relocations.
	122	*/
	123	#define R_MIPS_LOVENDOR 100
	124	#define R_MIPS_HIVENDOR 127
	125
f039b5d3 RB	126	#define SHN_MIPS_ACCOMON 0xff00 /* Allocated common symbols */
	127	#define SHN_MIPS_TEXT 0xff01 /* Allocated test symbols. */
	128	#define SHN_MIPS_DATA 0xff02 /* Allocated data symbols. */
	129	#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */
	130	#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */
1da177e4 LT	131
	132	#define SHT_MIPS_LIST 0x70000000
	133	#define SHT_MIPS_CONFLICT 0x70000002
	134	#define SHT_MIPS_GPTAB 0x70000003
	135	#define SHT_MIPS_UCODE 0x70000004
84ada9f8 RB	136	#define SHT_MIPS_DEBUG 0x70000005
	137	#define SHT_MIPS_REGINFO 0x70000006
	138	#define SHT_MIPS_PACKAGE 0x70000007
	139	#define SHT_MIPS_PACKSYM 0x70000008
	140	#define SHT_MIPS_RELD 0x70000009
	141	#define SHT_MIPS_IFACE 0x7000000b
	142	#define SHT_MIPS_CONTENT 0x7000000c
	143	#define SHT_MIPS_OPTIONS 0x7000000d
	144	#define SHT_MIPS_SHDR 0x70000010
	145	#define SHT_MIPS_FDESC 0x70000011
	146	#define SHT_MIPS_EXTSYM 0x70000012
	147	#define SHT_MIPS_DENSE 0x70000013
	148	#define SHT_MIPS_PDESC 0x70000014
	149	#define SHT_MIPS_LOCSYM 0x70000015
	150	#define SHT_MIPS_AUXSYM 0x70000016
	151	#define SHT_MIPS_OPTSYM 0x70000017
	152	#define SHT_MIPS_LOCSTR 0x70000018
	153	#define SHT_MIPS_LINE 0x70000019
	154	#define SHT_MIPS_RFDESC 0x7000001a
	155	#define SHT_MIPS_DELTASYM 0x7000001b
	156	#define SHT_MIPS_DELTAINST 0x7000001c
	157	#define SHT_MIPS_DELTACLASS 0x7000001d
	158	#define SHT_MIPS_DWARF 0x7000001e
	159	#define SHT_MIPS_DELTADECL 0x7000001f
	160	#define SHT_MIPS_SYMBOL_LIB 0x70000020
	161	#define SHT_MIPS_EVENTS 0x70000021
	162	#define SHT_MIPS_TRANSLATE 0x70000022
	163	#define SHT_MIPS_PIXIE 0x70000023
	164	#define SHT_MIPS_XLATE 0x70000024
	165	#define SHT_MIPS_XLATE_DEBUG 0x70000025
	166	#define SHT_MIPS_WHIRL 0x70000026
	167	#define SHT_MIPS_EH_REGION 0x70000027
	168	#define SHT_MIPS_XLATE_OLD 0x70000028
	169	#define SHT_MIPS_PDR_EXCEPTION 0x70000029
1da177e4	170
84ada9f8 RB	171	#define SHF_MIPS_GPREL 0x10000000
	172	#define SHF_MIPS_MERGE 0x20000000
	173	#define SHF_MIPS_ADDR 0x40000000
	174	#define SHF_MIPS_STRING 0x80000000
	175	#define SHF_MIPS_NOSTRIP 0x08000000
	176	#define SHF_MIPS_LOCAL 0x04000000
	177	#define SHF_MIPS_NAMES 0x02000000
	178	#define SHF_MIPS_NODUPES 0x01000000
1da177e4	179
de704161 MR	180	#define MIPS_ABI_FP_ANY 0 /* FP ABI doesn't matter */
	181	#define MIPS_ABI_FP_DOUBLE 1 /* -mdouble-float */
	182	#define MIPS_ABI_FP_SINGLE 2 /* -msingle-float */
	183	#define MIPS_ABI_FP_SOFT 3 /* -msoft-float */
	184	#define MIPS_ABI_FP_OLD_64 4 /* -mips32r2 -mfp64 */
	185	#define MIPS_ABI_FP_XX 5 /* -mfpxx */
	186	#define MIPS_ABI_FP_64 6 /* -mips32r2 -mfp64 */
	187	#define MIPS_ABI_FP_64A 7 /* -mips32r2 -mfp64 -mno-odd-spreg */
1da177e4	188
6cd96229 PB	189	struct mips_elf_abiflags_v0 {
	190	uint16_t version; /* Version of flags structure */
	191	uint8_t isa_level; /* The level of the ISA: 1-5, 32, 64 */
	192	uint8_t isa_rev; /* The revision of ISA: 0 for MIPS V and below,
	193	1-n otherwise */
	194	uint8_t gpr_size; /* The size of general purpose registers */
	195	uint8_t cpr1_size; /* The size of co-processor 1 registers */
	196	uint8_t cpr2_size; /* The size of co-processor 2 registers */
	197	uint8_t fp_abi; /* The floating-point ABI */
	198	uint32_t isa_ext; /* Mask of processor-specific extensions */
	199	uint32_t ases; /* Mask of ASEs used */
	200	uint32_t flags1; /* Mask of general flags */
	201	uint32_t flags2;
	202	};
	203
de704161 MR	204	#ifndef ELF_ARCH
	205	/* ELF register definitions */
	206	#define ELF_NGREG 45
	207	#define ELF_NFPREG 33
	208
	209	typedef unsigned long elf_greg_t;
	210	typedef elf_greg_t elf_gregset_t[ELF_NGREG];
	211
	212	typedef double elf_fpreg_t;
	213	typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
6cd96229	214
08c941bf MN	215	void mips_dump_regs32(u32 uregs, const struct pt_regs regs);
	216	void mips_dump_regs64(u64 uregs, const struct pt_regs regs);
	217
875d43e7	218	#ifdef CONFIG_32BIT
1da177e4 LT	219	/*
	220	* This is used to ensure we don't load something for the wrong architecture.
	221	*/
c9babb19	222	#define elf_check_arch elfo32_check_arch
1da177e4 LT	223
	224	/*
	225	* These are used to set parameters in the core dumps.
	226	*/
	227	#define ELF_CLASS ELFCLASS32
	228
39a3cb27 MN	229	#define ELF_CORE_COPY_REGS(dest, regs) \
	230	mips_dump_regs32((u32 *)&(dest), (regs));
	231
875d43e7	232	#endif /* CONFIG_32BIT */
1da177e4	233
875d43e7	234	#ifdef CONFIG_64BIT
1da177e4 LT	235	/*
	236	* This is used to ensure we don't load something for the wrong architecture.
	237	*/
c9babb19	238	#define elf_check_arch elfn64_check_arch
1da177e4 LT	239
	240	/*
	241	* These are used to set parameters in the core dumps.
	242	*/
	243	#define ELF_CLASS ELFCLASS64
	244
39a3cb27 MN	245	#define ELF_CORE_COPY_REGS(dest, regs) \
	246	mips_dump_regs64((u64 *)&(dest), (regs));
	247
875d43e7	248	#endif /* CONFIG_64BIT */
1da177e4 LT	249
	250	/*
	251	* These are used to set parameters in the core dumps.
	252	*/
	253	#ifdef __MIPSEB__
	254	#define ELF_DATA ELFDATA2MSB
08d9d1c4	255	#elif defined(__MIPSEL__)
1da177e4 LT	256	#define ELF_DATA ELFDATA2LSB
	257	#endif
	258	#define ELF_ARCH EM_MIPS
	259
	260	#endif /* !defined(ELF_ARCH) */
	261
4a60ad51 MR	262	/*
	263	* In order to be sure that we don't attempt to execute an O32 binary which
	264	* requires 64 bit FP (FR=1) on a system which does not support it we refuse
	265	* to execute any binary which has bits specified by the following macro set
	266	* in its ELF header flags.
	267	*/
	268	#ifdef CONFIG_MIPS_O32_FP64_SUPPORT
	269	# define __MIPS_O32_FP64_MUST_BE_ZERO 0
	270	#else
	271	# define __MIPS_O32_FP64_MUST_BE_ZERO EF_MIPS_FP64
	272	#endif
	273
f4d3d504 DW	274	#define mips_elf_check_machine(x) ((x)->e_machine == EM_MIPS)
	275
	276	#define vmcore_elf32_check_arch mips_elf_check_machine
	277	#define vmcore_elf64_check_arch mips_elf_check_machine
	278
c9babb19 MR	279	/*
	280	* Return non-zero if HDR identifies an o32 ELF binary.
	281	*/
	282	#define elfo32_check_arch(hdr) \
	283	({ \
	284	int __res = 1; \
	285	struct elfhdr *__h = (hdr); \
	286	\
	287	if (!mips_elf_check_machine(__h)) \
	288	__res = 0; \
	289	if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
	290	__res = 0; \
	291	if ((__h->e_flags & EF_MIPS_ABI2) != 0) \
	292	__res = 0; \
	293	if (((__h->e_flags & EF_MIPS_ABI) != 0) && \
	294	((__h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32)) \
	295	__res = 0; \
	296	if (__h->e_flags & __MIPS_O32_FP64_MUST_BE_ZERO) \
	297	__res = 0; \
	298	\
	299	__res; \
	300	})
	301
	302	/*
	303	* Return non-zero if HDR identifies an n64 ELF binary.
	304	*/
	305	#define elfn64_check_arch(hdr) \
	306	({ \
	307	int __res = 1; \
	308	struct elfhdr *__h = (hdr); \
	309	\
	310	if (!mips_elf_check_machine(__h)) \
	311	__res = 0; \
	312	if (__h->e_ident[EI_CLASS] != ELFCLASS64) \
	313	__res = 0; \
	314	\
	315	__res; \
	316	})
	317
	318	/*
	319	* Return non-zero if HDR identifies an n32 ELF binary.
	320	*/
	321	#define elfn32_check_arch(hdr) \
	322	({ \
	323	int __res = 1; \
	324	struct elfhdr *__h = (hdr); \
	325	\
	326	if (!mips_elf_check_machine(__h)) \
	327	__res = 0; \
	328	if (__h->e_ident[EI_CLASS] != ELFCLASS32) \
	329	__res = 0; \
	330	if (((__h->e_flags & EF_MIPS_ABI2) == 0) \|\| \
	331	((__h->e_flags & EF_MIPS_ABI) != 0)) \
	332	__res = 0; \
	333	\
	334	__res; \
	335	})
	336
e50c0a8f RB	337	struct mips_abi;
	338
	339	extern struct mips_abi mips_abi;
	340	extern struct mips_abi mips_abi_32;
	341	extern struct mips_abi mips_abi_n32;
	342
875d43e7	343	#ifdef CONFIG_32BIT
1da177e4	344
90cee759	345	#define SET_PERSONALITY2(ex, state) \
e50c0a8f	346	do { \
48f8eaee MC	347	clear_thread_flag(TIF_HYBRID_FPREGS); \
	348	set_thread_flag(TIF_32BIT_FPREGS); \
	349	\
e50c0a8f	350	current->thread.abi = &mips_abi; \
9b26616c	351	\
2e5832ab	352	mips_set_personality_fp(state); \
2b5e869e	353	mips_set_personality_nan(state); \
2e5832ab MR	354	\
	355	if (personality(current->personality) != PER_LINUX) \
	356	set_personality(PER_LINUX); \
1da177e4 LT	357	} while (0)
1da177e4 LT	358
875d43e7	359	#endif /* CONFIG_32BIT */
1da177e4	360
875d43e7	361	#ifdef CONFIG_64BIT
1da177e4	362
e50c0a8f RB	363	#ifdef CONFIG_MIPS32_N32
	364	#define __SET_PERSONALITY32_N32() \
	365	do { \
293c5bd1	366	set_thread_flag(TIF_32BIT_ADDR); \
2e5832ab	367	\
e50c0a8f RB	368	current->thread.abi = &mips_abi_n32; \
	369	} while (0)
	370	#else
	371	#define __SET_PERSONALITY32_N32() \
	372	do { } while (0)
	373	#endif
	374
	375	#ifdef CONFIG_MIPS32_O32
90cee759	376	#define __SET_PERSONALITY32_O32(ex, state) \
e50c0a8f	377	do { \
293c5bd1 RB	378	set_thread_flag(TIF_32BIT_REGS); \
293c5bd1 RB	379	set_thread_flag(TIF_32BIT_ADDR); \
48f8eaee MC	380	clear_thread_flag(TIF_HYBRID_FPREGS); \
48f8eaee MC	381	set_thread_flag(TIF_32BIT_FPREGS); \
597ce172	382	\
e50c0a8f	383	current->thread.abi = &mips_abi_32; \
2e5832ab MR	384	\
2e5832ab MR	385	mips_set_personality_fp(state); \
e50c0a8f RB	386	} while (0)
e50c0a8f RB	387	#else
90cee759	388	#define __SET_PERSONALITY32_O32(ex, state) \
e50c0a8f RB	389	do { } while (0)
	390	#endif
	391
	392	#ifdef CONFIG_MIPS32_COMPAT
90cee759	393	#define __SET_PERSONALITY32(ex, state) \
e50c0a8f RB	394	do { \
	395	if ((((ex).e_flags & EF_MIPS_ABI2) != 0) && \
	396	((ex).e_flags & EF_MIPS_ABI) == 0) \
	397	__SET_PERSONALITY32_N32(); \
	398	else \
90cee759	399	__SET_PERSONALITY32_O32(ex, state); \
e50c0a8f RB	400	} while (0)
e50c0a8f RB	401	#else
90cee759	402	#define __SET_PERSONALITY32(ex, state) do { } while (0)
e50c0a8f RB	403	#endif
e50c0a8f RB	404
90cee759	405	#define SET_PERSONALITY2(ex, state) \
e50c0a8f	406	do { \
1c0d52b9 DD	407	unsigned int p; \
1c0d52b9 DD	408	\
293c5bd1	409	clear_thread_flag(TIF_32BIT_REGS); \
597ce172	410	clear_thread_flag(TIF_32BIT_FPREGS); \
4227a2d4	411	clear_thread_flag(TIF_HYBRID_FPREGS); \
293c5bd1 RB	412	clear_thread_flag(TIF_32BIT_ADDR); \
293c5bd1 RB	413	\
e50c0a8f	414	if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
90cee759	415	__SET_PERSONALITY32(ex, state); \
293c5bd1	416	else \
e50c0a8f	417	current->thread.abi = &mips_abi; \
e50c0a8f	418	\
2b5e869e	419	mips_set_personality_nan(state); \
9b26616c	420	\
1c0d52b9 DD	421	p = personality(current->personality); \
1c0d52b9 DD	422	if (p != PER_LINUX32 && p != PER_LINUX) \
e50c0a8f	423	set_personality(PER_LINUX); \
1da177e4 LT	424	} while (0)
1da177e4 LT	425
875d43e7	426	#endif /* CONFIG_64BIT */
1da177e4	427
6a9c001b	428	#define CORE_DUMP_USE_REGSET
1da177e4 LT	429	#define ELF_EXEC_PAGESIZE PAGE_SIZE
	430
	431	/* This yields a mask that user programs can use to figure out what
	432	instruction set this cpu supports. This could be done in userspace,
	433	but it's not easy, and we've already done it here. */
	434
e14f1db7 PB	435	#define ELF_HWCAP (elf_hwcap)
	436	extern unsigned int elf_hwcap;
	437	#include <asm/hwcap.h>
1da177e4	438
874fd3b5 DD	439	/*
874fd3b5 DD	440	* This yields a string that ld.so will use to load implementation
70342287	441	* specific libraries for optimization. This is more specific in
874fd3b5 DD	442	* intent than poking at uname or /proc/cpuinfo.
874fd3b5 DD	443	*/
1da177e4	444
874fd3b5 DD	445	#define ELF_PLATFORM __elf_platform
874fd3b5 DD	446	extern const char *__elf_platform;
1da177e4 LT	447
	448	/*
	449	* See comments in asm-alpha/elf.h, this is the same thing
	450	* on the MIPS.
	451	*/
	452	#define ELF_PLAT_INIT(_r, load_addr) do { \
	453	_r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0; \
	454	_r->regs[5] = _r->regs[6] = _r->regs[7] = _r->regs[8] = 0; \
	455	_r->regs[9] = _r->regs[10] = _r->regs[11] = _r->regs[12] = 0; \
	456	_r->regs[13] = _r->regs[14] = _r->regs[15] = _r->regs[16] = 0; \
	457	_r->regs[17] = _r->regs[18] = _r->regs[19] = _r->regs[20] = 0; \
	458	_r->regs[21] = _r->regs[22] = _r->regs[23] = _r->regs[24] = 0; \
	459	_r->regs[25] = _r->regs[26] = _r->regs[27] = _r->regs[28] = 0; \
	460	_r->regs[30] = _r->regs[31] = 0; \
	461	} while (0)
	462
	463	/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
	464	use of this is to invoke "./ld.so someprog" to test out a new version of
70342287 RB	465	the loader. We need to make sure that it is out of the way of the program
70342287 RB	466	that it will "exec", and that there is sufficient room for the brk. */
1da177e4 LT	467
1da177e4 LT	468	#ifndef ELF_ET_DYN_BASE
70342287	469	#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
1da177e4 LT	470	#endif
1da177e4 LT	471
233b2ca1	472	/* update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes */
ebb5e78c AS	473	#define ARCH_DLINFO \
	474	do { \
	475	NEW_AUX_ENT(AT_SYSINFO_EHDR, \
	476	(unsigned long)current->mm->context.vdso); \
	477	} while (0)
	478
c52d0d30 DD	479	#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
	480	struct linux_binprm;
	481	extern int arch_setup_additional_pages(struct linux_binprm *bprm,
	482	int uses_interp);
652b14aa	483
90cee759	484	struct arch_elf_state {
2b5e869e	485	int nan_2008;
90cee759 PB	486	int fp_abi;
90cee759 PB	487	int interp_fp_abi;
46490b57	488	int overall_fp_mode;
90cee759 PB	489	};
90cee759 PB	490
46490b57 MC	491	#define MIPS_ABI_FP_UNKNOWN (-1) /* Unknown FP ABI (kernel internal) */
46490b57 MC	492
90cee759	493	#define INIT_ARCH_ELF_STATE { \
2b5e869e	494	.nan_2008 = -1, \
46490b57 MC	495	.fp_abi = MIPS_ABI_FP_UNKNOWN, \
	496	.interp_fp_abi = MIPS_ABI_FP_UNKNOWN, \
	497	.overall_fp_mode = -1, \
90cee759 PB	498	}
90cee759 PB	499
503943e0 MR	500	/* Whether to accept legacy-NaN and 2008-NaN user binaries. */
	501	extern bool mips_use_nan_legacy;
	502	extern bool mips_use_nan_2008;
	503
90cee759 PB	504	extern int arch_elf_pt_proc(void ehdr, void phdr, struct file *elf,
	505	bool is_interp, struct arch_elf_state *state);
	506
eb4bc076	507	extern int arch_check_elf(void ehdr, bool has_interpreter, void interp_ehdr,
90cee759 PB	508	struct arch_elf_state *state);
90cee759 PB	509
2b5e869e	510	extern void mips_set_personality_nan(struct arch_elf_state *state);
90cee759 PB	511	extern void mips_set_personality_fp(struct arch_elf_state *state);
90cee759 PB	512
1a770b85 PB	513	#define elf_read_implies_exec(ex, stk) mips_elf_read_implies_exec(&(ex), stk)
	514	extern int mips_elf_read_implies_exec(void *elf_ex, int exstack);
	515
1da177e4	516	#endif /* _ASM_ELF_H */