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1da177e4 LT |
1 | /* |
2 | * Copyright (C) 2000 RidgeRun, Inc. | |
3 | * Author: RidgeRun, Inc. | |
4 | * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com | |
5 | * | |
6 | * Copyright 2001 MontaVista Software Inc. | |
7 | * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net | |
8 | * Copyright (C) 2000, 2001, 2003 Ralf Baechle (ralf@gnu.org) | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify it | |
11 | * under the terms of the GNU General Public License as published by the | |
12 | * Free Software Foundation; either version 2 of the License, or (at your | |
13 | * option) any later version. | |
14 | * | |
15 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | |
16 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
17 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | |
18 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
19 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
20 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | |
21 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | |
22 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
23 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
24 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
25 | * | |
26 | * You should have received a copy of the GNU General Public License along | |
27 | * with this program; if not, write to the Free Software Foundation, Inc., | |
28 | * 675 Mass Ave, Cambridge, MA 02139, USA. | |
29 | * | |
30 | */ | |
31 | #include <linux/errno.h> | |
32 | #include <linux/init.h> | |
33 | #include <linux/kernel_stat.h> | |
34 | #include <linux/module.h> | |
35 | #include <linux/signal.h> | |
36 | #include <linux/sched.h> | |
37 | #include <linux/types.h> | |
38 | #include <linux/interrupt.h> | |
39 | #include <linux/ioport.h> | |
40 | #include <linux/timex.h> | |
41 | #include <linux/slab.h> | |
42 | #include <linux/random.h> | |
43 | #include <linux/bitops.h> | |
44 | #include <asm/bootinfo.h> | |
45 | #include <asm/io.h> | |
46 | #include <asm/irq.h> | |
47 | #include <asm/irq_cpu.h> | |
48 | #include <asm/mipsregs.h> | |
49 | #include <asm/system.h> | |
50 | ||
e4ac58af RB |
51 | asmlinkage void plat_irq_dispatch(struct pt_regs *regs) |
52 | { | |
53 | unsigned int pending = read_c0_status() & read_c0_cause(); | |
54 | ||
55 | if (pending & STATUSF_IP2) /* int0 hardware line */ | |
56 | do_IRQ(2, regs); | |
57 | else if (pending & STATUSF_IP3) /* int1 hardware line */ | |
58 | do_IRQ(3, regs); | |
59 | else if (pending & STATUSF_IP4) /* int2 hardware line */ | |
60 | do_IRQ(4, regs); | |
61 | else if (pending & STATUSF_IP5) /* int3 hardware line */ | |
62 | do_IRQ(5, regs); | |
63 | else if (pending & STATUSF_IP6) /* int4 hardware line */ | |
64 | do_IRQ(6, regs); | |
65 | else if (pending & STATUSF_IP7) /* cpu timer */ | |
66 | do_IRQ(7, regs); | |
67 | else { | |
68 | /* | |
69 | * Now look at the extended interrupts | |
70 | */ | |
71 | pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16; | |
72 | ||
73 | if (pending & STATUSF_IP8) /* int6 hardware line */ | |
74 | do_IRQ(8, regs); | |
75 | else if (pending & STATUSF_IP9) /* int7 hardware line */ | |
76 | do_IRQ(9, regs); | |
77 | else if (pending & STATUSF_IP10) /* int8 hardware line */ | |
78 | do_IRQ(10, regs); | |
79 | else if (pending & STATUSF_IP11) /* int9 hardware line */ | |
80 | do_IRQ(11, regs); | |
81 | } | |
82 | } | |
1da177e4 LT |
83 | |
84 | void __init arch_init_irq(void) | |
85 | { | |
86 | /* | |
87 | * Clear all of the interrupts while we change the able around a bit. | |
88 | * int-handler is not on bootstrap | |
89 | */ | |
90 | clear_c0_status(ST0_IM); | |
91 | local_irq_disable(); | |
92 | ||
1da177e4 LT |
93 | mips_cpu_irq_init(0); |
94 | rm7k_cpu_irq_init(8); | |
95 | } |