MIPS: BMIPS: Add support PWM device nodes
[linux-2.6-block.git] / arch / mips / boot / dts / brcm / bcm7425.dtsi
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1/ {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm7425";
5
6 cpus {
7 #address-cells = <1>;
8 #size-cells = <0>;
9
10 mips-hpt-frequency = <163125000>;
11
12 cpu@0 {
13 compatible = "brcm,bmips5000";
14 device_type = "cpu";
15 reg = <0>;
16 };
17
18 cpu@1 {
19 compatible = "brcm,bmips5000";
20 device_type = "cpu";
21 reg = <1>;
22 };
23 };
24
25 aliases {
26 uart0 = &uart0;
27 };
28
29 cpu_intc: cpu_intc {
30 #address-cells = <0>;
31 compatible = "mti,cpu-interrupt-controller";
32
33 interrupt-controller;
34 #interrupt-cells = <1>;
35 };
36
37 clocks {
38 uart_clk: uart_clk {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <81000000>;
42 };
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43
44 upg_clk: upg_clk {
45 compatible = "fixed-clock";
46 #clock-cells = <0>;
47 clock-frequency = <27000000>;
48 };
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49 };
50
51 rdb {
52 #address-cells = <1>;
53 #size-cells = <1>;
54
55 compatible = "simple-bus";
56 ranges = <0 0x10000000 0x01000000>;
57
58 periph_intc: periph_intc@41a400 {
59 compatible = "brcm,bcm7038-l1-intc";
60 reg = <0x41a400 0x30>, <0x41a600 0x30>;
61
62 interrupt-controller;
63 #interrupt-cells = <1>;
64
65 interrupt-parent = <&cpu_intc>;
66 interrupts = <2>, <3>;
67 };
68
69 sun_l2_intc: sun_l2_intc@403000 {
70 compatible = "brcm,l2-intc";
71 reg = <0x403000 0x30>;
72 interrupt-controller;
73 #interrupt-cells = <1>;
74 interrupt-parent = <&periph_intc>;
75 interrupts = <47>;
76 };
77
78 gisb-arb@400000 {
79 compatible = "brcm,bcm7400-gisb-arb";
80 reg = <0x400000 0xdc>;
81 native-endian;
82 interrupt-parent = <&sun_l2_intc>;
83 interrupts = <0>, <2>;
84 brcm,gisb-arb-master-mask = <0x177b>;
85 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pcie_0",
86 "bsp_0", "rdc_0",
87 "raaga_0", "avd_1",
88 "jtag_0", "svd_0",
89 "vice_0";
90 };
91
92 upg_irq0_intc: upg_irq0_intc@406780 {
93 compatible = "brcm,bcm7120-l2-intc";
94 reg = <0x406780 0x8>;
95
5c40d493 96 brcm,int-map-mask = <0x44>, <0x7000000>;
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97 brcm,int-fwd-mask = <0x70000>;
98
99 interrupt-controller;
100 #interrupt-cells = <1>;
101
102 interrupt-parent = <&periph_intc>;
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103 interrupts = <55>, <53>;
104 interrupt-names = "upg_main", "upg_bsc";
105 };
106
107 upg_aon_irq0_intc: upg_aon_irq0_intc@409480 {
108 compatible = "brcm,bcm7120-l2-intc";
109 reg = <0x409480 0x8>;
110
111 brcm,int-map-mask = <0x40>, <0x18000000>, <0x100000>;
112 brcm,int-fwd-mask = <0>;
113 brcm,irq-can-wake;
114
115 interrupt-controller;
116 #interrupt-cells = <1>;
117
118 interrupt-parent = <&periph_intc>;
119 interrupts = <56>, <54>, <59>;
120 interrupt-names = "upg_main_aon", "upg_bsc_aon",
121 "upg_spi";
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122 };
123
124 sun_top_ctrl: syscon@404000 {
125 compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
126 reg = <0x404000 0x51c>;
25d6463e 127 native-endian;
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128 };
129
130 reboot {
131 compatible = "brcm,brcmstb-reboot";
132 syscon = <&sun_top_ctrl 0x304 0x308>;
133 };
134
135 uart0: serial@406b00 {
136 compatible = "ns16550a";
137 reg = <0x406b00 0x20>;
138 reg-io-width = <0x4>;
139 reg-shift = <0x2>;
140 interrupt-parent = <&periph_intc>;
141 interrupts = <61>;
142 clocks = <&uart_clk>;
143 status = "disabled";
144 };
145
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146 uart1: serial@406b40 {
147 compatible = "ns16550a";
148 reg = <0x406b40 0x20>;
149 reg-io-width = <0x4>;
150 reg-shift = <0x2>;
151 interrupt-parent = <&periph_intc>;
152 interrupts = <62>;
153 clocks = <&uart_clk>;
154 status = "disabled";
155 };
156
157 uart2: serial@406b80 {
158 compatible = "ns16550a";
159 reg = <0x406b80 0x20>;
160 reg-io-width = <0x4>;
161 reg-shift = <0x2>;
162 interrupt-parent = <&periph_intc>;
163 interrupts = <63>;
164 clocks = <&uart_clk>;
165 status = "disabled";
166 };
167
168 bsca: i2c@409180 {
169 clock-frequency = <390000>;
170 compatible = "brcm,brcmstb-i2c";
171 interrupt-parent = <&upg_aon_irq0_intc>;
172 reg = <0x409180 0x58>;
173 interrupts = <27>;
174 interrupt-names = "upg_bsca";
175 status = "disabled";
176 };
177
178 bscb: i2c@409400 {
179 clock-frequency = <390000>;
180 compatible = "brcm,brcmstb-i2c";
181 interrupt-parent = <&upg_aon_irq0_intc>;
182 reg = <0x409400 0x58>;
183 interrupts = <28>;
184 interrupt-names = "upg_bscb";
185 status = "disabled";
186 };
187
188 bscc: i2c@406200 {
189 clock-frequency = <390000>;
190 compatible = "brcm,brcmstb-i2c";
191 interrupt-parent = <&upg_irq0_intc>;
192 reg = <0x406200 0x58>;
193 interrupts = <24>;
194 interrupt-names = "upg_bscc";
195 status = "disabled";
196 };
197
198 bscd: i2c@406280 {
199 clock-frequency = <390000>;
200 compatible = "brcm,brcmstb-i2c";
201 interrupt-parent = <&upg_irq0_intc>;
202 reg = <0x406280 0x58>;
203 interrupts = <25>;
204 interrupt-names = "upg_bscd";
205 status = "disabled";
206 };
207
208 bsce: i2c@406300 {
209 clock-frequency = <390000>;
210 compatible = "brcm,brcmstb-i2c";
211 interrupt-parent = <&upg_irq0_intc>;
212 reg = <0x406300 0x58>;
213 interrupts = <26>;
214 interrupt-names = "upg_bsce";
215 status = "disabled";
216 };
217
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218 pwma: pwm@406580 {
219 compatible = "brcm,bcm7038-pwm";
220 reg = <0x406580 0x28>;
221 #pwm-cells = <2>;
222 clocks = <&upg_clk>;
223 status = "disabled";
224 };
225
226 pwmb: pwm@406800 {
227 compatible = "brcm,bcm7038-pwm";
228 reg = <0x406800 0x28>;
229 #pwm-cells = <2>;
230 clocks = <&upg_clk>;
231 status = "disabled";
232 };
233
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234 enet0: ethernet@b80000 {
235 phy-mode = "internal";
236 phy-handle = <&phy1>;
237 mac-address = [ 00 10 18 36 23 1a ];
238 compatible = "brcm,genet-v3";
239 #address-cells = <0x1>;
240 #size-cells = <0x1>;
241 reg = <0xb80000 0x11c88>;
242 interrupts = <17>, <18>;
243 interrupt-parent = <&periph_intc>;
244 status = "disabled";
245
246 mdio@e14 {
247 compatible = "brcm,genet-mdio-v3";
248 #address-cells = <0x1>;
249 #size-cells = <0x0>;
250 reg = <0xe14 0x8>;
251
252 phy1: ethernet-phy@1 {
253 max-speed = <100>;
254 reg = <0x1>;
255 compatible = "brcm,40nm-ephy",
256 "ethernet-phy-ieee802.3-c22";
257 };
258 };
259 };
260
261 ehci0: usb@480300 {
262 compatible = "brcm,bcm7425-ehci", "generic-ehci";
263 reg = <0x480300 0x100>;
264 native-endian;
265 interrupt-parent = <&periph_intc>;
266 interrupts = <65>;
267 status = "disabled";
268 };
269
270 ohci0: usb@480400 {
271 compatible = "brcm,bcm7425-ohci", "generic-ohci";
272 reg = <0x480400 0x100>;
273 native-endian;
274 no-big-frame-no;
275 interrupt-parent = <&periph_intc>;
276 interrupts = <67>;
277 status = "disabled";
278 };
279
280 ehci1: usb@480500 {
281 compatible = "brcm,bcm7425-ehci", "generic-ehci";
282 reg = <0x480500 0x100>;
283 native-endian;
284 interrupt-parent = <&periph_intc>;
285 interrupts = <66>;
286 status = "disabled";
287 };
288
289 ohci1: usb@480600 {
290 compatible = "brcm,bcm7425-ohci", "generic-ohci";
291 reg = <0x480600 0x100>;
292 native-endian;
293 no-big-frame-no;
294 interrupt-parent = <&periph_intc>;
295 interrupts = <68>;
296 status = "disabled";
297 };
298
299 ehci2: usb@490300 {
300 compatible = "brcm,bcm7425-ehci", "generic-ehci";
301 reg = <0x490300 0x100>;
302 native-endian;
303 interrupt-parent = <&periph_intc>;
304 interrupts = <70>;
305 status = "disabled";
306 };
307
308 ohci2: usb@490400 {
309 compatible = "brcm,bcm7425-ohci", "generic-ohci";
310 reg = <0x490400 0x100>;
311 native-endian;
312 no-big-frame-no;
313 interrupt-parent = <&periph_intc>;
314 interrupts = <72>;
315 status = "disabled";
316 };
317
318 ehci3: usb@490500 {
319 compatible = "brcm,bcm7425-ehci", "generic-ehci";
320 reg = <0x490500 0x100>;
321 native-endian;
322 interrupt-parent = <&periph_intc>;
323 interrupts = <71>;
324 status = "disabled";
325 };
326
327 ohci3: usb@490600 {
328 compatible = "brcm,bcm7425-ohci", "generic-ohci";
329 reg = <0x490600 0x100>;
330 native-endian;
331 no-big-frame-no;
332 interrupt-parent = <&periph_intc>;
333 interrupts = <73>;
334 status = "disabled";
335 };
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336
337 sata: sata@181000 {
338 compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
339 reg-names = "ahci", "top-ctrl";
340 reg = <0x181000 0xa9c>, <0x180020 0x1c>;
341 interrupt-parent = <&periph_intc>;
69ca2b81 342 interrupts = <41>;
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343 #address-cells = <1>;
344 #size-cells = <0>;
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345 status = "disabled";
346
347 sata0: sata-port@0 {
348 reg = <0>;
349 phys = <&sata_phy0>;
350 };
351
352 sata1: sata-port@1 {
353 reg = <1>;
354 phys = <&sata_phy1>;
355 };
356 };
357
69ca2b81 358 sata_phy: sata-phy@180100 {
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359 compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
360 reg = <0x180100 0x0eff>;
361 reg-names = "phy";
362 #address-cells = <1>;
363 #size-cells = <0>;
364 status = "disabled";
365
366 sata_phy0: sata-phy@0 {
367 reg = <0>;
368 #phy-cells = <0>;
369 };
370
371 sata_phy1: sata-phy@1 {
372 reg = <1>;
373 #phy-cells = <0>;
374 };
375 };
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376 };
377};